frontend: accept more bios
[pcsx_rearmed.git] / plugins / gpulib / gpu.h
CommitLineData
56f08d83 1/*
2 * (C) GraÅžvydas "notaz" Ignotas, 2011
3 *
4 * This work is licensed under the terms of any of these licenses
5 * (at your option):
6 * - GNU GPL, version 2 or later.
7 * - GNU LGPL, version 2.1 or later.
8 * See the COPYING file in the top-level directory.
9 */
10
7a8d521f 11#ifndef __GPULIB_GPU_H__
12#define __GPULIB_GPU_H__
13
56f08d83 14#include <stdint.h>
15
6f2ee2be 16#ifdef __cplusplus
17extern "C" {
18#endif
19
56f08d83 20#define CMD_BUFFER_LEN 1024
21
89df80c6
PC
22#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
23#define HTOLE32(x) __builtin_bswap32(x)
24#define HTOLE16(x) __builtin_bswap16(x)
25#define LE32TOH(x) __builtin_bswap32(x)
26#define LE16TOH(x) __builtin_bswap16(x)
27#else
28#define HTOLE32(x) (x)
29#define HTOLE16(x) (x)
30#define LE32TOH(x) (x)
31#define LE16TOH(x) (x)
32#endif
33
f23b103c
PC
34#define BIT(x) (1 << (x))
35
36#define PSX_GPU_STATUS_DHEIGHT BIT(19)
308c6e67 37#define PSX_GPU_STATUS_PAL BIT(20)
f23b103c
PC
38#define PSX_GPU_STATUS_RGB24 BIT(21)
39#define PSX_GPU_STATUS_INTERLACE BIT(22)
40#define PSX_GPU_STATUS_BLANKING BIT(23)
41#define PSX_GPU_STATUS_IMG BIT(27)
42#define PSX_GPU_STATUS_DMA(x) ((x) << 29)
43#define PSX_GPU_STATUS_DMA_MASK (BIT(29) | BIT(30))
44
56f08d83 45struct psx_gpu {
56f08d83 46 uint32_t cmd_buffer[CMD_BUFFER_LEN];
47 uint32_t regs[16];
9ee0fd5b 48 uint16_t *vram;
f23b103c 49 uint32_t status;
6e9bdaef 50 uint32_t gp0;
51 uint32_t ex_regs[8];
56f08d83 52 struct {
8dd855cd 53 int hres, vres;
56f08d83 54 int x, y, w, h;
8dd855cd 55 int x1, x2;
56f08d83 56 int y1, y2;
308c6e67 57 int src_x, src_y;
56f08d83 58 } screen;
59 struct {
60 int x, y, w, h;
05740673 61 short int offset, is_read;
62 } dma, dma_start;
56f08d83 63 int cmd_len;
56f08d83 64 uint32_t zero;
fc84f618 65 struct {
66 uint32_t fb_dirty:1;
5440b88e 67 uint32_t old_interlace:1;
68 uint32_t allow_interlace:2;
aafcb4dd 69 uint32_t blanked:1;
0b02eb77 70 uint32_t enhancement_enable:1;
71 uint32_t enhancement_active:1;
308c6e67 72 uint32_t dims_changed:1;
3ece2f0c 73 uint32_t *frame_count;
74 uint32_t *hcnt; /* hsync count */
deb18d24 75 struct {
76 uint32_t addr;
1c72b1c2 77 uint32_t cycles;
deb18d24 78 uint32_t frame;
79 uint32_t hcnt;
80 } last_list;
5440b88e 81 uint32_t last_vram_read_frame;
81277586 82 uint32_t w_out_old, h_out_old, status_vo_old;
308c6e67 83 int screen_centering_type; // 0 - auto, 1 - game conrolled, 2 - manual
84 int screen_centering_x;
85 int screen_centering_y;
fc84f618 86 } state;
87 struct {
9fe27e25 88 int32_t set:3; /* -1 auto, 0 off, 1-3 fixed */
89 int32_t cnt:3; /* amount skipped in a row */
fc84f618 90 uint32_t active:1;
fb4c6fba 91 uint32_t allow:1;
fc84f618 92 uint32_t frame_ready:1;
93 const int *advice;
fb4c6fba 94 uint32_t last_flip_frame;
fbb4bfff 95 uint32_t pending_fill[3];
fc84f618 96 } frameskip;
308c6e67 97 void *(*get_enhancement_bufer)
fa56d360 98 (int *x, int *y, int *w, int *h, int *vram_h);
9ee0fd5b 99 void *(*mmap)(unsigned int size);
100 void (*munmap)(void *ptr, unsigned int size);
56f08d83 101};
102
103extern struct psx_gpu gpu;
104
105extern const unsigned char cmd_lengths[256];
106
b243416b 107int do_cmd_list(uint32_t *list, int count, int *last_cmd);
56f08d83 108
914455e6 109struct rearmed_cbs;
110
9394ada5 111int renderer_init(void);
e929dec5 112void renderer_finish(void);
5b745e5b 113void renderer_sync_ecmds(uint32_t * ecmds);
05740673 114void renderer_update_caches(int x, int y, int w, int h);
9394ada5 115void renderer_flush_queues(void);
5440b88e 116void renderer_set_interlace(int enable, int is_odd);
914455e6 117void renderer_set_config(const struct rearmed_cbs *config);
e929dec5 118void renderer_notify_res_change(void);
9394ada5 119
5440b88e 120int vout_init(void);
121int vout_finish(void);
122void vout_update(void);
aafcb4dd 123void vout_blank(void);
5440b88e 124void vout_set_config(const struct rearmed_cbs *config);
6f2ee2be 125
096ec49b 126/* listing these here for correct linkage if rasterizer uses c++ */
127struct GPUFreeze;
096ec49b 128
129long GPUinit(void);
130long GPUshutdown(void);
131void GPUwriteDataMem(uint32_t *mem, int count);
8c84ba5f 132long GPUdmaChain(uint32_t *rambase, uint32_t addr, uint32_t *progress_addr);
096ec49b 133void GPUwriteData(uint32_t data);
134void GPUreadDataMem(uint32_t *mem, int count);
135uint32_t GPUreadData(void);
136uint32_t GPUreadStatus(void);
137void GPUwriteStatus(uint32_t data);
138long GPUfreeze(uint32_t type, struct GPUFreeze *freeze);
139void GPUupdateLace(void);
140long GPUopen(void **dpy);
141long GPUclose(void);
72e5023f 142void GPUvBlank(int is_vblank, int lcf);
096ec49b 143void GPUrearmedCallbacks(const struct rearmed_cbs *cbs_);
144
6f2ee2be 145#ifdef __cplusplus
146}
147#endif
7a8d521f 148
149#endif /* __GPULIB_GPU_H__ */