drc: add a timing hack for Internal Section
[pcsx_rearmed.git] / libpcsxcore / new_dynarec / pcsxmem_inline.c
... / ...
CommitLineData
1/*
2 * (C) GraÅžvydas "notaz" Ignotas, 2011
3 *
4 * This work is licensed under the terms of GNU GPL version 2 or later.
5 * See the COPYING file in the top-level directory.
6 */
7
8#ifndef DRC_DBG
9
10static int pcsx_direct_read(int type, u_int addr, int cc_adj, int cc, int rs, int rt)
11{
12 if ((addr & 0xfffff000) == 0x1f801000) {
13 u_int t;
14 switch (addr & 0xffff) {
15 case 0x1120: // rcnt2 count
16 if (rt < 0) goto dont_care;
17 if (cc < 0) return 0;
18 host_tempreg_acquire();
19 emit_readword(&rcnts[2].mode, HOST_TEMPREG);
20 emit_readword(&rcnts[2].cycleStart, rt);
21 emit_testimm(HOST_TEMPREG, 0x200);
22 emit_readword(&last_count, HOST_TEMPREG);
23 emit_sub(HOST_TEMPREG, rt, HOST_TEMPREG);
24 emit_add(HOST_TEMPREG, cc, HOST_TEMPREG);
25 if (cc_adj)
26 emit_addimm(HOST_TEMPREG, cc_adj, rt);
27 host_tempreg_release();
28 emit_shrne_imm(rt, 3, rt);
29 mov_loadtype_adj(type!=LOADW_STUB?type:LOADH_STUB, rt, rt);
30 goto hit;
31 case 0x1104:
32 case 0x1114:
33 case 0x1124: // rcnt mode
34 if (rt < 0) return 0;
35 t = (addr >> 4) & 3;
36 emit_readword(&rcnts[t].mode, rt);
37 host_tempreg_acquire();
38 emit_andimm(rt, ~0x1800, HOST_TEMPREG);
39 emit_writeword(HOST_TEMPREG, &rcnts[t].mode);
40 host_tempreg_release();
41 mov_loadtype_adj(type, rt, rt);
42 goto hit;
43 }
44 }
45 else {
46 if (rt < 0)
47 goto dont_care;
48 }
49
50 return 0;
51
52hit:
53 assem_debug("pcsx_direct_read %08x end\n", addr);
54 return 1;
55
56dont_care:
57 assem_debug("pcsx_direct_read %08x dummy\n", addr);
58 return 1;
59}
60
61#else
62
63static int pcsx_direct_read(int type, u_int addr, int cc_adj, int cc, int rs, int rt)
64{
65 return 0;
66}
67
68#endif
69
70// vim:shiftwidth=2:expandtab