1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * linkage_arm.s for PCSX *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2021 notaz *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
22 #include "arm_features.h"
23 #include "new_dynarec_config.h"
24 #include "assem_arm64.h"
25 #include "linkage_offsets.h"
28 #error misligned pointers
34 .type dynarec_local, %object
35 .size dynarec_local, LO_dynarec_local_size
37 .space LO_dynarec_local_size
39 #define DRC_VAR_(name, vname, size_) \
40 vname = dynarec_local + LO_##name; \
42 .type vname, %object; \
45 #define DRC_VAR(name, size_) \
46 DRC_VAR_(name, ESYM(name), size_)
48 DRC_VAR(next_interupt, 4)
49 DRC_VAR(cycle_count, 4)
50 DRC_VAR(last_count, 4)
51 DRC_VAR(pending_exception, 4)
53 DRC_VAR(branch_target, 4)
56 DRC_VAR(psxRegs, LO_psxRegs_end - LO_psxRegs)
62 DRC_VAR(reg_cop0, 128)
63 DRC_VAR(reg_cop2d, 128)
64 DRC_VAR(reg_cop2c, 128)
68 #DRC_VAR(interrupt, 4)
69 #DRC_VAR(intCycle, 256)
72 DRC_VAR(inv_code_start, 4)
73 DRC_VAR(inv_code_end, 4)
78 DRC_VAR(zeromem_ptr, 8)
79 DRC_VAR(scratch_buf_ptr, 8)
80 DRC_VAR(ram_offset, 8)
87 FUNCTION(dyna_linker):
88 /* r0 = virtual target address */
89 /* r1 = instruction to patch */
92 .size dyna_linker, .-dyna_linker
95 FUNCTION(cc_interrupt):
96 ldr w0, [rFP, #LO_last_count]
98 str wzr, [rFP, #LO_pending_exception]
99 str rCC, [rFP, #LO_cycle] /* PCSX cycles */
100 # str rCC, [rFP, #LO_reg_cop0+36] /* Count */
103 add x0, rFP, #(LO_psxRegs + 34*4) /* CP0 */
106 ldr rCC, [rFP, #LO_cycle]
107 ldr w0, [rFP, #LO_next_interupt]
108 ldr w1, [rFP, #LO_pending_exception]
109 ldr w2, [rFP, #LO_stop]
110 str w0, [rFP, #LO_last_count]
112 cbnz w2, new_dyna_leave
116 ldr w0, [rFP, #LO_pcaddr]
119 .size cc_interrupt, .-cc_interrupt
122 FUNCTION(jump_overflow_ds):
123 mov w0, #(12<<2) /* R3000E_Ov */
126 FUNCTION(jump_overflow):
130 FUNCTION(jump_break_ds):
131 mov w0, #(9<<2) /* R3000E_Bp */
134 FUNCTION(jump_break):
138 FUNCTION(jump_syscall_ds):
139 mov w0, #(8<<2) /* R3000E_Syscall */
142 FUNCTION(jump_syscall):
147 ldr w3, [rFP, #LO_last_count]
148 str w2, [rFP, #LO_pcaddr]
150 str rCC, [rFP, #LO_cycle] /* PCSX cycles */
151 add x2, rFP, #(LO_psxRegs + 34*4) /* CP0 */
154 /* note: psxException might do recursive recompiler call from it's HLE code,
155 * so be ready for this */
156 FUNCTION(jump_to_new_pc):
157 ldr w1, [rFP, #LO_next_interupt]
158 ldr rCC, [rFP, #LO_cycle]
159 ldr w0, [rFP, #LO_pcaddr]
161 str w1, [rFP, #LO_last_count]
164 .size jump_to_new_pc, .-jump_to_new_pc
166 /* stack must be aligned by 16, and include space for save_regs() use */
168 FUNCTION(new_dyna_start):
169 stp x29, x30, [sp, #-SSP_ALL]!
170 ldr w1, [x0, #LO_next_interupt]
171 ldr w2, [x0, #LO_cycle]
172 stp x19, x20, [sp, #16*1]
173 stp x21, x22, [sp, #16*2]
174 stp x23, x24, [sp, #16*3]
175 stp x25, x26, [sp, #16*4]
176 stp x27, x28, [sp, #16*5]
178 ldr w0, [rFP, #LO_pcaddr]
179 str w1, [rFP, #LO_last_count]
183 .size new_dyna_start, .-new_dyna_start
186 FUNCTION(new_dyna_leave):
187 ldr w0, [rFP, #LO_last_count]
189 str rCC, [rFP, #LO_cycle]
190 ldp x19, x20, [sp, #16*1]
191 ldp x21, x22, [sp, #16*2]
192 ldp x23, x24, [sp, #16*3]
193 ldp x25, x26, [sp, #16*4]
194 ldp x27, x28, [sp, #16*5]
195 ldp x29, x30, [sp], #SSP_ALL
197 .size new_dyna_leave, .-new_dyna_leave
199 /* --------------------------------------- */
203 .macro memhandler_pre
204 /* w0 = adddr/data, x1 = rhandler, w2 = cycles, x3 = whandler */
205 ldr w4, [rFP, #LO_last_count]
207 str w4, [rFP, #LO_cycle]
210 .macro memhandler_post
211 ldr w0, [rFP, #LO_next_interupt]
212 ldr w2, [rFP, #LO_cycle] // memhandlers can modify cc, like dma
213 str w0, [rFP, #LO_last_count]
217 FUNCTION(do_memhandler_pre):
221 FUNCTION(do_memhandler_post):
225 .macro pcsx_read_mem readop tab_shift
226 /* w0 = address, x1 = handler_tab, w2 = cycles */
227 ubfm w4, w0, #\tab_shift, #11
228 ldr x3, [x1, w4, uxtw #3]
231 \readop w0, [x3, w4, uxtw #\tab_shift]
234 stp xzr, x30, [sp, #-16]!
239 FUNCTION(jump_handler_read8):
240 add x1, x1, #0x1000/4*8 + 0x1000/2*8 /* shift to r8 part */
241 pcsx_read_mem ldrb, 0
244 FUNCTION(jump_handler_read16):
245 add x1, x1, #0x1000/4*8 /* shift to r16 part */
246 pcsx_read_mem ldrh, 1
249 FUNCTION(jump_handler_read32):
253 ldp xzr, x30, [sp], #16
256 .macro pcsx_write_mem wrtop movop tab_shift
257 /* w0 = address, w1 = data, w2 = cycles, x3 = handler_tab */
258 ubfm w4, w0, #\tab_shift, #11
259 ldr x3, [x3, w4, uxtw #3]
262 mov w0, w2 /* cycle return */
263 \wrtop w1, [x3, w4, uxtw #\tab_shift]
266 stp xzr, x30, [sp, #-16]!
267 str w0, [rFP, #LO_address] /* some handlers still need it... */
273 FUNCTION(jump_handler_write8):
274 add x3, x3, #0x1000/4*8 + 0x1000/2*8 /* shift to r8 part */
275 pcsx_write_mem strb uxtb 0
278 FUNCTION(jump_handler_write16):
279 add x3, x3, #0x1000/4*8 /* shift to r16 part */
280 pcsx_write_mem strh uxth 1
283 FUNCTION(jump_handler_write32):
284 pcsx_write_mem str mov 2
288 ldp xzr, x30, [sp], #16
291 FUNCTION(jump_handle_swl):
292 /* w0 = address, w1 = data, w2 = cycles */
293 ldr x3, [rFP, #LO_mem_wtab]
294 orr w4, wzr, w0, lsr #12
295 ldr x3, [x3, w4, uxtw #3]
300 tbz x3, #1, 10f // & 2
301 tbz x3, #0, 2f // & 1
312 tbz x3, #0, 0f // & 1
326 FUNCTION(jump_handle_swr):
327 /* w0 = address, w1 = data, w2 = cycles */
328 ldr x3, [rFP, #LO_mem_wtab]
329 orr w4, wzr, w0, lsr #12
330 ldr x3, [x3, w4, uxtw #3]
335 tbz x3, #1, 10f // & 2
336 tbz x3, #0, 2f // & 1
344 tbz x3, #0, 0f // & 1
358 FUNCTION(call_gteStall):
359 /* w0 = op_cycles, w1 = cycles */
360 ldr w2, [rFP, #LO_last_count]
361 str lr, [rFP, #LO_saved_lr]
363 str w1, [rFP, #LO_cycle]
364 add x1, rFP, #LO_psxRegs
366 ldr lr, [rFP, #LO_saved_lr]