libpcsxcore/r3000a.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
   3  *                                                                         *
   4  *   This program is free software; you can redistribute it and/or modify  *
   5  *   it under the terms of the GNU General Public License as published by  *
   6  *   the Free Software Foundation; either version 2 of the License, or     *
   7  *   (at your option) any later version.                                   *
   8  *                                                                         *
   9  *   This program is distributed in the hope that it will be useful,       *
  10  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  11  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  12  *   GNU General Public License for more details.                          *
  13  *                                                                         *
  14  *   You should have received a copy of the GNU General Public License     *
  15  *   along with this program; if not, write to the                         *
  16  *   Free Software Foundation, Inc.,                                       *
  17  *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
  18  ***************************************************************************/
  19
  20 /*
  21 * R3000A CPU functions.
  22 */
  23
  24 #include "r3000a.h"
  25 #include "cdrom.h"
  26 #include "mdec.h"
  27 #include "gte.h"
  28
  29 R3000Acpu *psxCpu = NULL;
  30 #ifdef DRC_DISABLE
  31 psxRegisters psxRegs;
  32 #endif
  33
  34 int psxInit() {
  35         SysPrintf(_("Running PCSX Version %s (%s).\n"), PACKAGE_VERSION, __DATE__);
  36
  37 #ifndef DRC_DISABLE
  38         if (Config.Cpu == CPU_INTERPRETER) {
  39                 psxCpu = &psxInt;
  40         } else psxCpu = &psxRec;
  41 #else
  42         psxCpu = &psxInt;
  43 #endif
  44
  45         Log = 0;
  46
  47         if (psxMemInit() == -1) return -1;
  48
  49         return psxCpu->Init();
  50 }
  51
  52 void psxReset() {
  53         psxMemReset();
  54
  55         memset(&psxRegs, 0, sizeof(psxRegs));
  56
  57         psxRegs.pc = 0xbfc00000; // Start in bootstrap
  58
  59         psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
  60         psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
  61
  62         psxCpu->Reset();
  63
  64         psxHwReset();
  65         psxBiosInit();
  66
  67         if (!Config.HLE)
  68                 psxExecuteBios();
  69
  70 #ifdef EMU_LOG
  71         EMU_LOG("*BIOS END*\n");
  72 #endif
  73         Log = 0;
  74 }
  75
  76 void psxShutdown() {
  77         psxMemShutdown();
  78         psxBiosShutdown();
  79
  80         psxCpu->Shutdown();
  81 }
  82
  83 void psxException(u32 code, u32 bd) {
  84         if (!Config.HLE && ((((psxRegs.code = PSXMu32(psxRegs.pc)) >> 24) & 0xfe) == 0x4a)) {
  85                 // "hokuto no ken" / "Crash Bandicot 2" ...
  86                 // BIOS does not allow to return to GTE instructions
  87                 // (just skips it, supposedly because it's scheduled already)
  88                 // so we execute it here
  89                 extern void (*psxCP2[64])(void *cp2regs);
  90                 psxCP2[psxRegs.code & 0x3f](&psxRegs.CP2D);
  91         }
  92
  93         // Set the Cause
  94         psxRegs.CP0.n.Cause = (psxRegs.CP0.n.Cause & 0x300) | code;
  95
  96         // Set the EPC & PC
  97         if (bd) {
  98 #ifdef PSXCPU_LOG
  99                 PSXCPU_LOG("bd set!!!\n");
 100 #endif
 101                 SysPrintf("bd set!!!\n");
 102                 psxRegs.CP0.n.Cause |= 0x80000000;
 103                 psxRegs.CP0.n.EPC = (psxRegs.pc - 4);
 104         } else
 105                 psxRegs.CP0.n.EPC = (psxRegs.pc);
 106
 107         if (psxRegs.CP0.n.Status & 0x400000)
 108                 psxRegs.pc = 0xbfc00180;
 109         else
 110                 psxRegs.pc = 0x80000080;
 111
 112         // Set the Status
 113         psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status &~0x3f) |
 114                                                   ((psxRegs.CP0.n.Status & 0xf) << 2);
 115
 116         if (Config.HLE) psxBiosException();
 117 }
 118
 119 void psxBranchTest() {
 120         if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
 121                 psxRcntUpdate();
 122
 123         if (psxRegs.interrupt) {
 124                 if ((psxRegs.interrupt & (1 << PSXINT_SIO)) && !Config.Sio) { // sio
 125                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) {
 126                                 psxRegs.interrupt &= ~(1 << PSXINT_SIO);
 127                                 sioInterrupt();
 128                         }
 129                 }
 130                 if (psxRegs.interrupt & (1 << PSXINT_CDR)) { // cdr
 131                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDR].sCycle) >= psxRegs.intCycle[PSXINT_CDR].cycle) {
 132                                 psxRegs.interrupt &= ~(1 << PSXINT_CDR);
 133                                 cdrInterrupt();
 134                         }
 135                 }
 136                 if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read
 137                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) {
 138                                 psxRegs.interrupt &= ~(1 << PSXINT_CDREAD);
 139                                 cdrReadInterrupt();
 140                         }
 141                 }
 142                 if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma
 143                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUDMA].cycle) {
 144                                 psxRegs.interrupt &= ~(1 << PSXINT_GPUDMA);
 145                                 gpuInterrupt();
 146                         }
 147                 }
 148                 if (psxRegs.interrupt & (1 << PSXINT_MDECOUTDMA)) { // mdec out dma
 149                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle) {
 150                                 psxRegs.interrupt &= ~(1 << PSXINT_MDECOUTDMA);
 151                                 mdec1Interrupt();
 152                         }
 153                 }
 154                 if (psxRegs.interrupt & (1 << PSXINT_SPUDMA)) { // spu dma
 155                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_SPUDMA].cycle) {
 156                                 psxRegs.interrupt &= ~(1 << PSXINT_SPUDMA);
 157                                 spuInterrupt();
 158                         }
 159                 }
 160                 if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in
 161                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) {
 162                                 psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA);
 163                                 mdec0Interrupt();
 164                         }
 165                 }
 166                 if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc
 167                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) {
 168                                 psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA);
 169                                 gpuotcInterrupt();
 170                         }
 171                 }
 172                 if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom
 173                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) {
 174                                 psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA);
 175                                 cdrDmaInterrupt();
 176                         }
 177                 }
 178                 if (psxRegs.interrupt & (1 << PSXINT_CDRPLAY)) { // cdr play timing
 179                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRPLAY].sCycle) >= psxRegs.intCycle[PSXINT_CDRPLAY].cycle) {
 180                                 psxRegs.interrupt &= ~(1 << PSXINT_CDRPLAY);
 181                                 cdrPlayInterrupt();
 182                         }
 183                 }
 184                 if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states
 185                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) {
 186                                 psxRegs.interrupt &= ~(1 << PSXINT_CDRLID);
 187                                 cdrLidSeekInterrupt();
 188                         }
 189                 }
 190                 if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update
 191                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) {
 192                                 psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE);
 193                                 spuUpdate();
 194                         }
 195                 }
 196         }
 197
 198         if (psxHu32(0x1070) & psxHu32(0x1074)) {
 199                 if ((psxRegs.CP0.n.Status & 0x401) == 0x401) {
 200 #ifdef PSXCPU_LOG
 201                         PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074));
 202 #endif
 203 //                      SysPrintf("Interrupt (%x): %x %x\n", psxRegs.cycle, psxHu32(0x1070), psxHu32(0x1074));
 204                         psxException(0x400, 0);
 205                 }
 206         }
 207 }
 208
 209 void psxJumpTest() {
 210         if (!Config.HLE && Config.PsxOut) {
 211                 u32 call = psxRegs.GPR.n.t1 & 0xff;
 212                 switch (psxRegs.pc & 0x1fffff) {
 213                         case 0xa0:
 214 #ifdef PSXBIOS_LOG
 215                                 if (call != 0x28 && call != 0xe) {
 216                                         PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
 217 #endif
 218                                 if (biosA0[call])
 219                                         biosA0[call]();
 220                                 break;
 221                         case 0xb0:
 222 #ifdef PSXBIOS_LOG
 223                                 if (call != 0x17 && call != 0xb) {
 224                                         PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
 225 #endif
 226                                 if (biosB0[call])
 227                                         biosB0[call]();
 228                                 break;
 229                         case 0xc0:
 230 #ifdef PSXBIOS_LOG
 231                                 PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
 232 #endif
 233                                 if (biosC0[call])
 234                                         biosC0[call]();
 235                                 break;
 236                 }
 237         }
 238 }
 239
 240 void psxExecuteBios() {
 241         while (psxRegs.pc != 0x80030000)
 242                 psxCpu->ExecuteBlock();
 243 }
 244