drc: starting arm64 support

[pcsx_rearmed.git] / libpcsxcore / gte_neon.S

diff --git a/libpcsxcore/gte_neon.S b/libpcsxcore/gte_neon.S
index 3c71f55..7d97ff3 100644 (file)
--- a/libpcsxcore/gte_neon.S
+++ b/libpcsxcore/gte_neon.S
@@ -6,29 +6,12 @@
  */
 
 #include "arm_features.h"
+#include "new_dynarec/linkage_offsets.h"
 
 .syntax unified
-
-.bss
-.align 6 @ cacheline
-
-scratch:
-.rept 8*8*2/4
-    .word 0
-.endr
-
 .text
 .align 2
 
-.macro ldr_scratch rd
-#ifndef __PIC__
-    movw        \rd, #:lower16:scratch
-    movt        \rd, #:upper16:scratch
-#else
-    ldr         \rd, =scratch
-#endif
-.endm
-
 @ XXX: gteMAC calc shouldn't be saturating, but it is here
 
 @ approximate gteMAC|123 flags
@@ -150,7 +133,7 @@ FUNCTION(gteRTPS_neon): @ r0=CP2 (d,c),
     push        {r4-r6,lr}
 
 @    fmrx        r4, fpscr      @ vmrs? at least 40 cycle hit
-    ldr_scratch r1
+    ldr                r1, [r0, #LO_cop2_to_scratch_buf]
     mov         r12, #0
 
     vldmia      r0, {d8}       @ VXYZ(0)
@@ -302,12 +285,12 @@ FUNCTION(gteRTPS_neon): @ r0=CP2 (d,c),
 FUNCTION(gteRTPT_neon): @ r0=CP2 (d,c),
     push        {r4-r11,lr}
 
-    ldr_scratch r1
+    ldr                r1, [r0, #LO_cop2_to_scratch_buf]
     mov         r12, #0
 
     rtpx_preload
 
-    vmov.i32    d22, #0x7fffffff
+    vmvn.i32    d22, #0x80000000 @ #0x7fffffff
     vmov.i32    d23, #0x80000000
     mov         r3, #3         @ counter
     mov         r2, r0         @ VXYZ(0)