+++ /dev/null
-/* Cpudetection lib \r
- * Copyright (C) 2002-2003 Pcsx2 Team\r
- *\r
- * This program is free software; you can redistribute it and/or modify\r
- * it under the terms of the GNU General Public License as published by\r
- * the Free Software Foundation; either version 2 of the License, or\r
- * (at your option) any later version.\r
- *\r
- * This program is distributed in the hope that it will be useful,\r
- * but WITHOUT ANY WARRANTY; without even the implied warranty of\r
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
- * GNU General Public License for more details.\r
- *\r
- * You should have received a copy of the GNU General Public License\r
- * along with this program; if not, write to the Free Software\r
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA\r
- */\r
-#if defined (_WIN32)\r
-#include <windows.h>\r
-#endif\r
-\r
-#include <string.h>\r
-#include <stdio.h>\r
-\r
-#include "ix86-64.h"\r
-\r
-#if defined (_MSC_VER) && _MSC_VER >= 1400\r
-\r
- void __cpuid(int* CPUInfo, int InfoType);\r
- unsigned __int64 __rdtsc();\r
-\r
- #pragma intrinsic(__cpuid)\r
- #pragma intrinsic(__rdtsc)\r
-\r
-#endif\r
-\r
-CAPABILITIES cpucaps;\r
-CPUINFO cpuinfo;\r
-\r
-#define cpuid(cmd,a,b,c,d) \\r
- __asm__ __volatile__("cpuid" \\r
- : "=a" (a), "=b" (b), "=c" (c), "=d" (d) : "0" (cmd))\r
-\r
-static s32 iCpuId( u32 cmd, u32 *regs ) \r
-{\r
- int flag=1;\r
-\r
-#if defined (_MSC_VER) && _MSC_VER >= 1400\r
-\r
- __cpuid( regs, cmd );\r
-\r
- return 0;\r
-\r
-#elif defined (_MSC_VER) \r
-\r
-#ifdef __x86_64__\r
- assert(0);\r
-#else // __x86_64__\r
- __asm \r
- {\r
- push ebx;\r
- push edi;\r
-\r
- pushfd;\r
- pop eax;\r
- mov edx, eax;\r
- xor eax, 1 << 21;\r
- push eax;\r
- popfd;\r
- pushfd;\r
- pop eax;\r
- xor eax, edx;\r
- mov flag, eax;\r
- }\r
- if ( ! flag )\r
- {\r
- return -1;\r
- }\r
-\r
- __asm \r
- {\r
- mov eax, cmd;\r
- cpuid;\r
- mov edi, [regs]\r
- mov [edi], eax;\r
- mov [edi+4], ebx;\r
- mov [edi+8], ecx;\r
- mov [edi+12], edx;\r
-\r
- pop edi;\r
- pop ebx;\r
- }\r
-#endif // __x86_64__\r
- return 0;\r
-\r
-\r
-#else\r
-\r
-#ifndef __x86_64__\r
- // see if we can use cpuid\r
- __asm__ __volatile__ (\r
- "sub $0x18, %%esp\n"\r
- "pushf\n"\r
- "pop %%eax\n"\r
- "mov %%eax, %%edx\n"\r
- "xor $0x200000, %%eax\n"\r
- "push %%eax\n"\r
- "popf\n"\r
- "pushf\n"\r
- "pop %%eax\n"\r
- "xor %%edx, %%eax\n"\r
- "mov %%eax, %0\n"\r
- "add $0x18, %%esp\n"\r
- : "=r"(flag) :\r
- );\r
-#endif\r
-\r
- if ( !flag )\r
- return -1;\r
-\r
- cpuid(cmd, regs[0], regs[1], regs[2], regs[3]);\r
- return 0;\r
-#endif // _MSC_VER\r
-}\r
-\r
-u64 GetCPUTick( void ) \r
-{\r
-#if defined (_MSC_VER) && _MSC_VER >= 1400\r
-\r
- return __rdtsc();\r
-\r
-#elif defined(__MSCW32__) && !defined(__x86_64__)\r
-\r
- __asm rdtsc;\r
-\r
-#else\r
-\r
- u32 _a, _d;\r
- __asm__ __volatile__ ("rdtsc" : "=a"(_a), "=d"(_d));\r
- return (u64)_a | ((u64)_d << 32);\r
-\r
-#endif\r
-}\r
-\r
-#if defined __LINUX__\r
-\r
-#include <sys/time.h>\r
-#include <errno.h>\r
-//*\r
-unsigned long timeGetTime2()\r
-{\r
- struct timeval tv;\r
- gettimeofday(&tv, 0); // well, maybe there are better ways\r
- return (unsigned long)tv.tv_sec * 1000 + tv.tv_usec/1000; // to do that, but at least it works\r
-}\r
-//*/\r
-#endif\r
-\r
-s64 CPUSpeedHz( unsigned int time )\r
-{\r
- s64 timeStart, \r
- timeStop;\r
- s64 startTick, \r
- endTick;\r
- s64 overhead;\r
-\r
- if( ! cpucaps.hasTimeStampCounter )\r
- {\r
- return 0; //check if function is supported\r
- }\r
-\r
- overhead = GetCPUTick() - GetCPUTick();\r
- \r
- timeStart = timeGetTime2( );\r
- while( timeGetTime2( ) == timeStart ) \r
- {\r
- timeStart = timeGetTime2( );\r
- }\r
- for(;;)\r
- {\r
- timeStop = timeGetTime2( );\r
- if ( ( timeStop - timeStart ) > 1 ) \r
- {\r
- startTick = GetCPUTick( );\r
- break;\r
- }\r
- }\r
-\r
- timeStart = timeStop;\r
- for(;;)\r
- {\r
- timeStop = timeGetTime2( );\r
- if ( ( timeStop - timeStart ) > time ) \r
- {\r
- endTick = GetCPUTick( );\r
- break;\r
- }\r
- }\r
-\r
- return (s64)( ( endTick - startTick ) + ( overhead ) );\r
-}\r
-\r
-////////////////////////////////////////////////////\r
-void cpudetectInit( void ) \r
-{\r
- u32 regs[ 4 ];\r
- u32 cmds;\r
- u32 AMDspeed;\r
- s8 AMDspeedString[10];\r
- int cputype=0; // Cpu type\r
- //AMD 64 STUFF\r
- u32 x86_64_8BITBRANDID;\r
- u32 x86_64_12BITBRANDID; \r
- memset( cpuinfo.x86ID, 0, sizeof( cpuinfo.x86ID ) );\r
- cpuinfo.x86Family = 0;\r
- cpuinfo.x86Model = 0;\r
- cpuinfo.x86PType = 0;\r
- cpuinfo.x86StepID = 0;\r
- cpuinfo.x86Flags = 0;\r
- cpuinfo.x86EFlags = 0;\r
- \r
- if ( iCpuId( 0, regs ) == -1 ) return;\r
-\r
- cmds = regs[ 0 ];\r
- ((u32*)cpuinfo.x86ID)[ 0 ] = regs[ 1 ];\r
- ((u32*)cpuinfo.x86ID)[ 1 ] = regs[ 3 ];\r
- ((u32*)cpuinfo.x86ID)[ 2 ] = regs[ 2 ];\r
- if ( cmds >= 0x00000001 ) \r
- {\r
- if ( iCpuId( 0x00000001, regs ) != -1 )\r
- {\r
- cpuinfo.x86StepID = regs[ 0 ] & 0xf;\r
- cpuinfo.x86Model = (regs[ 0 ] >> 4) & 0xf;\r
- cpuinfo.x86Family = (regs[ 0 ] >> 8) & 0xf;\r
- cpuinfo.x86PType = (regs[ 0 ] >> 12) & 0x3;\r
- x86_64_8BITBRANDID = regs[1] & 0xff;\r
- cpuinfo.x86Flags = regs[ 3 ];\r
- }\r
- }\r
- if ( iCpuId( 0x80000000, regs ) != -1 )\r
- {\r
- cmds = regs[ 0 ];\r
- if ( cmds >= 0x80000001 ) \r
- {\r
- if ( iCpuId( 0x80000001, regs ) != -1 )\r
- {\r
- x86_64_12BITBRANDID = regs[1] & 0xfff;\r
- cpuinfo.x86EFlags = regs[ 3 ];\r
- \r
- }\r
- }\r
- }\r
- switch(cpuinfo.x86PType)\r
- {\r
- case 0:\r
- strcpy( cpuinfo.x86Type, "Standard OEM");\r
- break;\r
- case 1:\r
- strcpy( cpuinfo.x86Type, "Overdrive");\r
- break;\r
- case 2:\r
- strcpy( cpuinfo.x86Type, "Dual");\r
- break;\r
- case 3:\r
- strcpy( cpuinfo.x86Type, "Reserved");\r
- break;\r
- default:\r
- strcpy( cpuinfo.x86Type, "Unknown");\r
- break;\r
- }\r
- if ( cpuinfo.x86ID[ 0 ] == 'G' ){ cputype=0;}//trick lines but if you know a way better ;p\r
- if ( cpuinfo.x86ID[ 0 ] == 'A' ){ cputype=1;}\r
- \r
- if ( cputype == 0 ) //intel cpu\r
- {\r
- if( ( cpuinfo.x86Family >= 7 ) && ( cpuinfo.x86Family < 15 ) )\r
- {\r
- strcpy( cpuinfo.x86Fam, "Intel P6 family (Not PIV and Higher then PPro" );\r
- }\r
- else\r
- {\r
- switch( cpuinfo.x86Family )\r
- { \r
- // Start at 486 because if it's below 486 there is no cpuid instruction\r
- case 4:\r
- strcpy( cpuinfo.x86Fam, "Intel 486" );\r
- break;\r
- case 5: \r
- switch( cpuinfo.x86Model )\r
- {\r
- case 4:\r
- case 8: // 0.25 µm\r
- strcpy( cpuinfo.x86Fam, "Intel Pentium (MMX)");\r
- break;\r
- default:\r
- strcpy( cpuinfo.x86Fam, "Intel Pentium" );\r
- }\r
- break;\r
- case 6: \r
- switch( cpuinfo.x86Model )\r
- {\r
- case 0: // Pentium pro (P6 A-Step)\r
- case 1: // Pentium pro\r
- strcpy( cpuinfo.x86Fam, "Intel Pentium Pro" );\r
- break;\r
-\r
- case 2: // 66 MHz FSB\r
- case 5: // Xeon/Celeron (0.25 µm)\r
- case 6: // Internal L2 cache\r
- strcpy( cpuinfo.x86Fam, "Intel Pentium II" );\r
- break;\r
-\r
- case 7: // Xeon external L2 cache\r
- case 8: // Xeon/Celeron with 256 KB on-die L2 cache\r
- case 10: // Xeon/Celeron with 1 or 2 MB on-die L2 cache\r
- case 11: // Xeon/Celeron with Tualatin core, on-die cache\r
- strcpy( cpuinfo.x86Fam, "Intel Pentium III" );\r
- break;\r
- case 15: // Core 2 Duo Allendale/Conroe\r
- strcpy( cpuinfo.x86Fam, "Intel Core 2 Duo" );\r
- break;\r
-\r
- default:\r
- strcpy( cpuinfo.x86Fam, "Intel Pentium Pro (Unknown)" );\r
- }\r
- break;\r
- case 15:\r
- switch( cpuinfo.x86Model )\r
- {\r
- case 0: // Willamette (A-Step)\r
- case 1: // Willamette \r
- strcpy( cpuinfo.x86Fam, "Willamette Intel Pentium IV" );\r
- break;\r
- case 2: // Northwood \r
- strcpy( cpuinfo.x86Fam, "Northwood Intel Pentium IV" );\r
- break;\r
-\r
- default:\r
- strcpy( cpuinfo.x86Fam, "Intel Pentium IV (Unknown)" );\r
- break;\r
- }\r
- break;\r
- default:\r
- strcpy( cpuinfo.x86Fam, "Unknown Intel CPU" );\r
- }\r
- }\r
- }\r
- else if ( cputype == 1 ) //AMD cpu\r
- {\r
- if( cpuinfo.x86Family >= 7 )\r
- {\r
- if((x86_64_12BITBRANDID !=0) || (x86_64_8BITBRANDID !=0))\r
- {\r
- if(x86_64_8BITBRANDID == 0 )\r
- {\r
- switch((x86_64_12BITBRANDID >>6)& 0x3f)\r
- {\r
- case 4:\r
- strcpy(cpuinfo.x86Fam,"AMD Athlon(tm) 64 Processor");\r
- AMDspeed = 22 + (x86_64_12BITBRANDID & 0x1f);\r
- //AMDspeedString = strtol(AMDspeed, (char**)NULL,10);\r
- sprintf(AMDspeedString," %d",AMDspeed);\r
- strcat(AMDspeedString,"00+");\r
- strcat(cpuinfo.x86Fam,AMDspeedString);\r
- break;\r
- case 12: \r
- strcpy(cpuinfo.x86Fam,"AMD Opteron(tm) Processor");\r
- break;\r
- case 5:\r
- strcpy( cpuinfo.x86Fam, "AMD Athlon X2 Processor" );\r
- AMDspeed = 22 + (x86_64_12BITBRANDID & 0x1f);\r
- //AMDspeedString = strtol(AMDspeed, (char**)NULL,10);\r
- sprintf(AMDspeedString," %d",AMDspeed);\r
- strcat(AMDspeedString,"00+");\r
- strcat(cpuinfo.x86Fam,AMDspeedString);\r
- break;\r
- case 44:\r
- strcpy( cpuinfo.x86Fam, "AMD Opteron(tm) Dual Core Processor" );\r
- break;\r
- default:\r
- strcpy(cpuinfo.x86Fam,"Unknown AMD 64 proccesor");\r
- \r
- }\r
- }\r
- else //8bit brand id is non zero\r
- {\r
- strcpy(cpuinfo.x86Fam,"Unsupported yet AMD64 cpu");\r
- }\r
- }\r
- else\r
- { \r
- strcpy( cpuinfo.x86Fam, "AMD K7+ Processor" );\r
- }\r
- }\r
- else\r
- {\r
- switch ( cpuinfo.x86Family )\r
- {\r
- case 4:\r
- switch( cpuinfo.x86Model )\r
- {\r
- case 14: \r
- case 15: // Write-back enhanced\r
- strcpy( cpuinfo.x86Fam, "AMD 5x86 Processor" );\r
- break;\r
-\r
- case 3: // DX2\r
- case 7: // Write-back enhanced DX2\r
- case 8: // DX4\r
- case 9: // Write-back enhanced DX4\r
- strcpy( cpuinfo.x86Fam, "AMD 486 Processor" );\r
- break;\r
- \r
-\r
- default:\r
- strcpy( cpuinfo.x86Fam, "AMD Unknown Processor" );\r
-\r
- }\r
- break;\r
-\r
- case 5: \r
- switch( cpuinfo.x86Model)\r
- {\r
- case 0: // SSA 5 (75, 90 and 100 Mhz)\r
- case 1: // 5k86 (PR 120 and 133 MHz)\r
- case 2: // 5k86 (PR 166 MHz)\r
- case 3: // K5 5k86 (PR 200 MHz)\r
- strcpy( cpuinfo.x86Fam, "AMD K5 Processor" );\r
- break;\r
-\r
- case 6: \r
- case 7: // (0.25 µm)\r
- case 8: // K6-2\r
- case 9: // K6-III\r
- case 14: // K6-2+ / K6-III+\r
- strcpy( cpuinfo.x86Fam, "AMD K6 Series Processor" );\r
- break;\r
-\r
- default:\r
- strcpy( cpuinfo.x86Fam, "AMD Unknown Processor" );\r
- }\r
- break;\r
- case 6: \r
- strcpy( cpuinfo.x86Fam, "AMD Athlon XP Processor" );\r
- break;\r
- default:\r
- strcpy( cpuinfo.x86Fam, "Unknown AMD CPU" ); \r
- }\r
- }\r
- }\r
- //capabilities\r
- cpucaps.hasFloatingPointUnit = ( cpuinfo.x86Flags >> 0 ) & 1;\r
- cpucaps.hasVirtual8086ModeEnhancements = ( cpuinfo.x86Flags >> 1 ) & 1;\r
- cpucaps.hasDebuggingExtensions = ( cpuinfo.x86Flags >> 2 ) & 1;\r
- cpucaps.hasPageSizeExtensions = ( cpuinfo.x86Flags >> 3 ) & 1;\r
- cpucaps.hasTimeStampCounter = ( cpuinfo.x86Flags >> 4 ) & 1;\r
- cpucaps.hasModelSpecificRegisters = ( cpuinfo.x86Flags >> 5 ) & 1;\r
- cpucaps.hasPhysicalAddressExtension = ( cpuinfo.x86Flags >> 6 ) & 1;\r
- cpucaps.hasMachineCheckArchitecture = ( cpuinfo.x86Flags >> 7 ) & 1;\r
- cpucaps.hasCOMPXCHG8BInstruction = ( cpuinfo.x86Flags >> 8 ) & 1;\r
- cpucaps.hasAdvancedProgrammableInterruptController = ( cpuinfo.x86Flags >> 9 ) & 1;\r
- cpucaps.hasSEPFastSystemCall = ( cpuinfo.x86Flags >> 11 ) & 1;\r
- cpucaps.hasMemoryTypeRangeRegisters = ( cpuinfo.x86Flags >> 12 ) & 1;\r
- cpucaps.hasPTEGlobalFlag = ( cpuinfo.x86Flags >> 13 ) & 1;\r
- cpucaps.hasMachineCheckArchitecture = ( cpuinfo.x86Flags >> 14 ) & 1;\r
- cpucaps.hasConditionalMoveAndCompareInstructions = ( cpuinfo.x86Flags >> 15 ) & 1;\r
- cpucaps.hasFGPageAttributeTable = ( cpuinfo.x86Flags >> 16 ) & 1;\r
- cpucaps.has36bitPageSizeExtension = ( cpuinfo.x86Flags >> 17 ) & 1;\r
- cpucaps.hasProcessorSerialNumber = ( cpuinfo.x86Flags >> 18 ) & 1;\r
- cpucaps.hasCFLUSHInstruction = ( cpuinfo.x86Flags >> 19 ) & 1;\r
- cpucaps.hasDebugStore = ( cpuinfo.x86Flags >> 21 ) & 1;\r
- cpucaps.hasACPIThermalMonitorAndClockControl = ( cpuinfo.x86Flags >> 22 ) & 1;\r
- cpucaps.hasMultimediaExtensions = ( cpuinfo.x86Flags >> 23 ) & 1; //mmx\r
- cpucaps.hasFastStreamingSIMDExtensionsSaveRestore = ( cpuinfo.x86Flags >> 24 ) & 1;\r
- cpucaps.hasStreamingSIMDExtensions = ( cpuinfo.x86Flags >> 25 ) & 1; //sse\r
- cpucaps.hasStreamingSIMD2Extensions = ( cpuinfo.x86Flags >> 26 ) & 1; //sse2\r
- cpucaps.hasSelfSnoop = ( cpuinfo.x86Flags >> 27 ) & 1;\r
- cpucaps.hasHyperThreading = ( cpuinfo.x86Flags >> 28 ) & 1;\r
- cpucaps.hasThermalMonitor = ( cpuinfo.x86Flags >> 29 ) & 1;\r
- cpucaps.hasIntel64BitArchitecture = ( cpuinfo.x86Flags >> 30 ) & 1;\r
- //that is only for AMDs\r
- cpucaps.hasMultimediaExtensionsExt = ( cpuinfo.x86EFlags >> 22 ) & 1; //mmx2\r
- cpucaps.hasAMD64BitArchitecture = ( cpuinfo.x86EFlags >> 29 ) & 1; //64bit cpu\r
- cpucaps.has3DNOWInstructionExtensionsExt = ( cpuinfo.x86EFlags >> 30 ) & 1; //3dnow+\r
- cpucaps.has3DNOWInstructionExtensions = ( cpuinfo.x86EFlags >> 31 ) & 1; //3dnow \r
- cpuinfo.cpuspeed = (u32 )(CPUSpeedHz( 1000 ) / 1000000);\r
-}\r
notaz.gp2x.de / pcsx_rearmed.git / blobdiff