/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* Mupen64plus/PCSX - assem_arm.c *
* Copyright (C) 2009-2011 Ari64 *
- * Copyright (C) 2010-2011 Gražvydas "notaz" Ignotas *
+ * Copyright (C) 2010-2021 Gražvydas "notaz" Ignotas *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
-#include "../gte.h"
#define FLAGLESS
#include "../gte.h"
#undef FLAGLESS
#include "pcnt.h"
#include "arm_features.h"
-#if defined(BASE_ADDR_FIXED)
-#elif defined(BASE_ADDR_DYNAMIC)
-u_char *translation_cache;
-#else
-u_char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
-#endif
-
-#ifndef __MACH__
-#define CALLER_SAVE_REGS 0x100f
-#else
-#define CALLER_SAVE_REGS 0x120f
-#endif
-
-#define unused __attribute__((unused))
-
#ifdef DRC_DBG
#pragma GCC diagnostic ignored "-Wunused-function"
#pragma GCC diagnostic ignored "-Wunused-variable"
0,
0};
-static u_int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
-
/* Linker */
static void set_jump_target(void *addr, void *target_)
// get address that insn one after stub loads (dyna_linker arg1),
// treat it as a pointer to branch insn,
// return addr where that branch jumps to
+#if 0
static void *get_pointer(void *stub)
{
//printf("get_pointer(%x)\n",(int)stub);
int *i_ptr=find_extjump_insn(stub);
- assert((*i_ptr&0x0f000000)==0x0a000000);
+ assert((*i_ptr&0x0f000000)==0x0a000000); // b
return (u_char *)i_ptr+((*i_ptr<<8)>>6)+8;
}
-
-// Find the "clean" entry point from a "dirty" entry point
-// by skipping past the call to verify_code
-static void *get_clean_addr(void *addr)
-{
- signed int *ptr = addr;
- #ifndef HAVE_ARMV7
- ptr+=4;
- #else
- ptr+=6;
- #endif
- if((*ptr&0xFF000000)!=0xeb000000) ptr++;
- assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
- ptr++;
- if((*ptr&0xFF000000)==0xea000000) {
- return (char *)ptr+((*ptr<<8)>>6)+8; // follow jump
- }
- return ptr;
-}
-
-static int verify_dirty(const u_int *ptr)
-{
- #ifndef HAVE_ARMV7
- u_int offset;
- // get from literal pool
- assert((*ptr&0xFFFF0000)==0xe59f0000);
- offset=*ptr&0xfff;
- u_int source=*(u_int*)((void *)ptr+offset+8);
- ptr++;
- assert((*ptr&0xFFFF0000)==0xe59f0000);
- offset=*ptr&0xfff;
- u_int copy=*(u_int*)((void *)ptr+offset+8);
- ptr++;
- assert((*ptr&0xFFFF0000)==0xe59f0000);
- offset=*ptr&0xfff;
- u_int len=*(u_int*)((void *)ptr+offset+8);
- ptr++;
- ptr++;
- #else
- // ARMv7 movw/movt
- assert((*ptr&0xFFF00000)==0xe3000000);
- u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
- u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
- u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
- ptr+=6;
- #endif
- if((*ptr&0xFF000000)!=0xeb000000) ptr++;
- assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
- //printf("verify_dirty: %x %x %x\n",source,copy,len);
- return !memcmp((void *)source,(void *)copy,len);
-}
-
-// This doesn't necessarily find all clean entry points, just
-// guarantees that it's not dirty
-static int isclean(void *addr)
-{
- #ifndef HAVE_ARMV7
- u_int *ptr=((u_int *)addr)+4;
- #else
- u_int *ptr=((u_int *)addr)+6;
- #endif
- if((*ptr&0xFF000000)!=0xeb000000) ptr++;
- if((*ptr&0xFF000000)!=0xeb000000) return 1; // bl instruction
- if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code) return 0;
- if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code_ds) return 0;
- return 1;
-}
-
-// get source that block at addr was compiled from (host pointers)
-static void get_bounds(void *addr, u_char **start, u_char **end)
-{
- u_int *ptr = addr;
- #ifndef HAVE_ARMV7
- u_int offset;
- // get from literal pool
- assert((*ptr&0xFFFF0000)==0xe59f0000);
- offset=*ptr&0xfff;
- u_int source=*(u_int*)((void *)ptr+offset+8);
- ptr++;
- //assert((*ptr&0xFFFF0000)==0xe59f0000);
- //offset=*ptr&0xfff;
- //u_int copy=*(u_int*)((void *)ptr+offset+8);
- ptr++;
- assert((*ptr&0xFFFF0000)==0xe59f0000);
- offset=*ptr&0xfff;
- u_int len=*(u_int*)((void *)ptr+offset+8);
- ptr++;
- ptr++;
- #else
- // ARMv7 movw/movt
- assert((*ptr&0xFFF00000)==0xe3000000);
- u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
- //u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
- u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
- ptr+=6;
- #endif
- if((*ptr&0xFF000000)!=0xeb000000) ptr++;
- assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
- *start=(u_char *)source;
- *end=(u_char *)source+len;
-}
+#endif
// Allocate a specific ARM register.
static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
}
}
- cur->regmap[hr]=reg;
- cur->dirty&=~(1<<hr);
- cur->dirty|=dirty<<hr;
- cur->isconst&=~(1<<hr);
+ assert(n == hr || cur->regmap[hr] < 0 || !((cur->noevict >> hr) & 1));
+ cur->regmap[hr] = reg;
+ cur->dirty &= ~(1 << hr);
+ cur->dirty |= dirty << hr;
+ cur->isconst &= ~(1u << hr);
+ cur->noevict |= 1u << hr;
}
// Alloc cycle count into dedicated register
-static void alloc_cc(struct regstat *cur,int i)
+static void alloc_cc(struct regstat *cur, int i)
{
- alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
+ alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
+}
+
+static void alloc_cc_optional(struct regstat *cur, int i)
+{
+ if (cur->regmap[HOST_CCREG] < 0) {
+ alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
+ cur->noevict &= ~(1u << HOST_CCREG);
+ }
}
/* Assembler */
output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
}
+static void emit_adds(int rs1,int rs2,int rt)
+{
+ assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
+}
+#define emit_adds_ptr emit_adds
+
static void emit_adcs(int rs1,int rs2,int rt)
{
assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
}
+static void emit_negs(int rs, int rt)
+{
+ assem_debug("rsbs %s,%s,#0\n",regname[rt],regname[rs]);
+ output_w32(0xe2700000|rd_rn_rm(rt,rs,0));
+}
+
static void emit_sub(int rs1,int rs2,int rt)
{
assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
}
+static void emit_subs(int rs1,int rs2,int rt)
+{
+ assem_debug("subs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe0500000|rd_rn_rm(rt,rs1,rs2));
+}
+
static void emit_zeroreg(int rt)
{
assem_debug("mov %s,#0\n",regname[rt]);
output_w32(0xe5900000|rd_rn_rm(rt,15,0));
}
+#ifdef HAVE_ARMV7
static void emit_movw(u_int imm,u_int rt)
{
assert(imm<65536);
assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
}
+#endif
static void emit_movimm(u_int imm,u_int rt)
{
static void emit_loadreg(int r, int hr)
{
- if(r&64) {
- SysPrintf("64bit load in 32bit mode!\n");
- assert(0);
- return;
- }
- if((r&63)==0)
+ assert(hr != EXCLUDE_REG);
+ if (r == 0)
emit_zeroreg(hr);
else {
- int addr = (int)&psxRegs.GPR.r[r];
+ void *addr;
switch (r) {
//case HIREG: addr = &hi; break;
//case LOREG: addr = &lo; break;
- case CCREG: addr = (int)&cycle_count; break;
- case CSREG: addr = (int)&Status; break;
- case INVCP: addr = (int)&invc_ptr; break;
- default: assert(r < 34); break;
+ case CCREG: addr = &cycle_count; break;
+ case INVCP: addr = &invc_ptr; break;
+ case ROREG: addr = &ram_offset; break;
+ default:
+ assert(r < 34);
+ addr = &psxRegs.GPR.r[r];
+ break;
}
- u_int offset = addr-(u_int)&dynarec_local;
+ u_int offset = (u_char *)addr - (u_char *)&dynarec_local;
assert(offset<4096);
- assem_debug("ldr %s,fp+%d\n",regname[hr],offset);
+ assem_debug("ldr %s,fp+%d # r%d\n",regname[hr],offset,r);
output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
}
}
static void emit_storereg(int r, int hr)
{
- if(r&64) {
- SysPrintf("64bit store in 32bit mode!\n");
- assert(0);
- return;
- }
+ assert(hr != EXCLUDE_REG);
int addr = (int)&psxRegs.GPR.r[r];
switch (r) {
//case HIREG: addr = &hi; break;
}
u_int offset = addr-(u_int)&dynarec_local;
assert(offset<4096);
- assem_debug("str %s,fp+%d\n",regname[hr],offset);
+ assem_debug("str %s,fp+%d # r%d\n",regname[hr],offset,r);
output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
}
output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
}
+static void emit_mvneq(int rs,int rt)
+{
+ assem_debug("mvneq %s,%s\n",regname[rt],regname[rs]);
+ output_w32(0x01e00000|rd_rn_rm(rt,0,rs));
+}
+
static void emit_and(u_int rs1,u_int rs2,u_int rt)
{
assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
else if(rs!=rt) emit_mov(rs,rt);
}
-static void emit_addimm_and_set_flags(int imm,int rt)
+static void emit_addimm_ptr(u_int rs, uintptr_t imm, u_int rt)
+{
+ emit_addimm(rs, imm, rt);
+}
+
+static void emit_addimm_and_set_flags3(u_int rs, int imm, u_int rt)
{
assert(imm>-65536&&imm<65536);
u_int armval;
- if(genimm(imm,&armval)) {
- assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm);
- output_w32(0xe2900000|rd_rn_rm(rt,rt,0)|armval);
- }else if(genimm(-imm,&armval)) {
- assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],imm);
- output_w32(0xe2500000|rd_rn_rm(rt,rt,0)|armval);
- }else if(imm<0) {
- assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF00);
+ if (genimm(imm, &armval)) {
+ assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rs],imm);
+ output_w32(0xe2900000|rd_rn_rm(rt,rs,0)|armval);
+ } else if (genimm(-imm, &armval)) {
+ assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rs],imm);
+ output_w32(0xe2500000|rd_rn_rm(rt,rs,0)|armval);
+ } else if (rs != rt) {
+ emit_movimm(imm, rt);
+ emit_adds(rs, rt, rt);
+ } else if (imm < 0) {
+ assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
- output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)>>8,8));
+ output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
output_w32(0xe2500000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
- }else{
- assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF00);
+ } else {
+ assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
- output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm>>8,8));
+ output_w32(0xe2800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
}
}
-static void emit_addimm_no_flags(u_int imm,u_int rt)
+static void emit_addimm_and_set_flags(int imm, u_int rt)
{
- emit_addimm(rt,imm,rt);
+ emit_addimm_and_set_flags3(rt, imm, rt);
}
static void emit_addnop(u_int r)
output_w32(0x23a00000|rd_rn_rm(rt,0,0)|armval);
}
-static void emit_cmovne_reg(int rs,int rt)
+static void emit_cmovs_imm(int imm,int rt)
+{
+ assem_debug("movmi %s,#%d\n",regname[rt],imm);
+ u_int armval;
+ genimm_checked(imm,&armval);
+ output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
+}
+
+static unused void emit_cmovne_reg(int rs,int rt)
{
assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
}
+static void emit_cmovb_reg(int rs,int rt)
+{
+ assem_debug("movcc %s,%s\n",regname[rt],regname[rs]);
+ output_w32(0x31a00000|rd_rn_rm(rt,0,rs));
+}
+
static void emit_cmovs_reg(int rs,int rt)
{
assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
}
+static void emit_cmpcs(int rs,int rt)
+{
+ assem_debug("cmpcs %s,%s\n",regname[rs],regname[rt]);
+ output_w32(0x21500000|rd_rn_rm(0,rs,rt));
+}
+
static void emit_set_gz32(int rs, int rt)
{
//assem_debug("set_gz32\n");
emit_cmovb_imm(1,rt);
}
+static int can_jump_or_call(const void *a)
+{
+ intptr_t offset = (u_char *)a - out - 8;
+ return (-33554432 <= offset && offset < 33554432);
+}
+
static void emit_call(const void *a_)
{
int a = (int)a_;
output_w32(0xaa000000|offset);
}
+static void emit_jo(const void *a_)
+{
+ int a = (int)a_;
+ assem_debug("bvs %x\n",a);
+ u_int offset=genjmp(a);
+ output_w32(0x6a000000|offset);
+}
+
static void emit_jno(const void *a_)
{
int a = (int)a_;
output_w32(0x3a000000|offset);
}
+static void *emit_cbz(int rs, const void *a)
+{
+ void *ret;
+ emit_test(rs, rs);
+ ret = out;
+ emit_jeq(a);
+ return ret;
+}
+
static unused void emit_callreg(u_int r)
{
assert(r<15);
assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
}
+#define emit_readptr_dualindexedx_ptrlen emit_readword_dualindexedx4
+
+static void emit_ldr_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("ldr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2));
+}
static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
{
output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
}
+static void emit_ldrb_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("ldrb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2));
+}
+
static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
}
+static void emit_ldrsb_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("ldrsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe19000d0|rd_rn_rm(rt,rs1,rs2));
+}
+
static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
}
+static void emit_ldrh_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("ldrh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe19000b0|rd_rn_rm(rt,rs1,rs2));
+}
+
static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
}
+static void emit_ldrsh_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("ldrsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe19000f0|rd_rn_rm(rt,rs1,rs2));
+}
+
static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
}
+static void emit_str_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("str %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2));
+}
+
+static void emit_strb_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("strb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2));
+}
+
+static void emit_strh_dualindexed(int rs1, int rs2, int rt)
+{
+ assem_debug("strh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0xe18000b0|rd_rn_rm(rt,rs1,rs2));
+}
+
static void emit_movsbl_indexed(int offset, int rs, int rt)
{
assert(offset>-256&&offset<256);
{
uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
assert(offset<4096);
- assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
+ assem_debug("ldr %s,fp+%#x%s\n", regname[rt], offset, fpofs_name(offset));
output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
}
+#define emit_readptr emit_readword
static void emit_writeword_indexed(int rt, int offset, int rs)
{
{
uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
assert(offset<4096);
- assem_debug("str %s,fp+%d\n",regname[rt],offset);
+ assem_debug("str %s,fp+%#x%s\n", regname[rt], offset, fpofs_name(offset));
output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
}
}
// special case for checking invalid_code
-static void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
+static void emit_ldrb_indexedsr12_reg(int base, int r, int rt)
{
- assert(imm<128&&imm>=0);
- assert(r>=0&&r<16);
- assem_debug("ldrb lr,%s,%s lsr #12\n",regname[base],regname[r]);
- output_w32(0xe7d00000|rd_rn_rm(HOST_TEMPREG,base,r)|0x620);
- emit_cmpimm(HOST_TEMPREG,imm);
+ assem_debug("ldrb %s,%s,%s lsr #12\n",regname[rt],regname[base],regname[r]);
+ output_w32(0xe7d00000|rd_rn_rm(rt,base,r)|0x620);
}
static void emit_callne(int a)
output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
}
-static void emit_andne_imm(int rs,int imm,int rt)
-{
- u_int armval;
- genimm_checked(imm,&armval);
- assem_debug("andne %s,%s,#%d\n",regname[rt],regname[rs],imm);
- output_w32(0x12000000|rd_rn_rm(rt,rs,0)|armval);
-}
-
static unused void emit_addpl_imm(int rs,int imm,int rt)
{
u_int armval;
}
// parsed by get_pointer, find_extjump_insn
-static void emit_extjump2(u_char *addr, u_int target, void *linker)
+static void emit_extjump(u_char *addr, u_int target)
{
u_char *ptr=(u_char *)addr;
assert((ptr[3]&0x0e)==0xa);
emit_loadlp(target,0);
emit_loadlp((u_int)addr,1);
- assert(addr>=translation_cache&&addr<(translation_cache+(1<<TARGET_SIZE_2)));
- //assert((target>=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
-//DEBUG >
-#ifdef DEBUG_CYCLE_COUNT
- emit_readword(&last_count,ECX);
- emit_add(HOST_CCREG,ECX,HOST_CCREG);
- emit_readword(&next_interupt,ECX);
- emit_writeword(HOST_CCREG,&Count);
- emit_sub(HOST_CCREG,ECX,HOST_CCREG);
- emit_writeword(ECX,&last_count);
-#endif
-//DEBUG <
- emit_jmp(linker);
+ assert(ndrc->translation_cache <= addr &&
+ addr < ndrc->translation_cache + sizeof(ndrc->translation_cache));
+ emit_far_jump(dyna_linker);
}
static void check_extjump2(void *src)
enum stub_type type=stubs[n].type;
int i=stubs[n].a;
int rs=stubs[n].b;
- struct regstat *i_regs=(struct regstat *)stubs[n].c;
+ const struct regstat *i_regs=(struct regstat *)stubs[n].c;
u_int reglist=stubs[n].e;
- signed char *i_regmap=i_regs->regmap;
+ const signed char *i_regmap=i_regs->regmap;
int rt;
- if(itype[i]==C1LS||itype[i]==C2LS||itype[i]==LOADLR) {
+ if(dops[i].itype==C2LS||dops[i].itype==LOADLR) {
rt=get_reg(i_regmap,FTEMP);
}else{
- rt=get_reg(i_regmap,rt1[i]);
+ rt=get_reg(i_regmap,dops[i].rt1);
}
assert(rs>=0);
int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
temp=r; break;
}
}
- if(rt>=0&&rt1[i]!=0)
+ if(rt>=0&&dops[i].rt1!=0)
reglist&=~(1<<rt);
if(temp==-1) {
save_regs(reglist);
emit_shrimm(rs,12,temp2);
emit_readword_dualindexedx4(temp,temp2,temp2);
emit_lsls_imm(temp2,1,temp2);
- if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
+ if(dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
switch(type) {
case LOADB_STUB: emit_ldrccsb_dualindexed(temp2,rs,rt); break;
case LOADBU_STUB: emit_ldrccb_dualindexed(temp2,rs,rt); break;
int cc=get_reg(i_regmap,CCREG);
if(cc<0)
emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d+1),2);
- emit_call(handler);
- if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
+ emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
+ emit_far_call(handler);
+#if 0
+ if (type == LOADW_STUB) {
+ // new cycle_count returned in r2
+ emit_addimm(2, -(int)stubs[n].d, cc<0?2:cc);
+ if (cc < 0)
+ emit_storereg(CCREG, 2);
+ }
+#endif
+ if(dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
mov_loadtype_adj(type,0,rt);
}
if(restore_jump)
emit_jmp(stubs[n].retaddr); // return address
}
-static void inline_readstub(enum stub_type type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
+static void inline_readstub(enum stub_type type, int i, u_int addr,
+ const signed char regmap[], int target, int adj, u_int reglist)
{
- int rs=get_reg(regmap,target);
- int rt=get_reg(regmap,target);
- if(rs<0) rs=get_reg(regmap,-1);
- assert(rs>=0);
- u_int is_dynamic,far_call=0;
+ int ra = cinfo[i].addr;
+ int rt = get_reg(regmap,target);
+ assert(ra >= 0);
+ u_int is_dynamic;
uintptr_t host_addr = 0;
void *handler;
int cc=get_reg(regmap,CCREG);
- if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj+1),cc,target?rs:-1,rt))
+ if(pcsx_direct_read(type,addr,adj,cc,target?ra:-1,rt))
return;
handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
if (handler == NULL) {
- if(rt<0||rt1[i]==0)
+ if(rt<0||dops[i].rt1==0)
return;
if(addr!=host_addr)
- emit_movimm_from(addr,rs,host_addr,rs);
+ emit_movimm_from(addr,ra,host_addr,ra);
switch(type) {
- case LOADB_STUB: emit_movsbl_indexed(0,rs,rt); break;
- case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
- case LOADH_STUB: emit_movswl_indexed(0,rs,rt); break;
- case LOADHU_STUB: emit_movzwl_indexed(0,rs,rt); break;
- case LOADW_STUB: emit_readword_indexed(0,rs,rt); break;
+ case LOADB_STUB: emit_movsbl_indexed(0,ra,rt); break;
+ case LOADBU_STUB: emit_movzbl_indexed(0,ra,rt); break;
+ case LOADH_STUB: emit_movswl_indexed(0,ra,rt); break;
+ case LOADHU_STUB: emit_movzwl_indexed(0,ra,rt); break;
+ case LOADW_STUB: emit_readword_indexed(0,ra,rt); break;
default: assert(0);
}
return;
}
// call a memhandler
- if(rt>=0&&rt1[i]!=0)
+ if(rt>=0&&dops[i].rt1!=0)
reglist&=~(1<<rt);
save_regs(reglist);
if(target==0)
emit_movimm(addr,0);
- else if(rs!=0)
- emit_mov(rs,0);
- int offset=(u_char *)handler-out-8;
- if(offset<-33554432||offset>=33554432) {
- // unreachable memhandler, a plugin func perhaps
- emit_movimm((u_int)handler,12);
- far_call=1;
- }
+ else if(ra!=0)
+ emit_mov(ra,0);
if(cc<0)
emit_loadreg(CCREG,2);
if(is_dynamic) {
emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1);
- emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
+ emit_addimm(cc<0?2:cc,adj,2);
}
else {
emit_readword(&last_count,3);
- emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
+ emit_addimm(cc<0?2:cc,adj,2);
emit_add(2,3,2);
- emit_writeword(2,&Count);
+ emit_writeword(2,&psxRegs.cycle);
}
- if(far_call)
- emit_callreg(12);
- else
- emit_call(handler);
+ emit_far_call(handler);
- if(rt>=0&&rt1[i]!=0) {
+#if 0
+ if (type == LOADW_STUB) {
+ // new cycle_count returned in r2
+ emit_addimm(2, -adj, cc<0?2:cc);
+ if (cc < 0)
+ emit_storereg(CCREG, 2);
+ }
+#endif
+ if(rt>=0&&dops[i].rt1!=0) {
switch(type) {
case LOADB_STUB: emit_signextend8(0,rt); break;
case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
enum stub_type type=stubs[n].type;
int i=stubs[n].a;
int rs=stubs[n].b;
- struct regstat *i_regs=(struct regstat *)stubs[n].c;
+ const struct regstat *i_regs=(struct regstat *)stubs[n].c;
u_int reglist=stubs[n].e;
- signed char *i_regmap=i_regs->regmap;
+ const signed char *i_regmap=i_regs->regmap;
int rt,r;
- if(itype[i]==C1LS||itype[i]==C2LS) {
+ if(dops[i].itype==C2LS) {
rt=get_reg(i_regmap,r=FTEMP);
}else{
- rt=get_reg(i_regmap,r=rs2[i]);
+ rt=get_reg(i_regmap,r=dops[i].rs2);
}
assert(rs>=0);
assert(rt>=0);
int cc=get_reg(i_regmap,CCREG);
if(cc<0)
emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d+1),2);
- // returns new cycle_count
- emit_call(handler);
- emit_addimm(0,-CLOCK_ADJUST((int)stubs[n].d+1),cc<0?2:cc);
+ emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
+ emit_far_call(handler);
+ // new cycle_count returned in r2
+ emit_addimm(2,-(int)stubs[n].d,cc<0?2:cc);
if(cc<0)
emit_storereg(CCREG,2);
if(restore_jump)
emit_jmp(stubs[n].retaddr);
}
-static void inline_writestub(enum stub_type type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
+static void inline_writestub(enum stub_type type, int i, u_int addr,
+ const signed char regmap[], int target, int adj, u_int reglist)
{
- int rs=get_reg(regmap,-1);
- int rt=get_reg(regmap,target);
- assert(rs>=0);
+ int ra = cinfo[i].addr;
+ int rt = get_reg(regmap, target);
+ assert(ra>=0);
assert(rt>=0);
uintptr_t host_addr = 0;
void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
if (handler == NULL) {
if(addr!=host_addr)
- emit_movimm_from(addr,rs,host_addr,rs);
+ emit_movimm_from(addr,ra,host_addr,ra);
switch(type) {
- case STOREB_STUB: emit_writebyte_indexed(rt,0,rs); break;
- case STOREH_STUB: emit_writehword_indexed(rt,0,rs); break;
- case STOREW_STUB: emit_writeword_indexed(rt,0,rs); break;
+ case STOREB_STUB: emit_writebyte_indexed(rt,0,ra); break;
+ case STOREH_STUB: emit_writehword_indexed(rt,0,ra); break;
+ case STOREW_STUB: emit_writeword_indexed(rt,0,ra); break;
default: assert(0);
}
return;
// call a memhandler
save_regs(reglist);
- pass_args(rs,rt);
+ pass_args(ra,rt);
int cc=get_reg(regmap,CCREG);
if(cc<0)
emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
+ emit_addimm(cc<0?2:cc,adj,2);
emit_movimm((u_int)handler,3);
- // returns new cycle_count
- emit_call(jump_handler_write_h);
- emit_addimm(0,-CLOCK_ADJUST(adj+1),cc<0?2:cc);
+ emit_far_call(jump_handler_write_h);
+ // new cycle_count returned in r2
+ emit_addimm(2,-adj,cc<0?2:cc);
if(cc<0)
emit_storereg(CCREG,2);
restore_regs(reglist);
}
-// this output is parsed by verify_dirty, get_bounds, isclean, get_clean_addr
-static void do_dirty_stub_emit_args(u_int arg0)
-{
- #ifndef HAVE_ARMV7
- emit_loadlp((int)source, 1);
- emit_loadlp((int)copy, 2);
- emit_loadlp(slen*4, 3);
- #else
- emit_movw(((u_int)source)&0x0000FFFF, 1);
- emit_movw(((u_int)copy)&0x0000FFFF, 2);
- emit_movt(((u_int)source)&0xFFFF0000, 1);
- emit_movt(((u_int)copy)&0xFFFF0000, 2);
- emit_movw(slen*4, 3);
- #endif
- emit_movimm(arg0, 0);
-}
-
-static void *do_dirty_stub(int i)
-{
- assem_debug("do_dirty_stub %x\n",start+i*4);
- do_dirty_stub_emit_args(start + i*4);
- emit_call(verify_code);
- void *entry = out;
- load_regs_entry(i);
- if (entry == out)
- entry = instr_addr[i];
- emit_jmp(instr_addr[i]);
- return entry;
-}
-
-static void do_dirty_stub_ds()
-{
- do_dirty_stub_emit_args(start + 1);
- emit_call(verify_code_ds);
-}
-
/* Special assem */
-static void c2op_prologue(u_int op,u_int reglist)
+static void c2op_prologue(u_int op, int i, const struct regstat *i_regs, u_int reglist)
{
save_regs_all(reglist);
+ cop2_do_stall_check(op, i, i_regs, 0);
#ifdef PCNT
- emit_movimm(op,0);
- emit_call(pcnt_gte_start);
+ emit_movimm(op, 0);
+ emit_far_call(pcnt_gte_start);
#endif
- emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0); // cop2 regs
+ emit_addimm(FP, (u_char *)&psxRegs.CP2D.r[0] - (u_char *)&dynarec_local, 0); // cop2 regs
}
static void c2op_epilogue(u_int op,u_int reglist)
{
#ifdef PCNT
emit_movimm(op,0);
- emit_call(pcnt_gte_end);
+ emit_far_call(pcnt_gte_end);
#endif
restore_regs_all(reglist);
}
static void c2op_call_MACtoIR(int lm,int need_flags)
{
if(need_flags)
- emit_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
+ emit_far_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
else
- emit_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
+ emit_far_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
}
static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
{
- emit_call(func);
+ emit_far_call(func);
// func is C code and trashes r0
emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
if(need_flags||need_ir)
c2op_call_MACtoIR(lm,need_flags);
- emit_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
+ emit_far_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
}
-static void c2op_assemble(int i,struct regstat *i_regs)
+static void c2op_assemble(int i, const struct regstat *i_regs)
{
- u_int c2op=source[i]&0x3f;
- u_int hr,reglist_full=0,reglist;
- int need_flags,need_ir;
- for(hr=0;hr<HOST_REGS;hr++) {
- if(i_regs->regmap[hr]>=0) reglist_full|=1<<hr;
- }
- reglist=reglist_full&CALLER_SAVE_REGS;
+ u_int c2op = source[i] & 0x3f;
+ u_int reglist_full = get_host_reglist(i_regs->regmap);
+ u_int reglist = reglist_full & CALLER_SAVE_REGS;
+ int need_flags, need_ir;
if (gte_handlers[c2op]!=NULL) {
need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works
need_ir=(gte_unneeded[i+1]&0xe00)!=0xe00;
assem_debug("gte op %08x, unneeded %016llx, need_flags %d, need_ir %d\n",
source[i],gte_unneeded[i+1],need_flags,need_ir);
- if(new_dynarec_hacks&NDHACK_GTE_NO_FLAGS)
+ if(HACK_ENABLED(NDHACK_GTE_NO_FLAGS))
need_flags=0;
int shift = (source[i] >> 19) & 1;
int lm = (source[i] >> 10) & 1;
int cv = (source[i] >> 13) & 3;
int mx = (source[i] >> 17) & 3;
reglist=reglist_full&(CALLER_SAVE_REGS|0xf0); // +{r4-r7}
- c2op_prologue(c2op,reglist);
+ c2op_prologue(c2op,i,i_regs,reglist);
/* r4,r5 = VXYZ(v) packed; r6 = &MX11(mx); r7 = &CV1(cv) */
if(v<3)
emit_ldrd(v*8,0,4);
emit_readword(&zeromem_ptr,7);
#ifdef __ARM_NEON__
emit_movimm(source[i],1); // opcode
- emit_call(gteMVMVA_part_neon);
+ emit_far_call(gteMVMVA_part_neon);
if(need_flags) {
emit_movimm(lm,1);
- emit_call(gteMACtoIR_flags_neon);
+ emit_far_call(gteMACtoIR_flags_neon);
}
#else
if(cv==3&&shift)
- emit_call((int)gteMVMVA_part_cv3sh12_arm);
+ emit_far_call(gteMVMVA_part_cv3sh12_arm);
else {
emit_movimm(shift,1);
- emit_call((int)(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm));
+ emit_far_call(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm);
}
if(need_flags||need_ir)
c2op_call_MACtoIR(lm,need_flags);
#endif
#else /* if not HAVE_ARMV5 */
- c2op_prologue(c2op,reglist);
+ c2op_prologue(c2op,i,i_regs,reglist);
emit_movimm(source[i],1); // opcode
emit_writeword(1,&psxRegs.code);
- emit_call((int)(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]));
+ emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
#endif
break;
}
case GTE_OP:
- c2op_prologue(c2op,reglist);
- emit_call(shift?gteOP_part_shift:gteOP_part_noshift);
+ c2op_prologue(c2op,i,i_regs,reglist);
+ emit_far_call(shift?gteOP_part_shift:gteOP_part_noshift);
if(need_flags||need_ir) {
emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
c2op_call_MACtoIR(lm,need_flags);
}
break;
case GTE_DPCS:
- c2op_prologue(c2op,reglist);
+ c2op_prologue(c2op,i,i_regs,reglist);
c2op_call_rgb_func(shift?gteDPCS_part_shift:gteDPCS_part_noshift,lm,need_ir,need_flags);
break;
case GTE_INTPL:
- c2op_prologue(c2op,reglist);
+ c2op_prologue(c2op,i,i_regs,reglist);
c2op_call_rgb_func(shift?gteINTPL_part_shift:gteINTPL_part_noshift,lm,need_ir,need_flags);
break;
case GTE_SQR:
- c2op_prologue(c2op,reglist);
- emit_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
+ c2op_prologue(c2op,i,i_regs,reglist);
+ emit_far_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
if(need_flags||need_ir) {
emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
c2op_call_MACtoIR(lm,need_flags);
}
break;
case GTE_DCPL:
- c2op_prologue(c2op,reglist);
+ c2op_prologue(c2op,i,i_regs,reglist);
c2op_call_rgb_func(gteDCPL_part,lm,need_ir,need_flags);
break;
case GTE_GPF:
- c2op_prologue(c2op,reglist);
+ c2op_prologue(c2op,i,i_regs,reglist);
c2op_call_rgb_func(shift?gteGPF_part_shift:gteGPF_part_noshift,lm,need_ir,need_flags);
break;
case GTE_GPL:
- c2op_prologue(c2op,reglist);
+ c2op_prologue(c2op,i,i_regs,reglist);
c2op_call_rgb_func(shift?gteGPL_part_shift:gteGPL_part_noshift,lm,need_ir,need_flags);
break;
#endif
default:
- c2op_prologue(c2op,reglist);
+ c2op_prologue(c2op,i,i_regs,reglist);
#ifdef DRC_DBG
emit_movimm(source[i],1); // opcode
emit_writeword(1,&psxRegs.code);
#endif
- emit_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
+ emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
break;
}
c2op_epilogue(c2op,reglist);
static void do_mfc2_31_one(u_int copr,signed char temp)
{
emit_readword(®_cop2d[copr],temp);
- emit_testimm(temp,0x8000); // do we need this?
- emit_andne_imm(temp,0,temp);
- emit_cmpimm(temp,0xf80);
- emit_andimm(temp,0xf80,temp);
- emit_cmovae_imm(0xf80,temp);
+ emit_lsls_imm(temp,16,temp);
+ emit_cmovs_imm(0,temp);
+ emit_cmpimm(temp,0xf80<<16);
+ emit_andimm(temp,0xf80<<16,temp);
+ emit_cmovae_imm(0xf80<<16,temp);
}
static void c2op_mfc2_29_assemble(signed char tl, signed char temp)
temp = HOST_TEMPREG;
}
do_mfc2_31_one(9,temp);
- emit_shrimm(temp,7,tl);
+ emit_shrimm(temp,7+16,tl);
do_mfc2_31_one(10,temp);
- emit_orrshr_imm(temp,2,tl);
+ emit_orrshr_imm(temp,2+16,tl);
do_mfc2_31_one(11,temp);
- emit_orrshl_imm(temp,3,tl);
+ emit_orrshr_imm(temp,-3+16,tl);
emit_writeword(tl,®_cop2d[29]);
if (temp == HOST_TEMPREG)
host_tempreg_release();
}
-static void multdiv_assemble_arm(int i,struct regstat *i_regs)
+static void multdiv_assemble_arm(int i, const struct regstat *i_regs)
{
// case 0x18: MULT
// case 0x19: MULTU
// case 0x1A: DIV
// case 0x1B: DIVU
- // case 0x1C: DMULT
- // case 0x1D: DMULTU
- // case 0x1E: DDIV
- // case 0x1F: DDIVU
- if(rs1[i]&&rs2[i])
+ if(dops[i].rs1&&dops[i].rs2)
{
- if((opcode2[i]&4)==0) // 32-bit
+ switch (dops[i].opcode2)
{
- if(opcode2[i]==0x18) // MULT
+ case 0x18: // MULT
{
- signed char m1=get_reg(i_regs->regmap,rs1[i]);
- signed char m2=get_reg(i_regs->regmap,rs2[i]);
+ signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
+ signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
signed char hi=get_reg(i_regs->regmap,HIREG);
signed char lo=get_reg(i_regs->regmap,LOREG);
assert(m1>=0);
assert(lo>=0);
emit_smull(m1,m2,hi,lo);
}
- if(opcode2[i]==0x19) // MULTU
+ break;
+ case 0x19: // MULTU
{
- signed char m1=get_reg(i_regs->regmap,rs1[i]);
- signed char m2=get_reg(i_regs->regmap,rs2[i]);
+ signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
+ signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
signed char hi=get_reg(i_regs->regmap,HIREG);
signed char lo=get_reg(i_regs->regmap,LOREG);
assert(m1>=0);
assert(lo>=0);
emit_umull(m1,m2,hi,lo);
}
- if(opcode2[i]==0x1A) // DIV
+ break;
+ case 0x1A: // DIV
{
- signed char d1=get_reg(i_regs->regmap,rs1[i]);
- signed char d2=get_reg(i_regs->regmap,rs2[i]);
- assert(d1>=0);
- assert(d2>=0);
+ signed char d1=get_reg(i_regs->regmap,dops[i].rs1);
+ signed char d2=get_reg(i_regs->regmap,dops[i].rs2);
signed char quotient=get_reg(i_regs->regmap,LOREG);
signed char remainder=get_reg(i_regs->regmap,HIREG);
+ void *jaddr_div0;
+ assert(d1>=0);
+ assert(d2>=0);
assert(quotient>=0);
assert(remainder>=0);
emit_movs(d1,remainder);
emit_negmi(quotient,quotient); // .. quotient and ..
emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump)
emit_movs(d2,HOST_TEMPREG);
- emit_jeq(out+52); // Division by zero
+ jaddr_div0 = out;
+ emit_jeq(0); // Division by zero
emit_negsmi(HOST_TEMPREG,HOST_TEMPREG);
#ifdef HAVE_ARMV5
emit_clz(HOST_TEMPREG,quotient);
- emit_shl(HOST_TEMPREG,quotient,HOST_TEMPREG);
+ emit_shl(HOST_TEMPREG,quotient,HOST_TEMPREG); // shifted divisor
#else
emit_movimm(0,quotient);
emit_addpl_imm(quotient,1,quotient);
emit_jcc(out-16); // -4
emit_teq(d1,d2);
emit_negmi(quotient,quotient);
+ set_jump_target(jaddr_div0, out);
emit_test(d1,d1);
emit_negmi(remainder,remainder);
}
- if(opcode2[i]==0x1B) // DIVU
+ break;
+ case 0x1B: // DIVU
{
- signed char d1=get_reg(i_regs->regmap,rs1[i]); // dividend
- signed char d2=get_reg(i_regs->regmap,rs2[i]); // divisor
- assert(d1>=0);
- assert(d2>=0);
+ signed char d1=get_reg(i_regs->regmap,dops[i].rs1); // dividend
+ signed char d2=get_reg(i_regs->regmap,dops[i].rs2); // divisor
signed char quotient=get_reg(i_regs->regmap,LOREG);
signed char remainder=get_reg(i_regs->regmap,HIREG);
+ void *jaddr_div0;
+ assert(d1>=0);
+ assert(d2>=0);
assert(quotient>=0);
assert(remainder>=0);
emit_mov(d1,remainder);
emit_movimm(0xffffffff,quotient); // div0 case
emit_test(d2,d2);
- emit_jeq(out+40); // Division by zero
+ jaddr_div0 = out;
+ emit_jeq(0); // Division by zero
#ifdef HAVE_ARMV5
emit_clz(d2,HOST_TEMPREG);
emit_movimm(1<<31,quotient);
emit_adcs(quotient,quotient,quotient);
emit_shrcc_imm(d2,1,d2);
emit_jcc(out-16); // -4
+ set_jump_target(jaddr_div0, out);
}
+ break;
}
- else // 64-bit
- assert(0);
}
else
{
- // Multiply by zero is zero.
- // MIPS does not have a divide by zero exception.
- // The result is undefined, we return zero.
signed char hr=get_reg(i_regs->regmap,HIREG);
signed char lr=get_reg(i_regs->regmap,LOREG);
- if(hr>=0) emit_zeroreg(hr);
- if(lr>=0) emit_zeroreg(lr);
+ if ((dops[i].opcode2==0x1A || dops[i].opcode2==0x1B) && dops[i].rs2==0) // div 0
+ {
+ if (dops[i].rs1) {
+ signed char numerator = get_reg(i_regs->regmap, dops[i].rs1);
+ assert(numerator >= 0);
+ if (hr < 0)
+ hr = HOST_TEMPREG;
+ emit_movs(numerator, hr);
+ if (lr >= 0) {
+ if (dops[i].opcode2 == 0x1A) { // DIV
+ emit_movimm(0xffffffff, lr);
+ emit_negmi(lr, lr);
+ }
+ else
+ emit_movimm(~0, lr);
+ }
+ }
+ else {
+ if (hr >= 0) emit_zeroreg(hr);
+ if (lr >= 0) emit_movimm(~0,lr);
+ }
+ }
+ else if ((dops[i].opcode2==0x1A || dops[i].opcode2==0x1B) && dops[i].rs1==0)
+ {
+ signed char denominator = get_reg(i_regs->regmap, dops[i].rs2);
+ assert(denominator >= 0);
+ if (hr >= 0) emit_zeroreg(hr);
+ if (lr >= 0) {
+ emit_zeroreg(lr);
+ emit_test(denominator, denominator);
+ emit_mvneq(lr, lr);
+ }
+ }
+ else
+ {
+ // Multiply by zero is zero.
+ if (hr >= 0) emit_zeroreg(hr);
+ if (lr >= 0) emit_zeroreg(lr);
+ }
}
}
#define multdiv_assemble multdiv_assemble_arm
static void do_jump_vaddr(int rs)
{
- emit_jmp(jump_vaddr_reg[rs]);
+ emit_far_jump(jump_vaddr_reg[rs]);
}
static void do_preload_rhash(int r) {
#endif
}
-static void mark_clear_cache(void *target)
-{
- u_long offset = (u_char *)target - translation_cache;
- u_int mask = 1u << ((offset >> 12) & 31);
- if (!(needs_clear_cache[offset >> 17] & mask)) {
- char *start = (char *)((u_long)target & ~4095ul);
- start_tcache_write(start, start + 4096);
- needs_clear_cache[offset >> 17] |= mask;
- }
-}
-
-// Clearing the cache is rather slow on ARM Linux, so mark the areas
-// that need to be cleared, and then only clear these areas once.
-static void do_clear_cache()
-{
- int i,j;
- for (i=0;i<(1<<(TARGET_SIZE_2-17));i++)
- {
- u_int bitmap=needs_clear_cache[i];
- if(bitmap) {
- u_char *start, *end;
- for(j=0;j<32;j++)
- {
- if(bitmap&(1<<j)) {
- start=translation_cache+i*131072+j*4096;
- end=start+4095;
- j++;
- while(j<32) {
- if(bitmap&(1<<j)) {
- end+=4096;
- j++;
- }else{
- end_tcache_write(start, end);
- break;
- }
- }
- }
- }
- needs_clear_cache[i]=0;
- }
- }
-}
-
// CPU-architecture-specific initialization
-static void arch_init() {
+static void arch_init(void)
+{
+ uintptr_t diff = (u_char *)&ndrc->tramp.f - (u_char *)&ndrc->tramp.ops - 8;
+ struct tramp_insns *ops = ndrc->tramp.ops;
+ size_t i;
+ assert(!(diff & 3));
+ assert(diff < 0x1000);
+ start_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
+ for (i = 0; i < ARRAY_SIZE(ndrc->tramp.ops); i++)
+ ops[i].ldrpc = 0xe5900000 | rd_rn_rm(15,15,0) | diff; // ldr pc, [=val]
+ end_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
}
// vim:shiftwidth=2:expandtab
notaz.gp2x.de / pcsx_rearmed.git / blobdiff