drc: further hacks, hle handling

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / assem_arm.c

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 697585c..4bddd8c 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -205,7 +205,7 @@ int verify_dirty(int addr)
   #endif
   if((*ptr&0xFF000000)!=0xeb000000) ptr++;
   assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
-  u_int verifier=(int)ptr+((*ptr<<8)>>6)+8; // get target of bl
+  u_int verifier=(int)ptr+((signed int)(*ptr<<8)>>6)+8; // get target of bl
   if(verifier==(u_int)verify_code_vm||verifier==(u_int)verify_code_ds) {
     unsigned int page=source>>12;
     unsigned int map_value=memory_map[page];
@@ -258,7 +258,7 @@ void get_bounds(int addr,u_int *start,u_int *end)
   #endif
   if((*ptr&0xFF000000)!=0xeb000000) ptr++;
   assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
-  u_int verifier=(int)ptr+((*ptr<<8)>>6)+8; // get target of bl
+  u_int verifier=(int)ptr+((signed int)(*ptr<<8)>>6)+8; // get target of bl
   if(verifier==(u_int)verify_code_vm||verifier==(u_int)verify_code_ds) {
     if(memory_map[source>>12]>=0x80000000) source = 0;
     else source = source+(memory_map[source>>12]<<2);
@@ -3174,7 +3174,12 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
       else
         inline_readstub(LOADW_STUB,i,(constmap[i][s]+offset)&0xFFFFFFFC,i_regs->regmap,FTEMP,ccadj[i],reglist);
       emit_andimm(temp,24,temp);
-      if (opcode[i]==0x26) emit_xorimm(temp,24,temp); // LWR
+#ifdef BIG_ENDIAN_MIPS
+      if (opcode[i]==0x26) // LWR
+#else
+      if (opcode[i]==0x22) // LWL
+#endif
+        emit_xorimm(temp,24,temp);
       emit_movimm(-1,HOST_TEMPREG);
       if (opcode[i]==0x26) {
         emit_shr(temp2,temp,temp2);
@@ -3187,6 +3192,7 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
       //emit_storereg(rt1[i],tl); // DEBUG
     }
     if (opcode[i]==0x1A||opcode[i]==0x1B) { // LDL/LDR
+      // FIXME: little endian
       int temp2h=get_reg(i_regs->regmap,FTEMP|64);
       if(!c||memtarget) {
         //if(th>=0) emit_readword_indexed((int)rdram-0x80000000,temp2,temp2h);
@@ -3236,12 +3242,11 @@ void cop0_assemble(int i,struct regstat *i_regs)
     char copr=(source[i]>>11)&0x1f;
     //assert(t>=0); // Why does this happen?  OOT is weird
     if(t>=0) {
-#ifdef MUPEN64 /// FIXME
+#ifdef MUPEN64
       emit_addimm(FP,(int)&fake_pc-(int)&dynarec_local,0);
       emit_movimm((source[i]>>11)&0x1f,1);
       emit_writeword(0,(int)&PC);
       emit_writebyte(1,(int)&(fake_pc.f.r.nrd));
-#endif
       if(copr==9) {
         emit_readword((int)&last_count,ECX);
         emit_loadreg(CCREG,HOST_CCREG); // TODO: do proper reg alloc
@@ -3251,6 +3256,9 @@ void cop0_assemble(int i,struct regstat *i_regs)
       }
       emit_call((int)MFC0);
       emit_readword((int)&readmem_dword,t);
+#else
+      emit_readword((int)&reg_cop0+copr*4,t);
+#endif
     }
   }
   else if(opcode2[i]==4) // MTC0
@@ -3266,7 +3274,11 @@ void cop0_assemble(int i,struct regstat *i_regs)
     emit_writeword(0,(int)&PC);
     emit_writebyte(1,(int)&(fake_pc.f.r.nrd));
 #endif
-    if(copr==9||copr==11||copr==12) {
+#ifdef PCSX
+    emit_movimm(source[i],0);
+    emit_writeword(0,(int)&psxRegs.code);
+#endif
+    if(copr==9||copr==11||copr==12||copr==13) {
       emit_readword((int)&last_count,ECX);
       emit_loadreg(CCREG,HOST_CCREG); // TODO: do proper reg alloc
       emit_add(HOST_CCREG,ECX,HOST_CCREG);
@@ -3277,7 +3289,7 @@ void cop0_assemble(int i,struct regstat *i_regs)
     // so needs a special case to handle a pending interrupt.
     // The interrupt must be taken immediately, because a subsequent
     // instruction might disable interrupts again.
-    if(copr==12&&!is_delayslot) {
+    if(copr==12||copr==13) {
       emit_movimm(start+i*4+4,0);
       emit_movimm(0,1);
       emit_writeword(0,(int)&pcaddr);
@@ -3286,7 +3298,7 @@ void cop0_assemble(int i,struct regstat *i_regs)
     //else if(copr==12&&is_delayslot) emit_call((int)MTC0_R12);
     //else
     emit_call((int)MTC0);
-    if(copr==9||copr==11||copr==12) {
+    if(copr==9||copr==11||copr==12||copr==13) {
       emit_readword((int)&Count,HOST_CCREG);
       emit_readword((int)&next_interupt,ECX);
       emit_addimm(HOST_CCREG,-CLOCK_DIVIDER*ccadj[i],HOST_CCREG);
@@ -3294,14 +3306,14 @@ void cop0_assemble(int i,struct regstat *i_regs)
       emit_writeword(ECX,(int)&last_count);
       emit_storereg(CCREG,HOST_CCREG);
     }
-    if(copr==12) {
+    if(copr==12||copr==13) {
       assert(!is_delayslot);
       emit_readword((int)&pending_exception,14);
     }
     emit_loadreg(rs1[i],s);
     if(get_reg(i_regs->regmap,rs1[i]|64)>=0)
       emit_loadreg(rs1[i]|64,get_reg(i_regs->regmap,rs1[i]|64));
-    if(copr==12) {
+    if(copr==12||copr==13) {
       emit_test(14,14);
       emit_jne((int)&do_interrupt);
     }