drc: enable and fix warnings

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / assem_arm.c

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index c2f65ee..9a5e3a9 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -38,6 +38,8 @@ char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
 #define CALLER_SAVE_REGS 0x120f
 #endif
 
 #define CALLER_SAVE_REGS 0x120f
 #endif
 

+#define unused __attribute__((unused))
+

 extern int cycle_count;
 extern int last_count;
 extern int pcaddr;
 extern int cycle_count;
 extern int last_count;
 extern int pcaddr;


@@ -45,9 +47,7 @@ extern int pending_exception;
 extern int branch_target;
 extern uint64_t readmem_dword;
 extern void *dynarec_local;
 extern int branch_target;
 extern uint64_t readmem_dword;
 extern void *dynarec_local;

-extern u_int memory_map[1048576];

 extern u_int mini_ht[32][2];
 extern u_int mini_ht[32][2];

-extern u_int rounding_modes[4];

 
 void indirect_jump_indexed();
 void indirect_jump();
 
 void indirect_jump_indexed();
 void indirect_jump();


@@ -114,11 +114,11 @@ const u_int invalidate_addr_reg[16] = {
   0,
   0};
 
   0,
   0};
 

-unsigned int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
+static unsigned int needs_clear_cache[1<<(TARGET_SIZE_2-17)];

 
 /* Linker */
 
 
 /* Linker */
 

-void set_jump_target(int addr,u_int target)
+static void set_jump_target(int addr,u_int target)

 {
   u_char *ptr=(u_char *)addr;
   u_int *ptr2=(u_int *)ptr;
 {
   u_char *ptr=(u_char *)addr;
   u_int *ptr2=(u_int *)ptr;


@@ -152,7 +152,8 @@ void set_jump_target(int addr,u_int target)
 // This optionally copies the instruction from the target of the branch into
 // the space before the branch.  Works, but the difference in speed is
 // usually insignificant.
 // This optionally copies the instruction from the target of the branch into
 // the space before the branch.  Works, but the difference in speed is
 // usually insignificant.

-void set_jump_target_fillslot(int addr,u_int target,int copy)
+#if 0
+static void set_jump_target_fillslot(int addr,u_int target,int copy)

 {
   u_char *ptr=(u_char *)addr;
   u_int *ptr2=(u_int *)ptr;
 {
   u_char *ptr=(u_char *)addr;
   u_int *ptr2=(u_int *)ptr;


@@ -181,17 +182,18 @@ void set_jump_target_fillslot(int addr,u_int target,int copy)
     *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
   }
 }
     *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
   }
 }

+#endif

 
 /* Literal pool */
 
 /* Literal pool */

-add_literal(int addr,int val)
+static void add_literal(int addr,int val)

 {
   assert(literalcount<sizeof(literals)/sizeof(literals[0]));
   literals[literalcount][0]=addr;
   literals[literalcount][1]=val;
 {
   assert(literalcount<sizeof(literals)/sizeof(literals[0]));
   literals[literalcount][0]=addr;
   literals[literalcount][1]=val;

-  literalcount++; 
-} 
+  literalcount++;
+}

 
 

-void *kill_pointer(void *stub)
+static void *kill_pointer(void *stub)

 {
   int *ptr=(int *)(stub+4);
   assert((*ptr&0x0ff00000)==0x05900000);
 {
   int *ptr=(int *)(stub+4);
   assert((*ptr&0x0ff00000)==0x05900000);


@@ -206,7 +208,7 @@ void *kill_pointer(void *stub)
 // get address that insn one after stub loads (dyna_linker arg1),
 // treat it as a pointer to branch insn,
 // return addr where that branch jumps to
 // get address that insn one after stub loads (dyna_linker arg1),
 // treat it as a pointer to branch insn,
 // return addr where that branch jumps to

-int get_pointer(void *stub)
+static int get_pointer(void *stub)

 {
   //printf("get_pointer(%x)\n",(int)stub);
   int *ptr=(int *)(stub+4);
 {
   //printf("get_pointer(%x)\n",(int)stub);
   int *ptr=(int *)(stub+4);


@@ -220,7 +222,7 @@ int get_pointer(void *stub)
 
 // Find the "clean" entry point from a "dirty" entry point
 // by skipping past the call to verify_code
 
 // Find the "clean" entry point from a "dirty" entry point
 // by skipping past the call to verify_code

-u_int get_clean_addr(int addr)
+static u_int get_clean_addr(int addr)

 {
   int *ptr=(int *)addr;
   #ifndef HAVE_ARMV7
 {
   int *ptr=(int *)addr;
   #ifndef HAVE_ARMV7


@@ -237,9 +239,8 @@ u_int get_clean_addr(int addr)
   return (u_int)ptr;
 }
 
   return (u_int)ptr;
 }
 

-int verify_dirty(int addr)
+static int verify_dirty(u_int *ptr)

 {
 {

-  u_int *ptr=(u_int *)addr;

   #ifndef HAVE_ARMV7
   // get from literal pool
   assert((*ptr&0xFFFF0000)==0xe59f0000);
   #ifndef HAVE_ARMV7
   // get from literal pool
   assert((*ptr&0xFFFF0000)==0xe59f0000);


@@ -265,12 +266,12 @@ int verify_dirty(int addr)
 
 // This doesn't necessarily find all clean entry points, just
 // guarantees that it's not dirty
 
 // This doesn't necessarily find all clean entry points, just
 // guarantees that it's not dirty

-int isclean(int addr)
+static int isclean(int addr)

 {
   #ifndef HAVE_ARMV7
 {
   #ifndef HAVE_ARMV7

-  int *ptr=((u_int *)addr)+4;
+  u_int *ptr=((u_int *)addr)+4;

   #else
   #else

-  int *ptr=((u_int *)addr)+6;
+  u_int *ptr=((u_int *)addr)+6;

   #endif
   if((*ptr&0xFF000000)!=0xeb000000) ptr++;
   if((*ptr&0xFF000000)!=0xeb000000) return 1; // bl instruction
   #endif
   if((*ptr&0xFF000000)!=0xeb000000) ptr++;
   if((*ptr&0xFF000000)!=0xeb000000) return 1; // bl instruction


@@ -281,7 +282,7 @@ int isclean(int addr)
 }
 
 // get source that block at addr was compiled from (host pointers)
 }
 
 // get source that block at addr was compiled from (host pointers)

-void get_bounds(int addr,u_int *start,u_int *end)
+static void get_bounds(int addr,u_int *start,u_int *end)

 {
   u_int *ptr=(u_int *)addr;
   #ifndef HAVE_ARMV7
 {
   u_int *ptr=(u_int *)addr;
   #ifndef HAVE_ARMV7


@@ -311,25 +312,25 @@ void get_bounds(int addr,u_int *start,u_int *end)
 
 // Note: registers are allocated clean (unmodified state)
 // if you intend to modify the register, you must call dirty_reg().
 
 // Note: registers are allocated clean (unmodified state)
 // if you intend to modify the register, you must call dirty_reg().

-void alloc_reg(struct regstat *cur,int i,signed char reg)
+static void alloc_reg(struct regstat *cur,int i,signed char reg)

 {
   int r,hr;
   int preferred_reg = (reg&7);
   if(reg==CCREG) preferred_reg=HOST_CCREG;
   if(reg==PTEMP||reg==FTEMP) preferred_reg=12;
 {
   int r,hr;
   int preferred_reg = (reg&7);
   if(reg==CCREG) preferred_reg=HOST_CCREG;
   if(reg==PTEMP||reg==FTEMP) preferred_reg=12;

-  
+

   // Don't allocate unused registers
   if((cur->u>>reg)&1) return;
   // Don't allocate unused registers
   if((cur->u>>reg)&1) return;

-  
+

   // see if it's already allocated
   for(hr=0;hr<HOST_REGS;hr++)
   {
     if(cur->regmap[hr]==reg) return;
   }
   // see if it's already allocated
   for(hr=0;hr<HOST_REGS;hr++)
   {
     if(cur->regmap[hr]==reg) return;
   }

-  
+

   // Keep the same mapping if the register was already allocated in a loop
   preferred_reg = loop_reg(i,reg,preferred_reg);
   // Keep the same mapping if the register was already allocated in a loop
   preferred_reg = loop_reg(i,reg,preferred_reg);

-  
+

   // Try to allocate the preferred register
   if(cur->regmap[preferred_reg]==-1) {
     cur->regmap[preferred_reg]=reg;
   // Try to allocate the preferred register
   if(cur->regmap[preferred_reg]==-1) {
     cur->regmap[preferred_reg]=reg;


@@ -350,7 +351,7 @@ void alloc_reg(struct regstat *cur,int i,signed char reg)
     cur->isconst&=~(1<<preferred_reg);
     return;
   }
     cur->isconst&=~(1<<preferred_reg);
     return;
   }

-  
+

   // Clear any unneeded registers
   // We try to keep the mapping consistent, if possible, because it
   // makes branches easier (especially loops).  So we try to allocate
   // Clear any unneeded registers
   // We try to keep the mapping consistent, if possible, because it
   // makes branches easier (especially loops).  So we try to allocate


@@ -393,7 +394,7 @@ void alloc_reg(struct regstat *cur,int i,signed char reg)
       return;
     }
   }
       return;
     }
   }

-  
+

   // Ok, now we have to evict someone
   // Pick a register we hopefully won't need soon
   u_char hsn[MAXREG+1];
   // Ok, now we have to evict someone
   // Pick a register we hopefully won't need soon
   u_char hsn[MAXREG+1];


@@ -476,26 +477,26 @@ void alloc_reg(struct regstat *cur,int i,signed char reg)
   SysPrintf("This shouldn't happen (alloc_reg)");exit(1);
 }
 
   SysPrintf("This shouldn't happen (alloc_reg)");exit(1);
 }
 

-void alloc_reg64(struct regstat *cur,int i,signed char reg)
+static void alloc_reg64(struct regstat *cur,int i,signed char reg)

 {
   int preferred_reg = 8+(reg&1);
   int r,hr;
 {
   int preferred_reg = 8+(reg&1);
   int r,hr;

-  
+

   // allocate the lower 32 bits
   alloc_reg(cur,i,reg);
   // allocate the lower 32 bits
   alloc_reg(cur,i,reg);

-  
+

   // Don't allocate unused registers
   if((cur->uu>>reg)&1) return;
   // Don't allocate unused registers
   if((cur->uu>>reg)&1) return;

-  
+

   // see if the upper half is already allocated
   for(hr=0;hr<HOST_REGS;hr++)
   {
     if(cur->regmap[hr]==reg+64) return;
   }
   // see if the upper half is already allocated
   for(hr=0;hr<HOST_REGS;hr++)
   {
     if(cur->regmap[hr]==reg+64) return;
   }

-  
+

   // Keep the same mapping if the register was already allocated in a loop
   preferred_reg = loop_reg(i,reg,preferred_reg);
   // Keep the same mapping if the register was already allocated in a loop
   preferred_reg = loop_reg(i,reg,preferred_reg);

-  
+

   // Try to allocate the preferred register
   if(cur->regmap[preferred_reg]==-1) {
     cur->regmap[preferred_reg]=reg|64;
   // Try to allocate the preferred register
   if(cur->regmap[preferred_reg]==-1) {
     cur->regmap[preferred_reg]=reg|64;


@@ -516,7 +517,7 @@ void alloc_reg64(struct regstat *cur,int i,signed char reg)
     cur->isconst&=~(1<<preferred_reg);
     return;
   }
     cur->isconst&=~(1<<preferred_reg);
     return;
   }

-  
+

   // Clear any unneeded registers
   // We try to keep the mapping consistent, if possible, because it
   // makes branches easier (especially loops).  So we try to allocate
   // Clear any unneeded registers
   // We try to keep the mapping consistent, if possible, because it
   // makes branches easier (especially loops).  So we try to allocate


@@ -559,7 +560,7 @@ void alloc_reg64(struct regstat *cur,int i,signed char reg)
       return;
     }
   }
       return;
     }
   }

-  
+

   // Ok, now we have to evict someone
   // Pick a register we hopefully won't need soon
   u_char hsn[MAXREG+1];
   // Ok, now we have to evict someone
   // Pick a register we hopefully won't need soon
   u_char hsn[MAXREG+1];


@@ -645,17 +646,17 @@ void alloc_reg64(struct regstat *cur,int i,signed char reg)
 // Allocate a temporary register.  This is done without regard to
 // dirty status or whether the register we request is on the unneeded list
 // Note: This will only allocate one register, even if called multiple times
 // Allocate a temporary register.  This is done without regard to
 // dirty status or whether the register we request is on the unneeded list
 // Note: This will only allocate one register, even if called multiple times

-void alloc_reg_temp(struct regstat *cur,int i,signed char reg)
+static void alloc_reg_temp(struct regstat *cur,int i,signed char reg)

 {
   int r,hr;
   int preferred_reg = -1;
 {
   int r,hr;
   int preferred_reg = -1;

-  
+

   // see if it's already allocated
   for(hr=0;hr<HOST_REGS;hr++)
   {
     if(hr!=EXCLUDE_REG&&cur->regmap[hr]==reg) return;
   }
   // see if it's already allocated
   for(hr=0;hr<HOST_REGS;hr++)
   {
     if(hr!=EXCLUDE_REG&&cur->regmap[hr]==reg) return;
   }

-  
+

   // Try to allocate any available register
   for(hr=HOST_REGS-1;hr>=0;hr--) {
     if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
   // Try to allocate any available register
   for(hr=HOST_REGS-1;hr>=0;hr--) {
     if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {


@@ -665,7 +666,7 @@ void alloc_reg_temp(struct regstat *cur,int i,signed char reg)
       return;
     }
   }
       return;
     }
   }

-  
+

   // Find an unneeded register
   for(hr=HOST_REGS-1;hr>=0;hr--)
   {
   // Find an unneeded register
   for(hr=HOST_REGS-1;hr>=0;hr--)
   {


@@ -694,7 +695,7 @@ void alloc_reg_temp(struct regstat *cur,int i,signed char reg)
       }
     }
   }
       }
     }
   }

-  
+

   // Ok, now we have to evict someone
   // Pick a register we hopefully won't need soon
   // TODO: we might want to follow unconditional jumps here
   // Ok, now we have to evict someone
   // Pick a register we hopefully won't need soon
   // TODO: we might want to follow unconditional jumps here


@@ -764,12 +765,13 @@ void alloc_reg_temp(struct regstat *cur,int i,signed char reg)
   }
   SysPrintf("This shouldn't happen");exit(1);
 }
   }
   SysPrintf("This shouldn't happen");exit(1);
 }

+

 // Allocate a specific ARM register.
 // Allocate a specific ARM register.

-void alloc_arm_reg(struct regstat *cur,int i,signed char reg,char hr)
+static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)

 {
   int n;
   int dirty=0;
 {
   int n;
   int dirty=0;

-  
+

   // see if it's already allocated (and dealloc it)
   for(n=0;n<HOST_REGS;n++)
   {
   // see if it's already allocated (and dealloc it)
   for(n=0;n<HOST_REGS;n++)
   {


@@ -778,7 +780,7 @@ void alloc_arm_reg(struct regstat *cur,int i,signed char reg,char hr)
       cur->regmap[n]=-1;
     }
   }
       cur->regmap[n]=-1;
     }
   }

-  
+

   cur->regmap[hr]=reg;
   cur->dirty&=~(1<<hr);
   cur->dirty|=dirty<<hr;
   cur->regmap[hr]=reg;
   cur->dirty&=~(1<<hr);
   cur->dirty|=dirty<<hr;


@@ -786,7 +788,7 @@ void alloc_arm_reg(struct regstat *cur,int i,signed char reg,char hr)
 }
 
 // Alloc cycle count into dedicated register
 }
 
 // Alloc cycle count into dedicated register

-alloc_cc(struct regstat *cur,int i)
+static void alloc_cc(struct regstat *cur,int i)

 {
   alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
 }
 {
   alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
 }


@@ -796,7 +798,7 @@ alloc_cc(struct regstat *cur,int i)
 
 /* Assembler */
 
 
 /* Assembler */
 

-char regname[16][4] = {
+static unused char regname[16][4] = {

  "r0",
  "r1",
  "r2",
  "r0",
  "r1",
  "r2",


@@ -814,39 +816,21 @@ char regname[16][4] = {
  "lr",
  "pc"};
 
  "lr",
  "pc"};
 

-void output_byte(u_char byte)
-{
-  *(out++)=byte;
-}
-void output_modrm(u_char mod,u_char rm,u_char ext)
-{
-  assert(mod<4);
-  assert(rm<8);
-  assert(ext<8);
-  u_char byte=(mod<<6)|(ext<<3)|rm;
-  *(out++)=byte;
-}
-void output_sib(u_char scale,u_char index,u_char base)
-{
-  assert(scale<4);
-  assert(index<8);
-  assert(base<8);
-  u_char byte=(scale<<6)|(index<<3)|base;
-  *(out++)=byte;
-}
-void output_w32(u_int word)
+static void output_w32(u_int word)

 {
   *((u_int *)out)=word;
   out+=4;
 }
 {
   *((u_int *)out)=word;
   out+=4;
 }

-u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
+
+static u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)

 {
   assert(rd<16);
   assert(rn<16);
   assert(rm<16);
   return((rn<<16)|(rd<<12)|rm);
 }
 {
   assert(rd<16);
   assert(rn<16);
   assert(rm<16);
   return((rn<<16)|(rd<<12)|rm);
 }

-u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
+
+static u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)

 {
   assert(rd<16);
   assert(rn<16);
 {
   assert(rd<16);
   assert(rn<16);


@@ -854,7 +838,8 @@ u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
   assert((shift&1)==0);
   return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
 }
   assert((shift&1)==0);
   return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
 }

-u_int genimm(u_int imm,u_int *encoded)
+
+static u_int genimm(u_int imm,u_int *encoded)

 {
   *encoded=0;
   if(imm==0) return 1;
 {
   *encoded=0;
   if(imm==0) return 1;


@@ -869,12 +854,15 @@ u_int genimm(u_int imm,u_int *encoded)
   }
   return 0;
 }
   }
   return 0;
 }

-void genimm_checked(u_int imm,u_int *encoded)
+
+static void genimm_checked(u_int imm,u_int *encoded)

 {
   u_int ret=genimm(imm,encoded);
   assert(ret);
 {
   u_int ret=genimm(imm,encoded);
   assert(ret);

+  (void)ret;

 }
 }

-u_int genjmp(u_int addr)
+
+static u_int genjmp(u_int addr)

 {
   int offset=addr-(int)out-8;
   if(offset<-33554432||offset>=33554432) {
 {
   int offset=addr-(int)out-8;
   if(offset<-33554432||offset>=33554432) {


@@ -887,96 +875,99 @@ u_int genjmp(u_int addr)
   return ((u_int)offset>>2)&0xffffff;
 }
 
   return ((u_int)offset>>2)&0xffffff;
 }
 

-void emit_mov(int rs,int rt)
+static void emit_mov(int rs,int rt)

 {
   assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
 }
 
 {
   assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
 }
 

-void emit_movs(int rs,int rt)
+static void emit_movs(int rs,int rt)

 {
   assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
 }
 
 {
   assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
 }
 

-void emit_add(int rs1,int rs2,int rt)
+static void emit_add(int rs1,int rs2,int rt)

 {
   assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
 }
 
 {
   assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
 }
 

-void emit_adds(int rs1,int rs2,int rt)
+static void emit_adds(int rs1,int rs2,int rt)

 {
   assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
 }
 
 {
   assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
 }
 

-void emit_adcs(int rs1,int rs2,int rt)
+static void emit_adcs(int rs1,int rs2,int rt)

 {
   assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
 }
 
 {
   assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
 }
 

-void emit_sbc(int rs1,int rs2,int rt)
+static void emit_sbc(int rs1,int rs2,int rt)

 {
   assem_debug("sbc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0c00000|rd_rn_rm(rt,rs1,rs2));
 }
 
 {
   assem_debug("sbc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0c00000|rd_rn_rm(rt,rs1,rs2));
 }
 

-void emit_sbcs(int rs1,int rs2,int rt)
+static void emit_sbcs(int rs1,int rs2,int rt)

 {
   assem_debug("sbcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0d00000|rd_rn_rm(rt,rs1,rs2));
 }
 
 {
   assem_debug("sbcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0d00000|rd_rn_rm(rt,rs1,rs2));
 }
 

-void emit_neg(int rs, int rt)
+static void emit_neg(int rs, int rt)

 {
   assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
 }
 
 {
   assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
 }
 

-void emit_negs(int rs, int rt)
+static void emit_negs(int rs, int rt)

 {
   assem_debug("rsbs %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0xe2700000|rd_rn_rm(rt,rs,0));
 }
 
 {
   assem_debug("rsbs %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0xe2700000|rd_rn_rm(rt,rs,0));
 }
 

-void emit_sub(int rs1,int rs2,int rt)
+static void emit_sub(int rs1,int rs2,int rt)

 {
   assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
 }
 
 {
   assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
 }
 

-void emit_subs(int rs1,int rs2,int rt)
+static void emit_subs(int rs1,int rs2,int rt)

 {
   assem_debug("subs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0500000|rd_rn_rm(rt,rs1,rs2));
 }
 
 {
   assem_debug("subs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0500000|rd_rn_rm(rt,rs1,rs2));
 }
 

-void emit_zeroreg(int rt)
+static void emit_zeroreg(int rt)

 {
   assem_debug("mov %s,#0\n",regname[rt]);
   output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
 }
 
 {
   assem_debug("mov %s,#0\n",regname[rt]);
   output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
 }
 

-void emit_loadlp(u_int imm,u_int rt)
+static void emit_loadlp(u_int imm,u_int rt)

 {
   add_literal((int)out,imm);
   assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
   output_w32(0xe5900000|rd_rn_rm(rt,15,0));
 }
 {
   add_literal((int)out,imm);
   assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
   output_w32(0xe5900000|rd_rn_rm(rt,15,0));
 }

-void emit_movw(u_int imm,u_int rt)
+
+static void emit_movw(u_int imm,u_int rt)

 {
   assert(imm<65536);
   assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
   output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
 }
 {
   assert(imm<65536);
   assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
   output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
 }

-void emit_movt(u_int imm,u_int rt)
+
+static void emit_movt(u_int imm,u_int rt)

 {
   assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
   output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
 }
 {
   assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
   output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
 }

-void emit_movimm(u_int imm,u_int rt)
+
+static void emit_movimm(u_int imm,u_int rt)

 {
   u_int armval;
   if(genimm(imm,&armval)) {
 {
   u_int armval;
   if(genimm(imm,&armval)) {


@@ -1003,13 +994,14 @@ void emit_movimm(u_int imm,u_int rt)
     #endif
   }
 }
     #endif
   }
 }

-void emit_pcreladdr(u_int rt)
+
+static void emit_pcreladdr(u_int rt)

 {
   assem_debug("add %s,pc,#?\n",regname[rt]);
   output_w32(0xe2800000|rd_rn_rm(rt,15,0));
 }
 
 {
   assem_debug("add %s,pc,#?\n",regname[rt]);
   output_w32(0xe2800000|rd_rn_rm(rt,15,0));
 }
 

-void emit_loadreg(int r, int hr)
+static void emit_loadreg(int r, int hr)

 {
   if(r&64) {
     SysPrintf("64bit load in 32bit mode!\n");
 {
   if(r&64) {
     SysPrintf("64bit load in 32bit mode!\n");


@@ -1032,7 +1024,8 @@ void emit_loadreg(int r, int hr)
     output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
   }
 }
     output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
   }
 }

-void emit_storereg(int r, int hr)
+
+static void emit_storereg(int r, int hr)

 {
   if(r&64) {
     SysPrintf("64bit store in 32bit mode!\n");
 {
   if(r&64) {
     SysPrintf("64bit store in 32bit mode!\n");


@@ -1050,13 +1043,13 @@ void emit_storereg(int r, int hr)
   output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
 }
 
   output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
 }
 

-void emit_test(int rs, int rt)
+static void emit_test(int rs, int rt)

 {
   assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
   output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
 }
 
 {
   assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
   output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
 }
 

-void emit_testimm(int rs,int imm)
+static void emit_testimm(int rs,int imm)

 {
   u_int armval;
   assem_debug("tst %s,#%d\n",regname[rs],imm);
 {
   u_int armval;
   assem_debug("tst %s,#%d\n",regname[rs],imm);


@@ -1064,7 +1057,7 @@ void emit_testimm(int rs,int imm)
   output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
 }
 
   output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
 }
 

-void emit_testeqimm(int rs,int imm)
+static void emit_testeqimm(int rs,int imm)

 {
   u_int armval;
   assem_debug("tsteq %s,$%d\n",regname[rs],imm);
 {
   u_int armval;
   assem_debug("tsteq %s,$%d\n",regname[rs],imm);


@@ -1072,36 +1065,37 @@ void emit_testeqimm(int rs,int imm)
   output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
 }
 
   output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
 }
 

-void emit_not(int rs,int rt)
+static void emit_not(int rs,int rt)

 {
   assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
 }
 
 {
   assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
 }
 

-void emit_mvnmi(int rs,int rt)
+static void emit_mvnmi(int rs,int rt)

 {
   assem_debug("mvnmi %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x41e00000|rd_rn_rm(rt,0,rs));
 }
 
 {
   assem_debug("mvnmi %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x41e00000|rd_rn_rm(rt,0,rs));
 }
 

-void emit_and(u_int rs1,u_int rs2,u_int rt)
+static void emit_and(u_int rs1,u_int rs2,u_int rt)

 {
   assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
 }
 
 {
   assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
 }
 

-void emit_or(u_int rs1,u_int rs2,u_int rt)
+static void emit_or(u_int rs1,u_int rs2,u_int rt)

 {
   assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
 }
 {
   assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
 }

-void emit_or_and_set_flags(int rs1,int rs2,int rt)
+
+static void emit_or_and_set_flags(int rs1,int rs2,int rt)

 {
   assem_debug("orrs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe1900000|rd_rn_rm(rt,rs1,rs2));
 }
 
 {
   assem_debug("orrs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe1900000|rd_rn_rm(rt,rs1,rs2));
 }
 

-void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
+static void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)

 {
   assert(rs<16);
   assert(rt<16);
 {
   assert(rs<16);
   assert(rt<16);


@@ -1110,7 +1104,7 @@ void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
 }
 
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
 }
 

-void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
+static void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)

 {
   assert(rs<16);
   assert(rt<16);
 {
   assert(rs<16);
   assert(rt<16);


@@ -1119,13 +1113,13 @@ void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
   output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
 }
 
   output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
 }
 

-void emit_xor(u_int rs1,u_int rs2,u_int rt)
+static void emit_xor(u_int rs1,u_int rs2,u_int rt)

 {
   assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
 }
 
 {
   assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
 }
 

-void emit_addimm(u_int rs,int imm,u_int rt)
+static void emit_addimm(u_int rs,int imm,u_int rt)

 {
   assert(rs<16);
   assert(rt<16);
 {
   assert(rs<16);
   assert(rt<16);


@@ -1166,7 +1160,7 @@ void emit_addimm(u_int rs,int imm,u_int rt)
   else if(rs!=rt) emit_mov(rs,rt);
 }
 
   else if(rs!=rt) emit_mov(rs,rt);
 }
 

-void emit_addimm_and_set_flags(int imm,int rt)
+static void emit_addimm_and_set_flags(int imm,int rt)

 {
   assert(imm>-65536&&imm<65536);
   u_int armval;
 {
   assert(imm>-65536&&imm<65536);
   u_int armval;


@@ -1188,49 +1182,28 @@ void emit_addimm_and_set_flags(int imm,int rt)
     output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
   }
 }
     output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
   }
 }

-void emit_addimm_no_flags(u_int imm,u_int rt)
+
+static void emit_addimm_no_flags(u_int imm,u_int rt)

 {
   emit_addimm(rt,imm,rt);
 }
 
 {
   emit_addimm(rt,imm,rt);
 }
 

-void emit_addnop(u_int r)
+static void emit_addnop(u_int r)

 {
   assert(r<16);
   assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
   output_w32(0xe2800000|rd_rn_rm(r,r,0));
 }
 
 {
   assert(r<16);
   assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
   output_w32(0xe2800000|rd_rn_rm(r,r,0));
 }
 

-void emit_adcimm(u_int rs,int imm,u_int rt)
+static void emit_adcimm(u_int rs,int imm,u_int rt)

 {
   u_int armval;
   genimm_checked(imm,&armval);
   assem_debug("adc %s,%s,#%d\n",regname[rt],regname[rs],imm);
   output_w32(0xe2a00000|rd_rn_rm(rt,rs,0)|armval);
 }
 {
   u_int armval;
   genimm_checked(imm,&armval);
   assem_debug("adc %s,%s,#%d\n",regname[rt],regname[rs],imm);
   output_w32(0xe2a00000|rd_rn_rm(rt,rs,0)|armval);
 }

-/*void emit_sbcimm(int imm,u_int rt)
-{
-  u_int armval;
-  genimm_checked(imm,&armval);
-  assem_debug("sbc %s,%s,#%d\n",regname[rt],regname[rt],imm);
-  output_w32(0xe2c00000|rd_rn_rm(rt,rt,0)|armval);
-}*/
-void emit_sbbimm(int imm,u_int rt)
-{
-  assem_debug("sbb $%d,%%%s\n",imm,regname[rt]);
-  assert(rt<8);
-  if(imm<128&&imm>=-128) {
-    output_byte(0x83);
-    output_modrm(3,rt,3);
-    output_byte(imm);
-  }
-  else
-  {
-    output_byte(0x81);
-    output_modrm(3,rt,3);
-    output_w32(imm);
-  }
-}
-void emit_rscimm(int rs,int imm,u_int rt)
+
+static void emit_rscimm(int rs,int imm,u_int rt)

 {
   assert(0);
   u_int armval;
 {
   assert(0);
   u_int armval;


@@ -1239,7 +1212,7 @@ void emit_rscimm(int rs,int imm,u_int rt)
   output_w32(0xe2e00000|rd_rn_rm(rt,rs,0)|armval);
 }
 
   output_w32(0xe2e00000|rd_rn_rm(rt,rs,0)|armval);
 }
 

-void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)
+static void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)

 {
   // TODO: if(genimm(imm,&armval)) ...
   // else
 {
   // TODO: if(genimm(imm,&armval)) ...
   // else


@@ -1248,14 +1221,7 @@ void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)
   emit_adcimm(rsh,0,rth);
 }
 
   emit_adcimm(rsh,0,rth);
 }
 

-void emit_sbb(int rs1,int rs2)
-{
-  assem_debug("sbb %%%s,%%%s\n",regname[rs2],regname[rs1]);
-  output_byte(0x19);
-  output_modrm(3,rs1,rs2);
-}
-
-void emit_andimm(int rs,int imm,int rt)
+static void emit_andimm(int rs,int imm,int rt)

 {
   u_int armval;
   if(imm==0) {
 {
   u_int armval;
   if(imm==0) {


@@ -1291,7 +1257,7 @@ void emit_andimm(int rs,int imm,int rt)
   }
 }
 
   }
 }
 

-void emit_orimm(int rs,int imm,int rt)
+static void emit_orimm(int rs,int imm,int rt)

 {
   u_int armval;
   if(imm==0) {
 {
   u_int armval;
   if(imm==0) {


@@ -1308,7 +1274,7 @@ void emit_orimm(int rs,int imm,int rt)
   }
 }
 
   }
 }
 

-void emit_xorimm(int rs,int imm,int rt)
+static void emit_xorimm(int rs,int imm,int rt)

 {
   u_int armval;
   if(imm==0) {
 {
   u_int armval;
   if(imm==0) {


@@ -1325,7 +1291,7 @@ void emit_xorimm(int rs,int imm,int rt)
   }
 }
 
   }
 }
 

-void emit_shlimm(int rs,u_int imm,int rt)
+static void emit_shlimm(int rs,u_int imm,int rt)

 {
   assert(imm>0);
   assert(imm<32);
 {
   assert(imm>0);
   assert(imm<32);


@@ -1334,7 +1300,7 @@ void emit_shlimm(int rs,u_int imm,int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
 }
 
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
 }
 

-void emit_lsls_imm(int rs,int imm,int rt)
+static void emit_lsls_imm(int rs,int imm,int rt)

 {
   assert(imm>0);
   assert(imm<32);
 {
   assert(imm>0);
   assert(imm<32);


@@ -1342,7 +1308,7 @@ void emit_lsls_imm(int rs,int imm,int rt)
   output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
 }
 
   output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
 }
 

-void emit_lslpls_imm(int rs,int imm,int rt)
+static unused void emit_lslpls_imm(int rs,int imm,int rt)

 {
   assert(imm>0);
   assert(imm<32);
 {
   assert(imm>0);
   assert(imm<32);


@@ -1350,7 +1316,7 @@ void emit_lslpls_imm(int rs,int imm,int rt)
   output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
 }
 
   output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
 }
 

-void emit_shrimm(int rs,u_int imm,int rt)
+static void emit_shrimm(int rs,u_int imm,int rt)

 {
   assert(imm>0);
   assert(imm<32);
 {
   assert(imm>0);
   assert(imm<32);


@@ -1358,7 +1324,7 @@ void emit_shrimm(int rs,u_int imm,int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
 }
 
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
 }
 

-void emit_sarimm(int rs,u_int imm,int rt)
+static void emit_sarimm(int rs,u_int imm,int rt)

 {
   assert(imm>0);
   assert(imm<32);
 {
   assert(imm>0);
   assert(imm<32);


@@ -1366,7 +1332,7 @@ void emit_sarimm(int rs,u_int imm,int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
 }
 
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
 }
 

-void emit_rorimm(int rs,u_int imm,int rt)
+static void emit_rorimm(int rs,u_int imm,int rt)

 {
   assert(imm>0);
   assert(imm<32);
 {
   assert(imm>0);
   assert(imm<32);


@@ -1374,7 +1340,7 @@ void emit_rorimm(int rs,u_int imm,int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
 }
 
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
 }
 

-void emit_shldimm(int rs,int rs2,u_int imm,int rt)
+static void emit_shldimm(int rs,int rs2,u_int imm,int rt)

 {
   assem_debug("shld %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
   assert(imm>0);
 {
   assem_debug("shld %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
   assert(imm>0);


@@ -1386,7 +1352,7 @@ void emit_shldimm(int rs,int rs2,u_int imm,int rt)
   output_w32(0xe1800020|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
 }
 
   output_w32(0xe1800020|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
 }
 

-void emit_shrdimm(int rs,int rs2,u_int imm,int rt)
+static void emit_shrdimm(int rs,int rs2,u_int imm,int rt)

 {
   assem_debug("shrd %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
   assert(imm>0);
 {
   assem_debug("shrd %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
   assert(imm>0);


@@ -1398,7 +1364,7 @@ void emit_shrdimm(int rs,int rs2,u_int imm,int rt)
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
 }
 
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
 }
 

-void emit_signextend16(int rs,int rt)
+static void emit_signextend16(int rs,int rt)

 {
   #ifndef HAVE_ARMV6
   emit_shlimm(rs,16,rt);
 {
   #ifndef HAVE_ARMV6
   emit_shlimm(rs,16,rt);


@@ -1409,7 +1375,7 @@ void emit_signextend16(int rs,int rt)
   #endif
 }
 
   #endif
 }
 

-void emit_signextend8(int rs,int rt)
+static void emit_signextend8(int rs,int rt)

 {
   #ifndef HAVE_ARMV6
   emit_shlimm(rs,24,rt);
 {
   #ifndef HAVE_ARMV6
   emit_shlimm(rs,24,rt);


@@ -1420,7 +1386,7 @@ void emit_signextend8(int rs,int rt)
   #endif
 }
 
   #endif
 }
 

-void emit_shl(u_int rs,u_int shift,u_int rt)
+static void emit_shl(u_int rs,u_int shift,u_int rt)

 {
   assert(rs<16);
   assert(rt<16);
 {
   assert(rs<16);
   assert(rt<16);


@@ -1429,7 +1395,8 @@ void emit_shl(u_int rs,u_int shift,u_int rt)
   assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
 }
   assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
 }

-void emit_shr(u_int rs,u_int shift,u_int rt)
+
+static void emit_shr(u_int rs,u_int shift,u_int rt)

 {
   assert(rs<16);
   assert(rt<16);
 {
   assert(rs<16);
   assert(rt<16);


@@ -1437,7 +1404,8 @@ void emit_shr(u_int rs,u_int shift,u_int rt)
   assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
 }
   assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
 }

-void emit_sar(u_int rs,u_int shift,u_int rt)
+
+static void emit_sar(u_int rs,u_int shift,u_int rt)

 {
   assert(rs<16);
   assert(rt<16);
 {
   assert(rs<16);
   assert(rt<16);


@@ -1445,33 +1413,8 @@ void emit_sar(u_int rs,u_int shift,u_int rt)
   assem_debug("asr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
 }
   assem_debug("asr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
 }

-void emit_shlcl(int r)
-{
-  assem_debug("shl %%%s,%%cl\n",regname[r]);
-  assert(0);
-}
-void emit_shrcl(int r)
-{
-  assem_debug("shr %%%s,%%cl\n",regname[r]);
-  assert(0);
-}
-void emit_sarcl(int r)
-{
-  assem_debug("sar %%%s,%%cl\n",regname[r]);
-  assert(0);
-}

 
 

-void emit_shldcl(int r1,int r2)
-{
-  assem_debug("shld %%%s,%%%s,%%cl\n",regname[r1],regname[r2]);
-  assert(0);
-}
-void emit_shrdcl(int r1,int r2)
-{
-  assem_debug("shrd %%%s,%%%s,%%cl\n",regname[r1],regname[r2]);
-  assert(0);
-}
-void emit_orrshl(u_int rs,u_int shift,u_int rt)
+static void emit_orrshl(u_int rs,u_int shift,u_int rt)

 {
   assert(rs<16);
   assert(rt<16);
 {
   assert(rs<16);
   assert(rt<16);


@@ -1479,7 +1422,8 @@ void emit_orrshl(u_int rs,u_int shift,u_int rt)
   assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
 }
   assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
 }

-void emit_orrshr(u_int rs,u_int shift,u_int rt)
+
+static void emit_orrshr(u_int rs,u_int shift,u_int rt)

 {
   assert(rs<16);
   assert(rt<16);
 {
   assert(rs<16);
   assert(rt<16);


@@ -1488,7 +1432,7 @@ void emit_orrshr(u_int rs,u_int shift,u_int rt)
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
 }
 
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
 }
 

-void emit_cmpimm(int rs,int imm)
+static void emit_cmpimm(int rs,int imm)

 {
   u_int armval;
   if(genimm(imm,&armval)) {
 {
   u_int armval;
   if(genimm(imm,&armval)) {


@@ -1510,85 +1454,79 @@ void emit_cmpimm(int rs,int imm)
   }
 }
 
   }
 }
 

-void emit_cmovne(u_int *addr,int rt)
-{
-  assem_debug("cmovne %x,%%%s",(int)addr,regname[rt]);
-  assert(0);
-}
-void emit_cmovl(u_int *addr,int rt)
-{
-  assem_debug("cmovl %x,%%%s",(int)addr,regname[rt]);
-  assert(0);
-}
-void emit_cmovs(u_int *addr,int rt)
-{
-  assem_debug("cmovs %x,%%%s",(int)addr,regname[rt]);
-  assert(0);
-}
-void emit_cmovne_imm(int imm,int rt)
+static void emit_cmovne_imm(int imm,int rt)

 {
   assem_debug("movne %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
 }
 {
   assem_debug("movne %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
 }

-void emit_cmovl_imm(int imm,int rt)
+
+static void emit_cmovl_imm(int imm,int rt)

 {
   assem_debug("movlt %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
 }
 {
   assem_debug("movlt %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
 }

-void emit_cmovb_imm(int imm,int rt)
+
+static void emit_cmovb_imm(int imm,int rt)

 {
   assem_debug("movcc %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
 }
 {
   assem_debug("movcc %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
 }

-void emit_cmovs_imm(int imm,int rt)
+
+static void emit_cmovs_imm(int imm,int rt)

 {
   assem_debug("movmi %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
 }
 {
   assem_debug("movmi %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
 }

-void emit_cmove_reg(int rs,int rt)
+
+static void emit_cmove_reg(int rs,int rt)

 {
   assem_debug("moveq %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x01a00000|rd_rn_rm(rt,0,rs));
 }
 {
   assem_debug("moveq %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x01a00000|rd_rn_rm(rt,0,rs));
 }

-void emit_cmovne_reg(int rs,int rt)
+
+static void emit_cmovne_reg(int rs,int rt)

 {
   assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
 }
 {
   assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
 }

-void emit_cmovl_reg(int rs,int rt)
+
+static void emit_cmovl_reg(int rs,int rt)

 {
   assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
 }
 {
   assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
 }

-void emit_cmovs_reg(int rs,int rt)
+
+static void emit_cmovs_reg(int rs,int rt)

 {
   assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
 }
 
 {
   assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
 }
 

-void emit_slti32(int rs,int imm,int rt)
+static void emit_slti32(int rs,int imm,int rt)

 {
   if(rs!=rt) emit_zeroreg(rt);
   emit_cmpimm(rs,imm);
   if(rs==rt) emit_movimm(0,rt);
   emit_cmovl_imm(1,rt);
 }
 {
   if(rs!=rt) emit_zeroreg(rt);
   emit_cmpimm(rs,imm);
   if(rs==rt) emit_movimm(0,rt);
   emit_cmovl_imm(1,rt);
 }

-void emit_sltiu32(int rs,int imm,int rt)
+
+static void emit_sltiu32(int rs,int imm,int rt)

 {
   if(rs!=rt) emit_zeroreg(rt);
   emit_cmpimm(rs,imm);
   if(rs==rt) emit_movimm(0,rt);
   emit_cmovb_imm(1,rt);
 }
 {
   if(rs!=rt) emit_zeroreg(rt);
   emit_cmpimm(rs,imm);
   if(rs==rt) emit_movimm(0,rt);
   emit_cmovb_imm(1,rt);
 }

-void emit_slti64_32(int rsh,int rsl,int imm,int rt)
+
+static void emit_slti64_32(int rsh,int rsl,int imm,int rt)

 {
   assert(rsh!=rt);
   emit_slti32(rsl,imm,rt);
 {
   assert(rsh!=rt);
   emit_slti32(rsl,imm,rt);


@@ -1605,7 +1543,8 @@ void emit_slti64_32(int rsh,int rsl,int imm,int rt)
     emit_cmovl_imm(1,rt);
   }
 }
     emit_cmovl_imm(1,rt);
   }
 }

-void emit_sltiu64_32(int rsh,int rsl,int imm,int rt)
+
+static void emit_sltiu64_32(int rsh,int rsl,int imm,int rt)

 {
   assert(rsh!=rt);
   emit_sltiu32(rsl,imm,rt);
 {
   assert(rsh!=rt);
   emit_sltiu32(rsl,imm,rt);


@@ -1621,26 +1560,29 @@ void emit_sltiu64_32(int rsh,int rsl,int imm,int rt)
   }
 }
 
   }
 }
 

-void emit_cmp(int rs,int rt)
+static void emit_cmp(int rs,int rt)

 {
   assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
   output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
 }
 {
   assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
   output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
 }

-void emit_set_gz32(int rs, int rt)
+
+static void emit_set_gz32(int rs, int rt)

 {
   //assem_debug("set_gz32\n");
   emit_cmpimm(rs,1);
   emit_movimm(1,rt);
   emit_cmovl_imm(0,rt);
 }
 {
   //assem_debug("set_gz32\n");
   emit_cmpimm(rs,1);
   emit_movimm(1,rt);
   emit_cmovl_imm(0,rt);
 }

-void emit_set_nz32(int rs, int rt)
+
+static void emit_set_nz32(int rs, int rt)

 {
   //assem_debug("set_nz32\n");
   if(rs!=rt) emit_movs(rs,rt);
   else emit_test(rs,rs);
   emit_cmovne_imm(1,rt);
 }
 {
   //assem_debug("set_nz32\n");
   if(rs!=rt) emit_movs(rs,rt);
   else emit_test(rs,rs);
   emit_cmovne_imm(1,rt);
 }

-void emit_set_gz64_32(int rsh, int rsl, int rt)
+
+static void emit_set_gz64_32(int rsh, int rsl, int rt)

 {
   //assem_debug("set_gz64\n");
   emit_set_gz32(rsl,rt);
 {
   //assem_debug("set_gz64\n");
   emit_set_gz32(rsl,rt);


@@ -1648,13 +1590,15 @@ void emit_set_gz64_32(int rsh, int rsl, int rt)
   emit_cmovne_imm(1,rt);
   emit_cmovs_imm(0,rt);
 }
   emit_cmovne_imm(1,rt);
   emit_cmovs_imm(0,rt);
 }

-void emit_set_nz64_32(int rsh, int rsl, int rt)
+
+static void emit_set_nz64_32(int rsh, int rsl, int rt)

 {
   //assem_debug("set_nz64\n");
   emit_or_and_set_flags(rsh,rsl,rt);
   emit_cmovne_imm(1,rt);
 }
 {
   //assem_debug("set_nz64\n");
   emit_or_and_set_flags(rsh,rsl,rt);
   emit_cmovne_imm(1,rt);
 }

-void emit_set_if_less32(int rs1, int rs2, int rt)
+
+static void emit_set_if_less32(int rs1, int rs2, int rt)

 {
   //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
   if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
 {
   //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
   if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);


@@ -1662,7 +1606,8 @@ void emit_set_if_less32(int rs1, int rs2, int rt)
   if(rs1==rt||rs2==rt) emit_movimm(0,rt);
   emit_cmovl_imm(1,rt);
 }
   if(rs1==rt||rs2==rt) emit_movimm(0,rt);
   emit_cmovl_imm(1,rt);
 }

-void emit_set_if_carry32(int rs1, int rs2, int rt)
+
+static void emit_set_if_carry32(int rs1, int rs2, int rt)

 {
   //assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
   if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
 {
   //assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
   if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);


@@ -1670,7 +1615,8 @@ void emit_set_if_carry32(int rs1, int rs2, int rt)
   if(rs1==rt||rs2==rt) emit_movimm(0,rt);
   emit_cmovb_imm(1,rt);
 }
   if(rs1==rt||rs2==rt) emit_movimm(0,rt);
   emit_cmovb_imm(1,rt);
 }

-void emit_set_if_less64_32(int u1, int l1, int u2, int l2, int rt)
+
+static void emit_set_if_less64_32(int u1, int l1, int u2, int l2, int rt)

 {
   //assem_debug("set if less64 (%%%s,%%%s,%%%s,%%%s),%%%s\n",regname[u1],regname[l1],regname[u2],regname[l2],regname[rt]);
   assert(u1!=rt);
 {
   //assem_debug("set if less64 (%%%s,%%%s,%%%s,%%%s),%%%s\n",regname[u1],regname[l1],regname[u2],regname[l2],regname[rt]);
   assert(u1!=rt);


@@ -1680,7 +1626,8 @@ void emit_set_if_less64_32(int u1, int l1, int u2, int l2, int rt)
   emit_sbcs(u1,u2,HOST_TEMPREG);
   emit_cmovl_imm(1,rt);
 }
   emit_sbcs(u1,u2,HOST_TEMPREG);
   emit_cmovl_imm(1,rt);
 }

-void emit_set_if_carry64_32(int u1, int l1, int u2, int l2, int rt)
+
+static void emit_set_if_carry64_32(int u1, int l1, int u2, int l2, int rt)

 {
   //assem_debug("set if carry64 (%%%s,%%%s,%%%s,%%%s),%%%s\n",regname[u1],regname[l1],regname[u2],regname[l2],regname[rt]);
   assert(u1!=rt);
 {
   //assem_debug("set if carry64 (%%%s,%%%s,%%%s,%%%s),%%%s\n",regname[u1],regname[l1],regname[u2],regname[l2],regname[rt]);
   assert(u1!=rt);


@@ -1691,111 +1638,97 @@ void emit_set_if_carry64_32(int u1, int l1, int u2, int l2, int rt)
   emit_cmovb_imm(1,rt);
 }
 
   emit_cmovb_imm(1,rt);
 }
 

-void emit_call(int a)
+static void emit_call(int a)

 {
   assem_debug("bl %x (%x+%x)\n",a,(int)out,a-(int)out-8);
   u_int offset=genjmp(a);
   output_w32(0xeb000000|offset);
 }
 {
   assem_debug("bl %x (%x+%x)\n",a,(int)out,a-(int)out-8);
   u_int offset=genjmp(a);
   output_w32(0xeb000000|offset);
 }

-void emit_jmp(int a)
+
+static void emit_jmp(int a)

 {
   assem_debug("b %x (%x+%x)\n",a,(int)out,a-(int)out-8);
   u_int offset=genjmp(a);
   output_w32(0xea000000|offset);
 }
 {
   assem_debug("b %x (%x+%x)\n",a,(int)out,a-(int)out-8);
   u_int offset=genjmp(a);
   output_w32(0xea000000|offset);
 }

-void emit_jne(int a)
+
+static void emit_jne(int a)

 {
   assem_debug("bne %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x1a000000|offset);
 }
 {
   assem_debug("bne %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x1a000000|offset);
 }

-void emit_jeq(int a)
+
+static void emit_jeq(int a)

 {
   assem_debug("beq %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x0a000000|offset);
 }
 {
   assem_debug("beq %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x0a000000|offset);
 }

-void emit_js(int a)
+
+static void emit_js(int a)

 {
   assem_debug("bmi %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x4a000000|offset);
 }
 {
   assem_debug("bmi %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x4a000000|offset);
 }

-void emit_jns(int a)
+
+static void emit_jns(int a)

 {
   assem_debug("bpl %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x5a000000|offset);
 }
 {
   assem_debug("bpl %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x5a000000|offset);
 }

-void emit_jl(int a)
+
+static void emit_jl(int a)

 {
   assem_debug("blt %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0xba000000|offset);
 }
 {
   assem_debug("blt %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0xba000000|offset);
 }

-void emit_jge(int a)
+
+static void emit_jge(int a)

 {
   assem_debug("bge %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0xaa000000|offset);
 }
 {
   assem_debug("bge %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0xaa000000|offset);
 }

-void emit_jno(int a)
+
+static void emit_jno(int a)

 {
   assem_debug("bvc %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x7a000000|offset);
 }
 {
   assem_debug("bvc %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x7a000000|offset);
 }

-void emit_jc(int a)
+
+static void emit_jc(int a)

 {
   assem_debug("bcs %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x2a000000|offset);
 }
 {
   assem_debug("bcs %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x2a000000|offset);
 }

-void emit_jcc(int a)
+
+static void emit_jcc(int a)

 {
   assem_debug("bcc %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x3a000000|offset);
 }
 
 {
   assem_debug("bcc %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x3a000000|offset);
 }
 

-void emit_pushimm(int imm)
-{
-  assem_debug("push $%x\n",imm);
-  assert(0);
-}
-void emit_pusha()
-{
-  assem_debug("pusha\n");
-  assert(0);
-}
-void emit_popa()
-{
-  assem_debug("popa\n");
-  assert(0);
-}
-void emit_pushreg(u_int r)
-{
-  assem_debug("push %%%s\n",regname[r]);
-  assert(0);
-}
-void emit_popreg(u_int r)
-{
-  assem_debug("pop %%%s\n",regname[r]);
-  assert(0);
-}
-void emit_callreg(u_int r)
+static void emit_callreg(u_int r)

 {
   assert(r<15);
   assem_debug("blx %s\n",regname[r]);
   output_w32(0xe12fff30|r);
 }
 {
   assert(r<15);
   assem_debug("blx %s\n",regname[r]);
   output_w32(0xe12fff30|r);
 }

-void emit_jmpreg(u_int r)
+
+static void emit_jmpreg(u_int r)

 {
   assem_debug("mov pc,%s\n",regname[r]);
   output_w32(0xe1a00000|rd_rn_rm(15,0,r));
 }
 
 {
   assem_debug("mov pc,%s\n",regname[r]);
   output_w32(0xe1a00000|rd_rn_rm(15,0,r));
 }
 

-void emit_readword_indexed(int offset, int rs, int rt)
+static void emit_readword_indexed(int offset, int rs, int rt)

 {
   assert(offset>-4096&&offset<4096);
   assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);
 {
   assert(offset>-4096&&offset<4096);
   assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);


@@ -1805,37 +1738,44 @@ void emit_readword_indexed(int offset, int rs, int rt)
     output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }
     output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }

-void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
+
+static void emit_readword_dualindexedx4(int rs1, int rs2, int rt)

 {
   assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
 }
 {
   assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
 }

-void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)

 {
   assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
 }
 {
   assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
 }

-void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)

 {
   assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
 }
 {
   assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
 }

-void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)

 {
   assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
 }
 {
   assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
 }

-void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)

 {
   assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
 }
 {
   assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
 }

-void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)

 {
   assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
 }
 {
   assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
 }

-void emit_readword_indexed_tlb(int addr, int rs, int map, int rt)
+
+static void emit_readword_indexed_tlb(int addr, int rs, int map, int rt)

 {
   if(map<0) emit_readword_indexed(addr, rs, rt);
   else {
 {
   if(map<0) emit_readword_indexed(addr, rs, rt);
   else {


@@ -1843,7 +1783,8 @@ void emit_readword_indexed_tlb(int addr, int rs, int map, int rt)
     emit_readword_dualindexedx4(rs, map, rt);
   }
 }
     emit_readword_dualindexedx4(rs, map, rt);
   }
 }

-void emit_readdword_indexed_tlb(int addr, int rs, int map, int rh, int rl)
+
+static void emit_readdword_indexed_tlb(int addr, int rs, int map, int rh, int rl)

 {
   if(map<0) {
     if(rh>=0) emit_readword_indexed(addr, rs, rh);
 {
   if(map<0) {
     if(rh>=0) emit_readword_indexed(addr, rs, rh);


@@ -1855,7 +1796,8 @@ void emit_readdword_indexed_tlb(int addr, int rs, int map, int rh, int rl)
     emit_readword_indexed_tlb(addr, rs, map, rl);
   }
 }
     emit_readword_indexed_tlb(addr, rs, map, rl);
   }
 }

-void emit_movsbl_indexed(int offset, int rs, int rt)
+
+static void emit_movsbl_indexed(int offset, int rs, int rt)

 {
   assert(offset>-256&&offset<256);
   assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);
 {
   assert(offset>-256&&offset<256);
   assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);


@@ -1865,7 +1807,8 @@ void emit_movsbl_indexed(int offset, int rs, int rt)
     output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
     output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }

-void emit_movsbl_indexed_tlb(int addr, int rs, int map, int rt)
+
+static void emit_movsbl_indexed_tlb(int addr, int rs, int map, int rt)

 {
   if(map<0) emit_movsbl_indexed(addr, rs, rt);
   else {
 {
   if(map<0) emit_movsbl_indexed(addr, rs, rt);
   else {


@@ -1881,7 +1824,8 @@ void emit_movsbl_indexed_tlb(int addr, int rs, int map, int rt)
     }
   }
 }
     }
   }
 }

-void emit_movswl_indexed(int offset, int rs, int rt)
+
+static void emit_movswl_indexed(int offset, int rs, int rt)

 {
   assert(offset>-256&&offset<256);
   assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);
 {
   assert(offset>-256&&offset<256);
   assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);


@@ -1891,7 +1835,8 @@ void emit_movswl_indexed(int offset, int rs, int rt)
     output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
     output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }

-void emit_movzbl_indexed(int offset, int rs, int rt)
+
+static void emit_movzbl_indexed(int offset, int rs, int rt)

 {
   assert(offset>-4096&&offset<4096);
   assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);
 {
   assert(offset>-4096&&offset<4096);
   assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);


@@ -1901,12 +1846,14 @@ void emit_movzbl_indexed(int offset, int rs, int rt)
     output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }
     output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }

-void emit_movzbl_dualindexedx4(int rs1, int rs2, int rt)
+
+static void emit_movzbl_dualindexedx4(int rs1, int rs2, int rt)

 {
   assem_debug("ldrb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2)|0x100);
 }
 {
   assem_debug("ldrb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2)|0x100);
 }

-void emit_movzbl_indexed_tlb(int addr, int rs, int map, int rt)
+
+static void emit_movzbl_indexed_tlb(int addr, int rs, int map, int rt)

 {
   if(map<0) emit_movzbl_indexed(addr, rs, rt);
   else {
 {
   if(map<0) emit_movzbl_indexed(addr, rs, rt);
   else {


@@ -1918,7 +1865,8 @@ void emit_movzbl_indexed_tlb(int addr, int rs, int map, int rt)
     }
   }
 }
     }
   }
 }

-void emit_movzwl_indexed(int offset, int rs, int rt)
+
+static void emit_movzwl_indexed(int offset, int rs, int rt)

 {
   assert(offset>-256&&offset<256);
   assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);
 {
   assert(offset>-256&&offset<256);
   assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);


@@ -1928,6 +1876,7 @@ void emit_movzwl_indexed(int offset, int rs, int rt)
     output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
     output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }

+

 static void emit_ldrd(int offset, int rs, int rt)
 {
   assert(offset>-256&&offset<256);
 static void emit_ldrd(int offset, int rs, int rt)
 {
   assert(offset>-256&&offset<256);


@@ -1938,53 +1887,48 @@ static void emit_ldrd(int offset, int rs, int rt)
     output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
     output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }

-void emit_readword(int addr, int rt)
+
+static void emit_readword(int addr, int rt)

 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
   assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
 }
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
   assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
 }

-void emit_movsbl(int addr, int rt)
+
+static unused void emit_movsbl(int addr, int rt)

 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<256);
   assem_debug("ldrsb %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe1d000d0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
 }
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<256);
   assem_debug("ldrsb %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe1d000d0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
 }

-void emit_movswl(int addr, int rt)
+
+static unused void emit_movswl(int addr, int rt)

 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<256);
   assem_debug("ldrsh %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe1d000f0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
 }
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<256);
   assem_debug("ldrsh %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe1d000f0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
 }

-void emit_movzbl(int addr, int rt)
+
+static unused void emit_movzbl(int addr, int rt)

 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
   assem_debug("ldrb %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe5d00000|rd_rn_rm(rt,FP,0)|offset);
 }
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
   assem_debug("ldrb %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe5d00000|rd_rn_rm(rt,FP,0)|offset);
 }

-void emit_movzwl(int addr, int rt)
+
+static unused void emit_movzwl(int addr, int rt)

 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<256);
   assem_debug("ldrh %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe1d000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
 }
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<256);
   assem_debug("ldrh %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe1d000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
 }

-void emit_movzwl_reg(int rs, int rt)
-{
-  assem_debug("movzwl %%%s,%%%s\n",regname[rs]+1,regname[rt]);
-  assert(0);
-}

 
 

-void emit_xchg(int rs, int rt)
-{
-  assem_debug("xchg %%%s,%%%s\n",regname[rs],regname[rt]);
-  assert(0);
-}
-void emit_writeword_indexed(int rt, int offset, int rs)
+static void emit_writeword_indexed(int rt, int offset, int rs)

 {
   assert(offset>-4096&&offset<4096);
   assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);
 {
   assert(offset>-4096&&offset<4096);
   assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);


@@ -1994,12 +1938,14 @@ void emit_writeword_indexed(int rt, int offset, int rs)
     output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }
     output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }

-void emit_writeword_dualindexedx4(int rt, int rs1, int rs2)
+
+static void emit_writeword_dualindexedx4(int rt, int rs1, int rs2)

 {
   assem_debug("str %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2)|0x100);
 }
 {
   assem_debug("str %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2)|0x100);
 }

-void emit_writeword_indexed_tlb(int rt, int addr, int rs, int map, int temp)
+
+static void emit_writeword_indexed_tlb(int rt, int addr, int rs, int map, int temp)

 {
   if(map<0) emit_writeword_indexed(rt, addr, rs);
   else {
 {
   if(map<0) emit_writeword_indexed(rt, addr, rs);
   else {


@@ -2007,7 +1953,8 @@ void emit_writeword_indexed_tlb(int rt, int addr, int rs, int map, int temp)
     emit_writeword_dualindexedx4(rt, rs, map);
   }
 }
     emit_writeword_dualindexedx4(rt, rs, map);
   }
 }

-void emit_writedword_indexed_tlb(int rh, int rl, int addr, int rs, int map, int temp)
+
+static void emit_writedword_indexed_tlb(int rh, int rl, int addr, int rs, int map, int temp)

 {
   if(map<0) {
     if(rh>=0) emit_writeword_indexed(rh, addr, rs);
 {
   if(map<0) {
     if(rh>=0) emit_writeword_indexed(rh, addr, rs);


@@ -2023,7 +1970,8 @@ void emit_writedword_indexed_tlb(int rh, int rl, int addr, int rs, int map, int
     }
   }
 }
     }
   }
 }

-void emit_writehword_indexed(int rt, int offset, int rs)
+
+static void emit_writehword_indexed(int rt, int offset, int rs)

 {
   assert(offset>-256&&offset<256);
   assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);
 {
   assert(offset>-256&&offset<256);
   assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);


@@ -2033,7 +1981,8 @@ void emit_writehword_indexed(int rt, int offset, int rs)
     output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
     output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }

-void emit_writebyte_indexed(int rt, int offset, int rs)
+
+static void emit_writebyte_indexed(int rt, int offset, int rs)

 {
   assert(offset>-4096&&offset<4096);
   assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);
 {
   assert(offset>-4096&&offset<4096);
   assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);


@@ -2043,12 +1992,14 @@ void emit_writebyte_indexed(int rt, int offset, int rs)
     output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }
     output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }

-void emit_writebyte_dualindexedx4(int rt, int rs1, int rs2)
+
+static void emit_writebyte_dualindexedx4(int rt, int rs1, int rs2)

 {
   assem_debug("strb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2)|0x100);
 }
 {
   assem_debug("strb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2)|0x100);
 }

-void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map, int temp)
+
+static void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map, int temp)

 {
   if(map<0) emit_writebyte_indexed(rt, addr, rs);
   else {
 {
   if(map<0) emit_writebyte_indexed(rt, addr, rs);
   else {


@@ -2060,64 +2011,50 @@ void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map, int temp)
     }
   }
 }
     }
   }
 }

-void emit_strcc_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_strcc_dualindexed(int rs1, int rs2, int rt)

 {
   assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
 }
 {
   assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
 }

-void emit_strccb_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_strccb_dualindexed(int rs1, int rs2, int rt)

 {
   assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
 }
 {
   assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
 }

-void emit_strcch_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_strcch_dualindexed(int rs1, int rs2, int rt)

 {
   assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
 }
 {
   assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
 }

-void emit_writeword(int rt, int addr)
+
+static void emit_writeword(int rt, int addr)

 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
   assem_debug("str %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
 }
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
   assem_debug("str %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
 }

-void emit_writehword(int rt, int addr)
+
+static unused void emit_writehword(int rt, int addr)

 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<256);
   assem_debug("strh %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe1c000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
 }
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<256);
   assem_debug("strh %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe1c000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
 }

-void emit_writebyte(int rt, int addr)
+
+static unused void emit_writebyte(int rt, int addr)

 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
   assem_debug("strb %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe5c00000|rd_rn_rm(rt,FP,0)|offset);
 }
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
   assem_debug("strb %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe5c00000|rd_rn_rm(rt,FP,0)|offset);
 }

-void emit_writeword_imm(int imm, int addr)
-{
-  assem_debug("movl $%x,%x\n",imm,addr);
-  assert(0);
-}
-void emit_writebyte_imm(int imm, int addr)
-{
-  assem_debug("movb $%x,%x\n",imm,addr);
-  assert(0);
-}

 
 

-void emit_mul(int rs)
-{
-  assem_debug("mul %%%s\n",regname[rs]);
-  assert(0);
-}
-void emit_imul(int rs)
-{
-  assem_debug("imul %%%s\n",regname[rs]);
-  assert(0);
-}
-void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
+static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)

 {
   assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
   assert(rs1<16);
 {
   assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
   assert(rs1<16);


@@ -2126,7 +2063,8 @@ void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
   assert(lo<16);
   output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
 }
   assert(lo<16);
   output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
 }

-void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
+
+static void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)

 {
   assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
   assert(rs1<16);
 {
   assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
   assert(rs1<16);


@@ -2136,35 +2074,19 @@ void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
   output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
 }
 
   output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
 }
 

-void emit_div(int rs)
-{
-  assem_debug("div %%%s\n",regname[rs]);
-  assert(0);
-}
-void emit_idiv(int rs)
-{
-  assem_debug("idiv %%%s\n",regname[rs]);
-  assert(0);
-}
-void emit_cdq()
-{
-  assem_debug("cdq\n");
-  assert(0);
-}
-
-void emit_clz(int rs,int rt)
+static void emit_clz(int rs,int rt)

 {
   assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
 }
 
 {
   assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
 }
 

-void emit_subcs(int rs1,int rs2,int rt)
+static void emit_subcs(int rs1,int rs2,int rt)

 {
   assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
 }
 
 {
   assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
 }
 

-void emit_shrcc_imm(int rs,u_int imm,int rt)
+static void emit_shrcc_imm(int rs,u_int imm,int rt)

 {
   assert(imm>0);
   assert(imm<32);
 {
   assert(imm>0);
   assert(imm<32);


@@ -2172,7 +2094,7 @@ void emit_shrcc_imm(int rs,u_int imm,int rt)
   output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
 }
 
   output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
 }
 

-void emit_shrne_imm(int rs,u_int imm,int rt)
+static void emit_shrne_imm(int rs,u_int imm,int rt)

 {
   assert(imm>0);
   assert(imm<32);
 {
   assert(imm>0);
   assert(imm<32);


@@ -2180,73 +2102,73 @@ void emit_shrne_imm(int rs,u_int imm,int rt)
   output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
 }
 
   output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
 }
 

-void emit_negmi(int rs, int rt)
+static void emit_negmi(int rs, int rt)

 {
   assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0x42600000|rd_rn_rm(rt,rs,0));
 }
 
 {
   assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0x42600000|rd_rn_rm(rt,rs,0));
 }
 

-void emit_negsmi(int rs, int rt)
+static void emit_negsmi(int rs, int rt)

 {
   assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0x42700000|rd_rn_rm(rt,rs,0));
 }
 
 {
   assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0x42700000|rd_rn_rm(rt,rs,0));
 }
 

-void emit_orreq(u_int rs1,u_int rs2,u_int rt)
+static void emit_orreq(u_int rs1,u_int rs2,u_int rt)

 {
   assem_debug("orreq %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x01800000|rd_rn_rm(rt,rs1,rs2));
 }
 
 {
   assem_debug("orreq %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x01800000|rd_rn_rm(rt,rs1,rs2));
 }
 

-void emit_orrne(u_int rs1,u_int rs2,u_int rt)
+static void emit_orrne(u_int rs1,u_int rs2,u_int rt)

 {
   assem_debug("orrne %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x11800000|rd_rn_rm(rt,rs1,rs2));
 }
 
 {
   assem_debug("orrne %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x11800000|rd_rn_rm(rt,rs1,rs2));
 }
 

-void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)

 {
   assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
 }
 
 {
   assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
 }
 

-void emit_biceq_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_biceq_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)

 {
   assem_debug("biceq %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
 }
 
 {
   assem_debug("biceq %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
 }
 

-void emit_bicne_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_bicne_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)

 {
   assem_debug("bicne %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
 }
 
 {
   assem_debug("bicne %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
 }
 

-void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)

 {
   assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
 }
 
 {
   assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
 }
 

-void emit_biceq_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_biceq_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)

 {
   assem_debug("biceq %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
 }
 
 {
   assem_debug("biceq %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
 }
 

-void emit_bicne_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_bicne_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)

 {
   assem_debug("bicne %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
 }
 
 {
   assem_debug("bicne %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
 }
 

-void emit_teq(int rs, int rt)
+static void emit_teq(int rs, int rt)

 {
   assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
   output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
 }
 
 {
   assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
   output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
 }
 

-void emit_rsbimm(int rs, int imm, int rt)
+static void emit_rsbimm(int rs, int imm, int rt)

 {
   u_int armval;
   genimm_checked(imm,&armval);
 {
   u_int armval;
   genimm_checked(imm,&armval);


@@ -2255,7 +2177,7 @@ void emit_rsbimm(int rs, int imm, int rt)
 }
 
 // Load 2 immediates optimizing for small code size
 }
 
 // Load 2 immediates optimizing for small code size

-void emit_mov2imm_compact(int imm1,u_int rt1,int imm2,u_int rt2)
+static void emit_mov2imm_compact(int imm1,u_int rt1,int imm2,u_int rt2)

 {
   emit_movimm(imm1,rt1);
   u_int armval;
 {
   emit_movimm(imm1,rt1);
   u_int armval;


@@ -2271,7 +2193,7 @@ void emit_mov2imm_compact(int imm1,u_int rt1,int imm2,u_int rt2)
 
 // Conditionally select one of two immediates, optimizing for small code size
 // This will only be called if HAVE_CMOV_IMM is defined
 
 // Conditionally select one of two immediates, optimizing for small code size
 // This will only be called if HAVE_CMOV_IMM is defined

-void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
+static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)

 {
   u_int armval;
   if(genimm(imm2-imm1,&armval)) {
 {
   u_int armval;
   if(genimm(imm2-imm1,&armval)) {


@@ -2305,13 +2227,7 @@ void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
 }
 
 // special case for checking invalid_code
 }
 
 // special case for checking invalid_code

-void emit_cmpmem_indexedsr12_imm(int addr,int r,int imm)
-{
-  assert(0);
-}
-
-// special case for checking invalid_code
-void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
+static void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)

 {
   assert(imm<128&&imm>=0);
   assert(r>=0&&r<16);
 {
   assert(imm<128&&imm>=0);
   assert(r>=0&&r<16);


@@ -2320,14 +2236,7 @@ void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
   emit_cmpimm(HOST_TEMPREG,imm);
 }
 
   emit_cmpimm(HOST_TEMPREG,imm);
 }
 

-// special case for tlb mapping
-void emit_addsr12(int rs1,int rs2,int rt)
-{
-  assem_debug("add %s,%s,%s lsr #12\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe0800620|rd_rn_rm(rt,rs1,rs2));
-}
-
-void emit_callne(int a)
+static void emit_callne(int a)

 {
   assem_debug("blne %x\n",a);
   u_int offset=genjmp(a);
 {
   assem_debug("blne %x\n",a);
   u_int offset=genjmp(a);


@@ -2335,191 +2244,21 @@ void emit_callne(int a)
 }
 
 // Used to preload hash table entries
 }
 
 // Used to preload hash table entries

-void emit_prefetch(void *addr)
-{
-  assem_debug("prefetch %x\n",(int)addr);
-  output_byte(0x0F);
-  output_byte(0x18);
-  output_modrm(0,5,1);
-  output_w32((int)addr);
-}
-void emit_prefetchreg(int r)
+static unused void emit_prefetchreg(int r)

 {
   assem_debug("pld %s\n",regname[r]);
   output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
 }
 
 // Special case for mini_ht
 {
   assem_debug("pld %s\n",regname[r]);
   output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
 }
 
 // Special case for mini_ht

-void emit_ldreq_indexed(int rs, u_int offset, int rt)
+static void emit_ldreq_indexed(int rs, u_int offset, int rt)

 {
   assert(offset<4096);
   assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
   output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
 }
 
 {
   assert(offset<4096);
   assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
   output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
 }
 

-void emit_flds(int r,int sr)
-{
-  assem_debug("flds s%d,[%s]\n",sr,regname[r]);
-  output_w32(0xed900a00|((sr&14)<<11)|((sr&1)<<22)|(r<<16));
-} 
-
-void emit_vldr(int r,int vr)
-{
-  assem_debug("vldr d%d,[%s]\n",vr,regname[r]);
-  output_w32(0xed900b00|(vr<<12)|(r<<16));
-} 
-
-void emit_fsts(int sr,int r)
-{
-  assem_debug("fsts s%d,[%s]\n",sr,regname[r]);
-  output_w32(0xed800a00|((sr&14)<<11)|((sr&1)<<22)|(r<<16));
-} 
-
-void emit_vstr(int vr,int r)
-{
-  assem_debug("vstr d%d,[%s]\n",vr,regname[r]);
-  output_w32(0xed800b00|(vr<<12)|(r<<16));
-} 
-
-void emit_ftosizs(int s,int d)
-{
-  assem_debug("ftosizs s%d,s%d\n",d,s);
-  output_w32(0xeebd0ac0|((d&14)<<11)|((d&1)<<22)|((s&14)>>1)|((s&1)<<5));
-} 
-
-void emit_ftosizd(int s,int d)
-{
-  assem_debug("ftosizd s%d,d%d\n",d,s);
-  output_w32(0xeebd0bc0|((d&14)<<11)|((d&1)<<22)|(s&7));
-} 
-
-void emit_fsitos(int s,int d)
-{
-  assem_debug("fsitos s%d,s%d\n",d,s);
-  output_w32(0xeeb80ac0|((d&14)<<11)|((d&1)<<22)|((s&14)>>1)|((s&1)<<5));
-} 
-
-void emit_fsitod(int s,int d)
-{
-  assem_debug("fsitod d%d,s%d\n",d,s);
-  output_w32(0xeeb80bc0|((d&7)<<12)|((s&14)>>1)|((s&1)<<5));
-} 
-
-void emit_fcvtds(int s,int d)
-{
-  assem_debug("fcvtds d%d,s%d\n",d,s);
-  output_w32(0xeeb70ac0|((d&7)<<12)|((s&14)>>1)|((s&1)<<5));
-} 
-
-void emit_fcvtsd(int s,int d)
-{
-  assem_debug("fcvtsd s%d,d%d\n",d,s);
-  output_w32(0xeeb70bc0|((d&14)<<11)|((d&1)<<22)|(s&7));
-} 
-
-void emit_fsqrts(int s,int d)
-{
-  assem_debug("fsqrts d%d,s%d\n",d,s);
-  output_w32(0xeeb10ac0|((d&14)<<11)|((d&1)<<22)|((s&14)>>1)|((s&1)<<5));
-} 
-
-void emit_fsqrtd(int s,int d)
-{
-  assem_debug("fsqrtd s%d,d%d\n",d,s);
-  output_w32(0xeeb10bc0|((d&7)<<12)|(s&7));
-} 
-
-void emit_fabss(int s,int d)
-{
-  assem_debug("fabss d%d,s%d\n",d,s);
-  output_w32(0xeeb00ac0|((d&14)<<11)|((d&1)<<22)|((s&14)>>1)|((s&1)<<5));
-} 
-
-void emit_fabsd(int s,int d)
-{
-  assem_debug("fabsd s%d,d%d\n",d,s);
-  output_w32(0xeeb00bc0|((d&7)<<12)|(s&7));
-} 
-
-void emit_fnegs(int s,int d)
-{
-  assem_debug("fnegs d%d,s%d\n",d,s);
-  output_w32(0xeeb10a40|((d&14)<<11)|((d&1)<<22)|((s&14)>>1)|((s&1)<<5));
-} 
-
-void emit_fnegd(int s,int d)
-{
-  assem_debug("fnegd s%d,d%d\n",d,s);
-  output_w32(0xeeb10b40|((d&7)<<12)|(s&7));
-} 
-
-void emit_fadds(int s1,int s2,int d)
-{
-  assem_debug("fadds s%d,s%d,s%d\n",d,s1,s2);
-  output_w32(0xee300a00|((d&14)<<11)|((d&1)<<22)|((s1&14)<<15)|((s1&1)<<7)|((s2&14)>>1)|((s2&1)<<5));
-} 
-
-void emit_faddd(int s1,int s2,int d)
-{
-  assem_debug("faddd d%d,d%d,d%d\n",d,s1,s2);
-  output_w32(0xee300b00|((d&7)<<12)|((s1&7)<<16)|(s2&7));
-} 
-
-void emit_fsubs(int s1,int s2,int d)
-{
-  assem_debug("fsubs s%d,s%d,s%d\n",d,s1,s2);
-  output_w32(0xee300a40|((d&14)<<11)|((d&1)<<22)|((s1&14)<<15)|((s1&1)<<7)|((s2&14)>>1)|((s2&1)<<5));
-} 
-
-void emit_fsubd(int s1,int s2,int d)
-{
-  assem_debug("fsubd d%d,d%d,d%d\n",d,s1,s2);
-  output_w32(0xee300b40|((d&7)<<12)|((s1&7)<<16)|(s2&7));
-} 
-
-void emit_fmuls(int s1,int s2,int d)
-{
-  assem_debug("fmuls s%d,s%d,s%d\n",d,s1,s2);
-  output_w32(0xee200a00|((d&14)<<11)|((d&1)<<22)|((s1&14)<<15)|((s1&1)<<7)|((s2&14)>>1)|((s2&1)<<5));
-} 
-
-void emit_fmuld(int s1,int s2,int d)
-{
-  assem_debug("fmuld d%d,d%d,d%d\n",d,s1,s2);
-  output_w32(0xee200b00|((d&7)<<12)|((s1&7)<<16)|(s2&7));
-} 
-
-void emit_fdivs(int s1,int s2,int d)
-{
-  assem_debug("fdivs s%d,s%d,s%d\n",d,s1,s2);
-  output_w32(0xee800a00|((d&14)<<11)|((d&1)<<22)|((s1&14)<<15)|((s1&1)<<7)|((s2&14)>>1)|((s2&1)<<5));
-} 
-
-void emit_fdivd(int s1,int s2,int d)
-{
-  assem_debug("fdivd d%d,d%d,d%d\n",d,s1,s2);
-  output_w32(0xee800b00|((d&7)<<12)|((s1&7)<<16)|(s2&7));
-} 
-
-void emit_fcmps(int x,int y)
-{
-  assem_debug("fcmps s14, s15\n");
-  output_w32(0xeeb47a67);
-} 
-
-void emit_fcmpd(int x,int y)
-{
-  assem_debug("fcmpd d6, d7\n");
-  output_w32(0xeeb46b47);
-} 
-
-void emit_fmstat()
-{
-  assem_debug("fmstat\n");
-  output_w32(0xeef1fa10);
-} 
-
-void emit_bicne_imm(int rs,int imm,int rt)
+static unused void emit_bicne_imm(int rs,int imm,int rt)

 {
   u_int armval;
   genimm_checked(imm,&armval);
 {
   u_int armval;
   genimm_checked(imm,&armval);


@@ -2527,7 +2266,7 @@ void emit_bicne_imm(int rs,int imm,int rt)
   output_w32(0x13c00000|rd_rn_rm(rt,rs,0)|armval);
 }
 
   output_w32(0x13c00000|rd_rn_rm(rt,rs,0)|armval);
 }
 

-void emit_biccs_imm(int rs,int imm,int rt)
+static unused void emit_biccs_imm(int rs,int imm,int rt)

 {
   u_int armval;
   genimm_checked(imm,&armval);
 {
   u_int armval;
   genimm_checked(imm,&armval);


@@ -2535,7 +2274,7 @@ void emit_biccs_imm(int rs,int imm,int rt)
   output_w32(0x23c00000|rd_rn_rm(rt,rs,0)|armval);
 }
 
   output_w32(0x23c00000|rd_rn_rm(rt,rs,0)|armval);
 }
 

-void emit_bicvc_imm(int rs,int imm,int rt)
+static unused void emit_bicvc_imm(int rs,int imm,int rt)

 {
   u_int armval;
   genimm_checked(imm,&armval);
 {
   u_int armval;
   genimm_checked(imm,&armval);


@@ -2543,7 +2282,7 @@ void emit_bicvc_imm(int rs,int imm,int rt)
   output_w32(0x73c00000|rd_rn_rm(rt,rs,0)|armval);
 }
 
   output_w32(0x73c00000|rd_rn_rm(rt,rs,0)|armval);
 }
 

-void emit_bichi_imm(int rs,int imm,int rt)
+static unused void emit_bichi_imm(int rs,int imm,int rt)

 {
   u_int armval;
   genimm_checked(imm,&armval);
 {
   u_int armval;
   genimm_checked(imm,&armval);


@@ -2551,7 +2290,7 @@ void emit_bichi_imm(int rs,int imm,int rt)
   output_w32(0x83c00000|rd_rn_rm(rt,rs,0)|armval);
 }
 
   output_w32(0x83c00000|rd_rn_rm(rt,rs,0)|armval);
 }
 

-void emit_orrvs_imm(int rs,int imm,int rt)
+static unused void emit_orrvs_imm(int rs,int imm,int rt)

 {
   u_int armval;
   genimm_checked(imm,&armval);
 {
   u_int armval;
   genimm_checked(imm,&armval);


@@ -2559,7 +2298,7 @@ void emit_orrvs_imm(int rs,int imm,int rt)
   output_w32(0x63800000|rd_rn_rm(rt,rs,0)|armval);
 }
 
   output_w32(0x63800000|rd_rn_rm(rt,rs,0)|armval);
 }
 

-void emit_orrne_imm(int rs,int imm,int rt)
+static void emit_orrne_imm(int rs,int imm,int rt)

 {
   u_int armval;
   genimm_checked(imm,&armval);
 {
   u_int armval;
   genimm_checked(imm,&armval);


@@ -2567,7 +2306,7 @@ void emit_orrne_imm(int rs,int imm,int rt)
   output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
 }
 
   output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
 }
 

-void emit_andne_imm(int rs,int imm,int rt)
+static void emit_andne_imm(int rs,int imm,int rt)

 {
   u_int armval;
   genimm_checked(imm,&armval);
 {
   u_int armval;
   genimm_checked(imm,&armval);


@@ -2575,7 +2314,7 @@ void emit_andne_imm(int rs,int imm,int rt)
   output_w32(0x12000000|rd_rn_rm(rt,rs,0)|armval);
 }
 
   output_w32(0x12000000|rd_rn_rm(rt,rs,0)|armval);
 }
 

-void emit_addpl_imm(int rs,int imm,int rt)
+static unused void emit_addpl_imm(int rs,int imm,int rt)

 {
   u_int armval;
   genimm_checked(imm,&armval);
 {
   u_int armval;
   genimm_checked(imm,&armval);


@@ -2583,7 +2322,7 @@ void emit_addpl_imm(int rs,int imm,int rt)
   output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
 }
 
   output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
 }
 

-void emit_jno_unlikely(int a)
+static void emit_jno_unlikely(int a)

 {
   //emit_jno(a);
   assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);
 {
   //emit_jno(a);
   assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);


@@ -2601,6 +2340,7 @@ static void save_regs_all(u_int reglist)
   assem_debug("}\n");
   output_w32(0xe88b0000|reglist);
 }
   assem_debug("}\n");
   output_w32(0xe88b0000|reglist);
 }

+

 static void restore_regs_all(u_int reglist)
 {
   int i;
 static void restore_regs_all(u_int reglist)
 {
   int i;


@@ -2612,12 +2352,14 @@ static void restore_regs_all(u_int reglist)
   assem_debug("}\n");
   output_w32(0xe89b0000|reglist);
 }
   assem_debug("}\n");
   output_w32(0xe89b0000|reglist);
 }

+

 // Save registers before function call
 static void save_regs(u_int reglist)
 {
   reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
   save_regs_all(reglist);
 }
 // Save registers before function call
 static void save_regs(u_int reglist)
 {
   reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
   save_regs_all(reglist);
 }

+

 // Restore registers after function call
 static void restore_regs(u_int reglist)
 {
 // Restore registers after function call
 static void restore_regs(u_int reglist)
 {


@@ -2625,31 +2367,9 @@ static void restore_regs(u_int reglist)
   restore_regs_all(reglist);
 }
 
   restore_regs_all(reglist);
 }
 

-// Write back consts using r14 so we don't disturb the other registers
-void wb_consts(signed char i_regmap[],uint64_t i_is32,u_int i_dirty,int i)
-{
-  int hr;
-  for(hr=0;hr<HOST_REGS;hr++) {
-    if(hr!=EXCLUDE_REG&&i_regmap[hr]>=0&&((i_dirty>>hr)&1)) {
-      if(((regs[i].isconst>>hr)&1)&&i_regmap[hr]>0) {
-        if(i_regmap[hr]<64 || !((i_is32>>(i_regmap[hr]&63))&1) ) {
-          int value=constmap[i][hr];
-          if(value==0) {
-            emit_zeroreg(HOST_TEMPREG);
-          }
-          else {
-            emit_movimm(value,HOST_TEMPREG);
-          }
-          emit_storereg(i_regmap[hr],HOST_TEMPREG);
-        }
-      }
-    }
-  }
-}
-

 /* Stubs/epilogue */
 
 /* Stubs/epilogue */
 

-void literal_pool(int n)
+static void literal_pool(int n)

 {
   if(!literalcount) return;
   if(n) {
 {
   if(!literalcount) return;
   if(n) {


@@ -2681,7 +2401,7 @@ void literal_pool(int n)
   literalcount=0;
 }
 
   literalcount=0;
 }
 

-void literal_pool_jumpover(int n)
+static void literal_pool_jumpover(int n)

 {
   if(!literalcount) return;
   if(n) {
 {
   if(!literalcount) return;
   if(n) {


@@ -2693,10 +2413,12 @@ void literal_pool_jumpover(int n)
   set_jump_target(jaddr,(int)out);
 }
 
   set_jump_target(jaddr,(int)out);
 }
 

-emit_extjump2(u_int addr, int target, int linker)
+static void emit_extjump2(u_int addr, int target, int linker)

 {
   u_char *ptr=(u_char *)addr;
   assert((ptr[3]&0x0e)==0xa);
 {
   u_char *ptr=(u_char *)addr;
   assert((ptr[3]&0x0e)==0xa);

+  (void)ptr;
+

   emit_loadlp(target,0);
   emit_loadlp(addr,1);
   assert(addr>=BASE_ADDR&&addr<(BASE_ADDR+(1<<TARGET_SIZE_2)));
   emit_loadlp(target,0);
   emit_loadlp(addr,1);
   assert(addr>=BASE_ADDR&&addr<(BASE_ADDR+(1<<TARGET_SIZE_2)));


@@ -2714,11 +2436,12 @@ emit_extjump2(u_int addr, int target, int linker)
   emit_jmp(linker);
 }
 
   emit_jmp(linker);
 }
 

-emit_extjump(int addr, int target)
+static void emit_extjump(int addr, int target)

 {
   emit_extjump2(addr, target, (int)dyna_linker);
 }
 {
   emit_extjump2(addr, target, (int)dyna_linker);
 }

-emit_extjump_ds(int addr, int target)
+
+static void emit_extjump_ds(int addr, int target)

 {
   emit_extjump2(addr, target, (int)dyna_linker_ds);
 }
 {
   emit_extjump2(addr, target, (int)dyna_linker_ds);
 }


@@ -2799,7 +2522,7 @@ static void mov_loadtype_adj(int type,int rs,int rt)
 #include "pcsxmem.h"
 #include "pcsxmem_inline.c"
 
 #include "pcsxmem.h"
 #include "pcsxmem_inline.c"
 

-do_readstub(int n)
+static void do_readstub(int n)

 {
   assem_debug("do_readstub %x\n",start+stubs[n][3]*4);
   literal_pool(256);
 {
   assem_debug("do_readstub %x\n",start+stubs[n][3]*4);
   literal_pool(256);


@@ -2810,14 +2533,10 @@ do_readstub(int n)
   struct regstat *i_regs=(struct regstat *)stubs[n][5];
   u_int reglist=stubs[n][7];
   signed char *i_regmap=i_regs->regmap;
   struct regstat *i_regs=(struct regstat *)stubs[n][5];
   u_int reglist=stubs[n][7];
   signed char *i_regmap=i_regs->regmap;

-  int addr=get_reg(i_regmap,AGEN1+(i&1));
-  int rth,rt;
-  int ds;
+  int rt;

   if(itype[i]==C1LS||itype[i]==C2LS||itype[i]==LOADLR) {
   if(itype[i]==C1LS||itype[i]==C2LS||itype[i]==LOADLR) {

-    rth=get_reg(i_regmap,FTEMP|64);

     rt=get_reg(i_regmap,FTEMP);
   }else{
     rt=get_reg(i_regmap,FTEMP);
   }else{

-    rth=get_reg(i_regmap,rt1[i]|64);

     rt=get_reg(i_regmap,rt1[i]);
   }
   assert(rs>=0);
     rt=get_reg(i_regmap,rt1[i]);
   }
   assert(rs>=0);


@@ -2883,7 +2602,7 @@ do_readstub(int n)
 }
 
 // return memhandler, or get directly accessable address and return 0
 }
 
 // return memhandler, or get directly accessable address and return 0

-u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host)
+static u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host)

 {
   u_int l1,l2=0;
   l1=((u_int *)table)[addr>>12];
 {
   u_int l1,l2=0;
   l1=((u_int *)table)[addr>>12];


@@ -2909,10 +2628,9 @@ u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host)
   }
 }
 
   }
 }
 

-inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
+static void inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)

 {
   int rs=get_reg(regmap,target);
 {
   int rs=get_reg(regmap,target);

-  int rth=get_reg(regmap,target|64);

   int rt=get_reg(regmap,target);
   if(rs<0) rs=get_reg(regmap,-1);
   assert(rs>=0);
   int rt=get_reg(regmap,target);
   if(rs<0) rs=get_reg(regmap,-1);
   assert(rs>=0);


@@ -2991,7 +2709,7 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
   restore_regs(reglist);
 }
 
   restore_regs(reglist);
 }
 

-do_writestub(int n)
+static void do_writestub(int n)

 {
   assem_debug("do_writestub %x\n",start+stubs[n][3]*4);
   literal_pool(256);
 {
   assem_debug("do_writestub %x\n",start+stubs[n][3]*4);
   literal_pool(256);


@@ -3002,14 +2720,10 @@ do_writestub(int n)
   struct regstat *i_regs=(struct regstat *)stubs[n][5];
   u_int reglist=stubs[n][7];
   signed char *i_regmap=i_regs->regmap;
   struct regstat *i_regs=(struct regstat *)stubs[n][5];
   u_int reglist=stubs[n][7];
   signed char *i_regmap=i_regs->regmap;

-  int addr=get_reg(i_regmap,AGEN1+(i&1));
-  int rth,rt,r;
-  int ds;
+  int rt,r;

   if(itype[i]==C1LS||itype[i]==C2LS) {
   if(itype[i]==C1LS||itype[i]==C2LS) {

-    rth=get_reg(i_regmap,FTEMP|64);

     rt=get_reg(i_regmap,r=FTEMP);
   }else{
     rt=get_reg(i_regmap,r=FTEMP);
   }else{

-    rth=get_reg(i_regmap,rs2[i]|64);

     rt=get_reg(i_regmap,r=rs2[i]);
   }
   assert(rs>=0);
     rt=get_reg(i_regmap,r=rs2[i]);
   }
   assert(rs>=0);


@@ -3075,10 +2789,9 @@ do_writestub(int n)
   emit_jmp(ra);
 }
 
   emit_jmp(ra);
 }
 

-inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
+static void inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)

 {
   int rs=get_reg(regmap,-1);
 {
   int rs=get_reg(regmap,-1);

-  int rth=get_reg(regmap,target|64);

   int rt=get_reg(regmap,target);
   assert(rs>=0);
   assert(rt>=0);
   int rt=get_reg(regmap,target);
   assert(rs>=0);
   assert(rt>=0);


@@ -3112,7 +2825,7 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target,
   restore_regs(reglist);
 }
 
   restore_regs(reglist);
 }
 

-do_unalignedwritestub(int n)
+static void do_unalignedwritestub(int n)

 {
   assem_debug("do_unalignedwritestub %x\n",start+stubs[n][3]*4);
   literal_pool(256);
 {
   assem_debug("do_unalignedwritestub %x\n",start+stubs[n][3]*4);
   literal_pool(256);


@@ -3125,7 +2838,6 @@ do_unalignedwritestub(int n)
   signed char *i_regmap=i_regs->regmap;
   int temp2=get_reg(i_regmap,FTEMP);
   int rt;
   signed char *i_regmap=i_regs->regmap;
   int temp2=get_reg(i_regmap,FTEMP);
   int rt;

-  int ds, real_rs;

   rt=get_reg(i_regmap,rs2[i]);
   assert(rt>=0);
   assert(addr>=0);
   rt=get_reg(i_regmap,rs2[i]);
   assert(rt>=0);
   assert(addr>=0);


@@ -3201,12 +2913,7 @@ do_unalignedwritestub(int n)
 #endif
 }
 
 #endif
 }
 

-void printregs(int edi,int esi,int ebp,int esp,int b,int d,int c,int a)
-{
-  printf("regs: %x %x %x %x %x %x %x (%x)\n",a,b,c,d,ebp,esi,edi,(&edi)[-1]);
-}
-
-do_invstub(int n)
+static void do_invstub(int n)

 {
   literal_pool(20);
   u_int reglist=stubs[n][3];
 {
   literal_pool(20);
   u_int reglist=stubs[n][3];


@@ -3243,7 +2950,7 @@ int do_dirty_stub(int i)
   return entry;
 }
 
   return entry;
 }
 

-void do_dirty_stub_ds()
+static void do_dirty_stub_ds()

 {
   // Careful about the code output here, verify_dirty needs to parse it.
   #ifndef HAVE_ARMV7
 {
   // Careful about the code output here, verify_dirty needs to parse it.
   #ifndef HAVE_ARMV7


@@ -3261,7 +2968,7 @@ void do_dirty_stub_ds()
   emit_call((int)&verify_code_ds);
 }
 
   emit_call((int)&verify_code_ds);
 }
 

-do_cop1stub(int n)
+static void do_cop1stub(int n)

 {
   literal_pool(256);
   assem_debug("do_cop1stub %x\n",start+stubs[n][3]*4);
 {
   literal_pool(256);
   assem_debug("do_cop1stub %x\n",start+stubs[n][3]*4);


@@ -3282,16 +2989,9 @@ do_cop1stub(int n)
   emit_jmp(ds?(int)fp_exception_ds:(int)fp_exception);
 }
 
   emit_jmp(ds?(int)fp_exception_ds:(int)fp_exception);
 }
 

-static int do_tlb_r(int a, ...) { return 0; }
-static int do_tlb_r_branch(int a, ...) { return 0; }
-static int gen_tlb_addr_r(int a, ...) { return 0; }
-static int do_tlb_w(int a, ...) { return 0; }
-static int do_tlb_w_branch(int a, ...) { return 0; }
-static int gen_tlb_addr_w(int a, ...) { return 0; }
-

 /* Special assem */
 
 /* Special assem */
 

-void shift_assemble_arm(int i,struct regstat *i_regs)
+static void shift_assemble_arm(int i,struct regstat *i_regs)

 {
   if(rt1[i]) {
     if(opcode2[i]<=0x07) // SLLV/SRLV/SRAV
 {
   if(rt1[i]) {
     if(opcode2[i]<=0x07) // SLLV/SRLV/SRAV


@@ -3521,7 +3221,7 @@ static int get_ptr_mem_type(u_int a)
 
 static int emit_fastpath_cmp_jump(int i,int addr,int *addr_reg_override)
 {
 
 static int emit_fastpath_cmp_jump(int i,int addr,int *addr_reg_override)
 {

-  int jaddr,type=0;
+  int jaddr=0,type=0;

   int mr=rs1[i];
   if(((smrv_strong|smrv_weak)>>mr)&1) {
     type=get_ptr_mem_type(smrv[mr]);
   int mr=rs1[i];
   if(((smrv_strong|smrv_weak)>>mr)&1) {
     type=get_ptr_mem_type(smrv[mr]);


@@ -3583,7 +3283,7 @@ static int emit_fastpath_cmp_jump(int i,int addr,int *addr_reg_override)
 
 #define shift_assemble shift_assemble_arm
 
 
 #define shift_assemble shift_assemble_arm
 

-void loadlr_assemble_arm(int i,struct regstat *i_regs)
+static void loadlr_assemble_arm(int i,struct regstat *i_regs)

 {
   int s,th,tl,temp,temp2,addr,map=-1;
   int offset;
 {
   int s,th,tl,temp,temp2,addr,map=-1;
   int offset;


@@ -3609,52 +3309,30 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
     c=(i_regs->wasconst>>s)&1;
     if(c) {
       memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80000000+RAM_SIZE;
     c=(i_regs->wasconst>>s)&1;
     if(c) {
       memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80000000+RAM_SIZE;

-      if(using_tlb&&((signed int)(constmap[i][s]+offset))>=(signed int)0xC0000000) memtarget=1;

     }
   }
     }
   }

-  if(!using_tlb) {
-    if(!c) {
-      #ifdef RAM_OFFSET
-      map=get_reg(i_regs->regmap,ROREG);
-      if(map<0) emit_loadreg(ROREG,map=HOST_TEMPREG);
-      #endif
-      emit_shlimm(addr,3,temp);
-      if (opcode[i]==0x22||opcode[i]==0x26) {
-        emit_andimm(addr,0xFFFFFFFC,temp2); // LWL/LWR
-      }else{
-        emit_andimm(addr,0xFFFFFFF8,temp2); // LDL/LDR
-      }
-      jaddr=emit_fastpath_cmp_jump(i,temp2,&fastload_reg_override);
+  if(!c) {
+    #ifdef RAM_OFFSET
+    map=get_reg(i_regs->regmap,ROREG);
+    if(map<0) emit_loadreg(ROREG,map=HOST_TEMPREG);
+    #endif
+    emit_shlimm(addr,3,temp);
+    if (opcode[i]==0x22||opcode[i]==0x26) {
+      emit_andimm(addr,0xFFFFFFFC,temp2); // LWL/LWR
+    }else{
+      emit_andimm(addr,0xFFFFFFF8,temp2); // LDL/LDR

     }
     }

-    else {
-      if(ram_offset&&memtarget) {
-        emit_addimm(temp2,ram_offset,HOST_TEMPREG);
-        fastload_reg_override=HOST_TEMPREG;
-      }
-      if (opcode[i]==0x22||opcode[i]==0x26) {
-        emit_movimm(((constmap[i][s]+offset)<<3)&24,temp); // LWL/LWR
-      }else{
-        emit_movimm(((constmap[i][s]+offset)<<3)&56,temp); // LDL/LDR
-      }
+    jaddr=emit_fastpath_cmp_jump(i,temp2,&fastload_reg_override);
+  }
+  else {
+    if(ram_offset&&memtarget) {
+      emit_addimm(temp2,ram_offset,HOST_TEMPREG);
+      fastload_reg_override=HOST_TEMPREG;

     }
     }

-  }else{ // using tlb
-    int a;
-    if(c) {
-      a=-1;
-    }else if (opcode[i]==0x22||opcode[i]==0x26) {
-      a=0xFFFFFFFC; // LWL/LWR
+    if (opcode[i]==0x22||opcode[i]==0x26) {
+      emit_movimm(((constmap[i][s]+offset)<<3)&24,temp); // LWL/LWR

     }else{
     }else{

-      a=0xFFFFFFF8; // LDL/LDR
-    }
-    map=get_reg(i_regs->regmap,TLREG);
-    assert(map>=0);
-    reglist&=~(1<<map);
-    if(c) {
-      if (opcode[i]==0x22||opcode[i]==0x26) {
-        emit_movimm(((constmap[i][s]+offset)<<3)&24,temp); // LWL/LWR
-      }else{
-        emit_movimm(((constmap[i][s]+offset)<<3)&56,temp); // LDL/LDR
-      }
+      emit_movimm(((constmap[i][s]+offset)<<3)&56,temp); // LDL/LDR

     }
   }
   if (opcode[i]==0x22||opcode[i]==0x26) { // LWL/LWR
     }
   }
   if (opcode[i]==0x22||opcode[i]==0x26) { // LWL/LWR


@@ -3734,7 +3412,7 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
 }
 #define loadlr_assemble loadlr_assemble_arm
 
 }
 #define loadlr_assemble loadlr_assemble_arm
 

-void cop0_assemble(int i,struct regstat *i_regs)
+static void cop0_assemble(int i,struct regstat *i_regs)

 {
   if(opcode2[i]==0) // MFC0
   {
 {
   if(opcode2[i]==0) // MFC0
   {


@@ -3921,7 +3599,7 @@ static void cop2_put_dreg(u_int copr,signed char sl,signed char temp)
   }
 }
 
   }
 }
 

-void cop2_assemble(int i,struct regstat *i_regs)
+static void cop2_assemble(int i,struct regstat *i_regs)

 {
   u_int copr=(source[i]>>11)&0x1f;
   signed char temp=get_reg(i_regs->regmap,-1);
 {
   u_int copr=(source[i]>>11)&0x1f;
   signed char temp=get_reg(i_regs->regmap,-1);


@@ -4011,7 +3689,6 @@ static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
 
 static void c2op_assemble(int i,struct regstat *i_regs)
 {
 
 static void c2op_assemble(int i,struct regstat *i_regs)
 {

-  signed char temp=get_reg(i_regs->regmap,-1);

   u_int c2op=source[i]&0x3f;
   u_int hr,reglist_full=0,reglist;
   int need_flags,need_ir;
   u_int c2op=source[i]&0x3f;
   u_int hr,reglist_full=0,reglist;
   int need_flags,need_ir;


@@ -4130,7 +3807,7 @@ static void c2op_assemble(int i,struct regstat *i_regs)
   }
 }
 
   }
 }
 

-void cop1_unusable(int i,struct regstat *i_regs)
+static void cop1_unusable(int i,struct regstat *i_regs)

 {
   // XXX: should just just do the exception instead
   if(!cop1_usable) {
 {
   // XXX: should just just do the exception instead
   if(!cop1_usable) {


@@ -4141,28 +3818,28 @@ void cop1_unusable(int i,struct regstat *i_regs)
   }
 }
 
   }
 }
 

-void cop1_assemble(int i,struct regstat *i_regs)
+static void cop1_assemble(int i,struct regstat *i_regs)

 {
   cop1_unusable(i, i_regs);
 }
 
 {
   cop1_unusable(i, i_regs);
 }
 

-void fconv_assemble_arm(int i,struct regstat *i_regs)
+static void fconv_assemble_arm(int i,struct regstat *i_regs)

 {
   cop1_unusable(i, i_regs);
 }
 #define fconv_assemble fconv_assemble_arm
 
 {
   cop1_unusable(i, i_regs);
 }
 #define fconv_assemble fconv_assemble_arm
 

-void fcomp_assemble(int i,struct regstat *i_regs)
+static void fcomp_assemble(int i,struct regstat *i_regs)

 {
   cop1_unusable(i, i_regs);
 }
 
 {
   cop1_unusable(i, i_regs);
 }
 

-void float_assemble(int i,struct regstat *i_regs)
+static void float_assemble(int i,struct regstat *i_regs)

 {
   cop1_unusable(i, i_regs);
 }
 
 {
   cop1_unusable(i, i_regs);
 }
 

-void multdiv_assemble_arm(int i,struct regstat *i_regs)
+static void multdiv_assemble_arm(int i,struct regstat *i_regs)

 {
   //  case 0x18: MULT
   //  case 0x19: MULTU
 {
   //  case 0x18: MULT
   //  case 0x19: MULTU


@@ -4287,25 +3964,25 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
 }
 #define multdiv_assemble multdiv_assemble_arm
 
 }
 #define multdiv_assemble multdiv_assemble_arm
 

-void do_preload_rhash(int r) {
+static void do_preload_rhash(int r) {

   // Don't need this for ARM.  On x86, this puts the value 0xf8 into the
   // register.  On ARM the hash can be done with a single instruction (below)
 }
 
   // Don't need this for ARM.  On x86, this puts the value 0xf8 into the
   // register.  On ARM the hash can be done with a single instruction (below)
 }
 

-void do_preload_rhtbl(int ht) {
+static void do_preload_rhtbl(int ht) {

   emit_addimm(FP,(int)&mini_ht-(int)&dynarec_local,ht);
 }
 
   emit_addimm(FP,(int)&mini_ht-(int)&dynarec_local,ht);
 }
 

-void do_rhash(int rs,int rh) {
+static void do_rhash(int rs,int rh) {

   emit_andimm(rs,0xf8,rh);
 }
 
   emit_andimm(rs,0xf8,rh);
 }
 

-void do_miniht_load(int ht,int rh) {
+static void do_miniht_load(int ht,int rh) {

   assem_debug("ldr %s,[%s,%s]!\n",regname[rh],regname[ht],regname[rh]);
   output_w32(0xe7b00000|rd_rn_rm(rh,ht,rh));
 }
 
   assem_debug("ldr %s,[%s,%s]!\n",regname[rh],regname[ht],regname[rh]);
   output_w32(0xe7b00000|rd_rn_rm(rh,ht,rh));
 }
 

-void do_miniht_jump(int rs,int rh,int ht) {
+static void do_miniht_jump(int rs,int rh,int ht) {

   emit_cmp(rh,rs);
   emit_ldreq_indexed(ht,4,15);
   #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
   emit_cmp(rh,rs);
   emit_ldreq_indexed(ht,4,15);
   #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK


@@ -4316,7 +3993,7 @@ void do_miniht_jump(int rs,int rh,int ht) {
   #endif
 }
 
   #endif
 }
 

-void do_miniht_insert(u_int return_address,int rt,int temp) {
+static void do_miniht_insert(u_int return_address,int rt,int temp) {

   #ifndef HAVE_ARMV7
   emit_movimm(return_address,rt); // PC into link register
   add_to_linker((int)out,return_address,1);
   #ifndef HAVE_ARMV7
   emit_movimm(return_address,rt); // PC into link register
   add_to_linker((int)out,return_address,1);


@@ -4333,10 +4010,10 @@ void do_miniht_insert(u_int return_address,int rt,int temp) {
   #endif
 }
 
   #endif
 }
 

-void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,uint64_t is32_pre,uint64_t u,uint64_t uu)
+static void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,uint64_t is32_pre,uint64_t u,uint64_t uu)

 {
   //if(dirty_pre==dirty) return;
 {
   //if(dirty_pre==dirty) return;

-  int hr,reg,new_hr;
+  int hr,reg;

   for(hr=0;hr<HOST_REGS;hr++) {
     if(hr!=EXCLUDE_REG) {
       reg=pre[hr];
   for(hr=0;hr<HOST_REGS;hr++) {
     if(hr!=EXCLUDE_REG) {
       reg=pre[hr];


@@ -4362,7 +4039,7 @@ void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,
 
 
 /* using strd could possibly help but you'd have to allocate registers in pairs
 
 
 /* using strd could possibly help but you'd have to allocate registers in pairs

-void wb_invalidate_arm(signed char pre[],signed char entry[],uint64_t dirty,uint64_t is32,uint64_t u,uint64_t uu)
+static void wb_invalidate_arm(signed char pre[],signed char entry[],uint64_t dirty,uint64_t is32,uint64_t u,uint64_t uu)

 {
   int hr;
   int wrote=-1;
 {
   int hr;
   int wrote=-1;


@@ -4419,7 +4096,7 @@ void wb_invalidate_arm(signed char pre[],signed char entry[],uint64_t dirty,uint
 
 // Clearing the cache is rather slow on ARM Linux, so mark the areas
 // that need to be cleared, and then only clear these areas once.
 
 // Clearing the cache is rather slow on ARM Linux, so mark the areas
 // that need to be cleared, and then only clear these areas once.

-void do_clear_cache()
+static void do_clear_cache()

 {
   int i,j;
   for (i=0;i<(1<<(TARGET_SIZE_2-17));i++)
 {
   int i,j;
   for (i=0;i<(1<<(TARGET_SIZE_2-17));i++)


@@ -4427,7 +4104,7 @@ void do_clear_cache()
     u_int bitmap=needs_clear_cache[i];
     if(bitmap) {
       u_int start,end;
     u_int bitmap=needs_clear_cache[i];
     if(bitmap) {
       u_int start,end;

-      for(j=0;j<32;j++) 
+      for(j=0;j<32;j++)

       {
         if(bitmap&(1<<j)) {
           start=(u_int)BASE_ADDR+i*131072+j*4096;
       {
         if(bitmap&(1<<j)) {
           start=(u_int)BASE_ADDR+i*131072+j*4096;