drc: sync gte with interpreter

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / assem_arm.c

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index f3f89e1..c950585 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -1008,6 +1008,15 @@ void emit_or_and_set_flags(int rs1,int rs2,int rt)
   output_w32(0xe1900000|rd_rn_rm(rt,rs1,rs2));
 }
 
+void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
+{
+  assert(rs<16);
+  assert(rt<16);
+  assert(imm<32);
+  assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs],imm);
+  output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
+}
+
 void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
 {
   assert(rs<16);
@@ -2650,8 +2659,11 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
   int rs=get_reg(regmap,target);
   int rth=get_reg(regmap,target|64);
   int rt=get_reg(regmap,target);
+  // allow for PCSX dummy reads
+  //assert(rt>=0);
+  if(rs<0)
+    rs=get_reg(regmap,-1);
   assert(rs>=0);
-  assert(rt>=0);
   int ftable=0;
   if(type==LOADB_STUB||type==LOADBU_STUB)
     ftable=(int)readmemb;
@@ -2664,6 +2676,8 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
     ftable=(int)readmemd;
 #endif
   assert(ftable!=0);
+  if(target==0)
+    emit_movimm(addr,rs);
   emit_writeword(rs,(int)&address);
   //emit_pusha();
   save_regs(reglist);
@@ -2697,19 +2711,21 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
   }
   //emit_popa();
   restore_regs(reglist);
-  if(type==LOADB_STUB)
-    emit_movsbl((int)&readmem_dword,rt);
-  if(type==LOADBU_STUB)
-    emit_movzbl((int)&readmem_dword,rt);
-  if(type==LOADH_STUB)
-    emit_movswl((int)&readmem_dword,rt);
-  if(type==LOADHU_STUB)
-    emit_movzwl((int)&readmem_dword,rt);
-  if(type==LOADW_STUB)
-    emit_readword((int)&readmem_dword,rt);
-  if(type==LOADD_STUB) {
-    emit_readword((int)&readmem_dword,rt);
-    if(rth>=0) emit_readword(((int)&readmem_dword)+4,rth);
+  if(rt>=0) {
+    if(type==LOADB_STUB)
+      emit_movsbl((int)&readmem_dword,rt);
+    if(type==LOADBU_STUB)
+      emit_movzbl((int)&readmem_dword,rt);
+    if(type==LOADH_STUB)
+      emit_movswl((int)&readmem_dword,rt);
+    if(type==LOADHU_STUB)
+      emit_movzwl((int)&readmem_dword,rt);
+    if(type==LOADW_STUB)
+      emit_readword((int)&readmem_dword,rt);
+    if(type==LOADD_STUB) {
+      emit_readword((int)&readmem_dword,rt);
+      if(rth>=0) emit_readword(((int)&readmem_dword)+4,rth);
+    }
   }
 }
 
@@ -3405,15 +3421,11 @@ void cop0_assemble(int i,struct regstat *i_regs)
     assert(s>=0);
     emit_writeword(s,(int)&readmem_dword);
     wb_register(rs1[i],i_regs->regmap,i_regs->dirty,i_regs->is32);
-#ifdef MUPEN64 /// FIXME
+#ifdef MUPEN64
     emit_addimm(FP,(int)&fake_pc-(int)&dynarec_local,0);
     emit_movimm((source[i]>>11)&0x1f,1);
     emit_writeword(0,(int)&PC);
     emit_writebyte(1,(int)&(fake_pc.f.r.nrd));
-#endif
-#ifdef PCSX
-    emit_movimm(source[i],0);
-    emit_writeword(0,(int)&psxRegs.code);
 #endif
     if(copr==9||copr==11||copr==12||copr==13) {
       emit_readword((int)&last_count,ECX);
@@ -3427,6 +3439,19 @@ void cop0_assemble(int i,struct regstat *i_regs)
     // The interrupt must be taken immediately, because a subsequent
     // instruction might disable interrupts again.
     if(copr==12||copr==13) {
+#ifdef PCSX
+      if (is_delayslot) {
+        // burn cycles to cause cc_interrupt, which will
+        // reschedule next_interupt. Relies on CCREG from above.
+        assem_debug("MTC0 DS %d\n", copr);
+        emit_writeword(HOST_CCREG,(int)&last_count);
+        emit_movimm(0,HOST_CCREG);
+        emit_storereg(CCREG,HOST_CCREG);
+        emit_movimm(copr,0);
+        emit_call((int)pcsx_mtc0_ds);
+        return;
+      }
+#endif
       emit_movimm(start+i*4+4,0);
       emit_movimm(0,1);
       emit_writeword(0,(int)&pcaddr);
@@ -3434,7 +3459,12 @@ void cop0_assemble(int i,struct regstat *i_regs)
     }
     //else if(copr==12&&is_delayslot) emit_call((int)MTC0_R12);
     //else
+#ifdef PCSX
+    emit_movimm(copr,0);
+    emit_call((int)pcsx_mtc0);
+#else
     emit_call((int)MTC0);
+#endif
     if(copr==9||copr==11||copr==12||copr==13) {
       emit_readword((int)&Count,HOST_CCREG);
       emit_readword((int)&next_interupt,ECX);
@@ -3526,25 +3556,22 @@ static void cop2_get_dreg(u_int copr,signed char tl,signed char temp)
       emit_writeword(tl,(int)&reg_cop2d[copr]);
       break;
     case 28:
-    case 30:
-      emit_movimm(0,tl);
-      break;
     case 29:
       emit_readword((int)&reg_cop2d[9],temp);
       emit_testimm(temp,0x8000); // do we need this?
       emit_andimm(temp,0xf80,temp);
       emit_andne_imm(temp,0,temp);
-      emit_shr(temp,7,tl);
+      emit_shrimm(temp,7,tl);
       emit_readword((int)&reg_cop2d[10],temp);
       emit_testimm(temp,0x8000);
       emit_andimm(temp,0xf80,temp);
       emit_andne_imm(temp,0,temp);
-      emit_orrshr(temp,2,tl);
+      emit_orrshr_imm(temp,2,tl);
       emit_readword((int)&reg_cop2d[11],temp);
       emit_testimm(temp,0x8000);
       emit_andimm(temp,0xf80,temp);
       emit_andne_imm(temp,0,temp);
-      emit_orrshl(temp,3,tl);
+      emit_orrshl_imm(temp,3,tl);
       emit_writeword(tl,(int)&reg_cop2d[copr]);
       break;
     default:
@@ -3566,13 +3593,13 @@ static void cop2_put_dreg(u_int copr,signed char sl,signed char temp)
       break;
     case 28:
       emit_andimm(sl,0x001f,temp);
-      emit_shl(temp,7,temp);
+      emit_shlimm(temp,7,temp);
       emit_writeword(temp,(int)&reg_cop2d[9]);
       emit_andimm(sl,0x03e0,temp);
-      emit_shl(temp,2,temp);
+      emit_shlimm(temp,2,temp);
       emit_writeword(temp,(int)&reg_cop2d[10]);
       emit_andimm(sl,0x7c00,temp);
-      emit_shr(temp,3,temp);
+      emit_shrimm(temp,3,temp);
       emit_writeword(temp,(int)&reg_cop2d[11]);
       emit_writeword(sl,(int)&reg_cop2d[28]);
       break;
@@ -3583,8 +3610,6 @@ static void cop2_put_dreg(u_int copr,signed char sl,signed char temp)
       emit_writeword(sl,(int)&reg_cop2d[30]);
       emit_writeword(temp,(int)&reg_cop2d[31]);
       break;
-    case 7:
-    case 29:
     case 31:
       break;
     default: