yet more random armv5 tweaks

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / assem_arm.h

diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index 5060095..917d276 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -8,6 +8,7 @@
 #define CORTEX_A8_BRANCH_PREDICTION_HACK 1
 #define USE_MINI_HT 1
 //#define REG_PREFETCH 1
+#define HAVE_CONDITIONAL_CALL 1
 #define DISABLE_TLB 1
 //#define MUPEN64
 #define FORCE32 1
@@ -15,6 +16,12 @@
 #define PCSX 1
 #define RAM_SIZE 0x200000
 
+#ifndef __ARM_ARCH_7A__
+#define ARMv5_ONLY
+//#undef CORTEX_A8_BRANCH_PREDICTION_HACK
+//#undef USE_MINI_HT
+#endif
+
 #ifdef FORCE32
 #define REG_SHIFT 2
 #else