drc: optional address error exception support

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / assem_arm64.c

diff --git a/libpcsxcore/new_dynarec/assem_arm64.c b/libpcsxcore/new_dynarec/assem_arm64.c
index d35ad45..670f379 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm64.c
+++ b/libpcsxcore/new_dynarec/assem_arm64.c
@@ -23,9 +23,6 @@
 #include "pcnt.h"
 #include "arm_features.h"
 
-void do_memhandler_pre();
-void do_memhandler_post();
-
 /* Linker */
 static void set_jump_target(void *addr, void *target)
 {
@@ -1541,28 +1538,27 @@ static void do_readstub(int n)
 static void inline_readstub(enum stub_type type, int i, u_int addr,
   const signed char regmap[], int target, int adj, u_int reglist)
 {
-  int rs=get_reg(regmap,target);
-  int rt=get_reg(regmap,target);
-  if(rs<0) rs=get_reg_temp(regmap);
-  assert(rs>=0);
+  int ra = cinfo[i].addr;
+  int rt = get_reg(regmap, target);
+  assert(ra >= 0);
   u_int is_dynamic=0;
   uintptr_t host_addr = 0;
   void *handler;
   int cc=get_reg(regmap,CCREG);
-  //if(pcsx_direct_read(type,addr,adj,cc,target?rs:-1,rt))
+  //if(pcsx_direct_read(type,addr,adj,cc,target?ra:-1,rt))
   //  return;
   handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
   if (handler == NULL) {
     if(rt<0||dops[i].rt1==0)
       return;
     if (addr != host_addr)
-      emit_movimm_from64(addr, rs, host_addr, rs);
+      emit_movimm_from64(addr, ra, host_addr, ra);
     switch(type) {
-      case LOADB_STUB:  emit_movsbl_indexed(0,rs,rt); break;
-      case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
-      case LOADH_STUB:  emit_movswl_indexed(0,rs,rt); break;
-      case LOADHU_STUB: emit_movzwl_indexed(0,rs,rt); break;
-      case LOADW_STUB:  emit_readword_indexed(0,rs,rt); break;
+      case LOADB_STUB:  emit_movsbl_indexed(0,ra,rt); break;
+      case LOADBU_STUB: emit_movzbl_indexed(0,ra,rt); break;
+      case LOADH_STUB:  emit_movswl_indexed(0,ra,rt); break;
+      case LOADHU_STUB: emit_movzwl_indexed(0,ra,rt); break;
+      case LOADW_STUB:  emit_readword_indexed(0,ra,rt); break;
       default:          assert(0);
     }
     return;
@@ -1583,8 +1579,8 @@ static void inline_readstub(enum stub_type type, int i, u_int addr,
   save_regs(reglist);
   if(target==0)
     emit_movimm(addr,0);
-  else if(rs!=0)
-    emit_mov(rs,0);
+  else if(ra!=0)
+    emit_mov(ra,0);
   if(cc<0)
     emit_loadreg(CCREG,2);
   emit_addimm(cc<0?2:cc,adj,2);
@@ -1702,19 +1698,19 @@ static void do_writestub(int n)
 static void inline_writestub(enum stub_type type, int i, u_int addr,
   const signed char regmap[], int target, int adj, u_int reglist)
 {
-  int rs = get_reg_temp(regmap);
+  int ra = cinfo[i].addr;
   int rt = get_reg(regmap,target);
-  assert(rs >= 0);
+  assert(ra >= 0);
   assert(rt >= 0);
   uintptr_t host_addr = 0;
   void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
   if (handler == NULL) {
     if (addr != host_addr)
-      emit_movimm_from64(addr, rs, host_addr, rs);
+      emit_movimm_from64(addr, ra, host_addr, ra);
     switch (type) {
-      case STOREB_STUB: emit_writebyte_indexed(rt, 0, rs); break;
-      case STOREH_STUB: emit_writehword_indexed(rt, 0, rs); break;
-      case STOREW_STUB: emit_writeword_indexed(rt, 0, rs); break;
+      case STOREB_STUB: emit_writebyte_indexed(rt, 0, ra); break;
+      case STOREH_STUB: emit_writehword_indexed(rt, 0, ra); break;
+      case STOREW_STUB: emit_writeword_indexed(rt, 0, ra); break;
       default:          assert(0);
     }
     return;
@@ -1722,7 +1718,7 @@ static void inline_writestub(enum stub_type type, int i, u_int addr,
 
   // call a memhandler
   save_regs(reglist);
-  emit_writeword(rs, &address); // some handlers still need it
+  emit_writeword(ra, &address); // some handlers still need it
   loadstore_extend(type, rt, 0);
   int cc, cc_use;
   cc = cc_use = get_reg(regmap, CCREG);