reduce some code duplication

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / assem_arm64.c

diff --git a/libpcsxcore/new_dynarec/assem_arm64.c b/libpcsxcore/new_dynarec/assem_arm64.c
index 670f379..97e1fb1 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm64.c
+++ b/libpcsxcore/new_dynarec/assem_arm64.c
@@ -101,9 +101,17 @@ static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
 }
 
 // Alloc cycle count into dedicated register
-static void alloc_cc(struct regstat *cur,int i)
+static void alloc_cc(struct regstat *cur, int i)
 {
-  alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
+  alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
+}
+
+static void alloc_cc_optional(struct regstat *cur, int i)
+{
+  if (cur->regmap[HOST_CCREG] < 0) {
+    alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
+    cur->noevict &= ~(1u << HOST_CCREG);
+  }
 }
 
 /* Special alloc */
@@ -484,7 +492,6 @@ static void emit_loadreg(u_int r, u_int hr)
     //case HIREG: addr = &hi; break;
     //case LOREG: addr = &lo; break;
     case CCREG: addr = &cycle_count; break;
-    case CSREG: addr = &psxRegs.CP0.n.SR; break;
     case INVCP: addr = &invc_ptr; is64 = 1; break;
     case ROREG: addr = &ram_offset; is64 = 1; break;
     default:
@@ -1943,6 +1950,65 @@ static void multdiv_assemble_arm64(int i, const struct regstat *i_regs)
 }
 #define multdiv_assemble multdiv_assemble_arm64
 
+// wb_dirtys making use of stp when possible
+static void wb_dirtys(const signed char i_regmap[], u_int i_dirty)
+{
+  signed char mregs[34+1];
+  int r, hr;
+  memset(mregs, -1, sizeof(mregs));
+  for (hr = 0; hr < HOST_REGS; hr++) {
+    r = i_regmap[hr];
+    if (hr == EXCLUDE_REG || r <= 0 || r == CCREG)
+      continue;
+    if (!((i_dirty >> hr) & 1))
+      continue;
+    assert(r < 34u);
+    mregs[r] = hr;
+  }
+  for (r = 1; r < 34; r++) {
+    if (mregs[r] < 0)
+      continue;
+    if (mregs[r+1] >= 0) {
+      uintptr_t offset = (u_char *)&psxRegs.GPR.r[r] - (u_char *)&dynarec_local;
+      emit_ldstp(1, 0, mregs[r], mregs[r+1], FP, offset);
+      r++;
+    }
+    else
+      emit_storereg(r, mregs[r]);
+  }
+}
+#define wb_dirtys wb_dirtys
+
+static void load_all_regs(const signed char i_regmap[])
+{
+  signed char mregs[34+1];
+  int r, hr;
+  memset(mregs, -1, sizeof(mregs));
+  for (hr = 0; hr < HOST_REGS; hr++) {
+    r = i_regmap[hr];
+    if (hr == EXCLUDE_REG || r < 0 || r == CCREG)
+      continue;
+    if ((u_int)r < 34u)
+      mregs[r] = hr;
+    else if (r < TEMPREG)
+      emit_loadreg(r, hr);
+  }
+  if (mregs[0] >= 0)
+    emit_zeroreg(mregs[0]); // we could use arm64's ZR instead of reg alloc
+  for (r = 1; r < 34; r++) {
+    if (mregs[r] < 0)
+      continue;
+    if (mregs[r+1] >= 0) {
+      uintptr_t offset = (u_char *)&psxRegs.GPR.r[r] - (u_char *)&dynarec_local;
+      emit_ldstp(0, 0, mregs[r], mregs[r+1], FP, offset);
+      r++;
+    }
+    else
+      emit_loadreg(r, mregs[r]);
+  }
+}
+#define load_all_regs load_all_regs
+
 static void do_jump_vaddr(u_int rs)
 {
   if (rs != 0)