#include "pcnt.h"
#include "arm_features.h"
-#define unused __attribute__((unused))
-
-void do_memhandler_pre();
-void do_memhandler_post();
-
/* Linker */
static void set_jump_target(void *addr, void *target)
{
- u_int *ptr = addr;
+ u_int *ptr = NDRC_WRITE_OFFSET(addr);
intptr_t offset = (u_char *)target - (u_char *)addr;
if ((*ptr&0xFC000000) == 0x14000000) { // b
// should only happen when jumping to an already compiled block (see add_jump_out)
// a workaround would be to do a trampoline jump via a stub at the end of the block
assert(-1048576 <= offset && offset < 1048576);
- *ptr=(*ptr&0xFF00000F)|(((offset>>2)&0x7ffff)<<5);
+ *ptr=(*ptr&0xFF00001F)|(((offset>>2)&0x7ffff)<<5);
}
else if((*ptr&0x9f000000)==0x10000000) { // adr
// generated by do_miniht_insert
return ptr + offset / 4;
}
+#if 0
// find where external branch is liked to using addr of it's stub:
// get address that the stub loads (dyna_linker arg1),
// treat it as a pointer to branch insn,
assert(0);
return NULL;
}
+#endif
// Allocate a specific ARM register.
static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
}
// Alloc cycle count into dedicated register
-static void alloc_cc(struct regstat *cur,int i)
+static void alloc_cc(struct regstat *cur, int i)
+{
+ alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
+}
+
+static void alloc_cc_optional(struct regstat *cur, int i)
{
- alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
+ if (cur->regmap[HOST_CCREG] < 0) {
+ alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
+ cur->noevict &= ~(1u << HOST_CCREG);
+ }
}
/* Special alloc */
static void output_w32(u_int word)
{
- *((u_int *)out) = word;
+ *((u_int *)NDRC_WRITE_OFFSET(out)) = word;
out += 4;
}
-static void output_w64(uint64_t dword)
-{
- *((uint64_t *)out) = dword;
- out+=8;
-}
-
-/*
-static u_int rm_rd(u_int rm, u_int rd)
-{
- assert(rm < 31);
- assert(rd < 31);
- return (rm << 16) | rd;
-}
-*/
-
static u_int rn_rd(u_int rn, u_int rd)
{
assert(rn < 31);
output_w32(0x0b000000 | rm_rn_rd(rs2, rs1, rt));
}
+static void emit_adds(u_int rs1, u_int rs2, u_int rt)
+{
+ assem_debug("adds %s,%s,%s\n", regname[rt], regname[rs1], regname[rs2]);
+ output_w32(0x2b000000 | rm_rn_rd(rs2, rs1, rt));
+}
+
static void emit_add64(u_int rs1, u_int rs2, u_int rt)
{
assem_debug("add %s,%s,%s\n", regname64[rt], regname64[rs1], regname64[rs2]);
}
#define emit_adds_ptr emit_adds64
+static void emit_add_lsrimm(u_int rs1, u_int rs2, u_int shift, u_int rt)
+{
+ assem_debug("add %s,%s,%s,lsr #%u\n",regname[rt],regname[rs1],regname[rs2],shift);
+ output_w32(0x0b400000 | rm_imm6_rn_rd(rs2, shift, rs1, rt));
+}
+
static void emit_neg(u_int rs, u_int rt)
{
assem_debug("neg %s,%s\n",regname[rt],regname[rs]);
output_w32(0x4b000000 | rm_rn_rd(rs, WZR, rt));
}
+static void emit_negs(u_int rs, u_int rt)
+{
+ assem_debug("negs %s,%s\n",regname[rt],regname[rs]);
+ output_w32(0x6b000000 | rm_rn_rd(rs, WZR, rt));
+}
+
static void emit_sub(u_int rs1, u_int rs2, u_int rt)
{
assem_debug("sub %s,%s,%s\n", regname[rt], regname[rs1], regname[rs2]);
output_w32(0x4b000000 | rm_imm6_rn_rd(rs2, 0, rs1, rt));
}
-static void emit_sub_asrimm(u_int rs1, u_int rs2, u_int shift, u_int rt)
+static void emit_subs(u_int rs1, u_int rs2, u_int rt)
+{
+ assem_debug("subs %s,%s,%s\n", regname[rt], regname[rs1], regname[rs2]);
+ output_w32(0x6b000000 | rm_imm6_rn_rd(rs2, 0, rs1, rt));
+}
+
+static unused void emit_sub_asrimm(u_int rs1, u_int rs2, u_int shift, u_int rt)
{
assem_debug("sub %s,%s,%s,asr #%u\n",regname[rt],regname[rs1],regname[rs2],shift);
output_w32(0x4b800000 | rm_imm6_rn_rd(rs2, shift, rs1, rt));
}
}
+static void emit_movimm64(uint64_t imm, u_int rt)
+{
+ u_int shift, op, imm16, insns = 0;
+ for (shift = 0; shift < 4; shift++) {
+ imm16 = (imm >> shift * 16) & 0xffff;
+ if (!imm16)
+ continue;
+ op = insns ? 0xf2800000 : 0xd2800000;
+ assem_debug("mov%c %s,#%#x", insns ? 'k' : 'z', regname64[rt], imm16);
+ if (shift)
+ assem_debug(",lsl #%u", shift * 16);
+ assem_debug("\n");
+ output_w32(op | (shift << 21) | imm16_rd(imm16, rt));
+ insns++;
+ }
+ if (!insns) {
+ assem_debug("movz %s,#0\n", regname64[rt]);
+ output_w32(0xd2800000 | imm16_rd(0, rt));
+ }
+}
+
static void emit_readword(void *addr, u_int rt)
{
uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
if (!(offset & 3) && offset <= 16380) {
- assem_debug("ldr %s,[x%d+%#lx]\n", regname[rt], FP, offset);
+ assem_debug("ldr %s,[x%d+%#lx]%s\n", regname[rt], FP, offset, fpofs_name(offset));
output_w32(0xb9400000 | imm12_rn_rd(offset >> 2, FP, rt));
}
else
{
uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
if (!(offset & 7) && offset <= 32760) {
- assem_debug("ldr %s,[x%d+%#lx]\n", regname64[rt], FP, offset);
+ assem_debug("ldr %s,[x%d+%#lx]%s\n", regname64[rt], FP, offset, fpofs_name(offset));
output_w32(0xf9400000 | imm12_rn_rd(offset >> 3, FP, rt));
}
else
static void emit_loadreg(u_int r, u_int hr)
{
int is64 = 0;
- assert(r < 64);
if (r == 0)
emit_zeroreg(hr);
else {
//case HIREG: addr = &hi; break;
//case LOREG: addr = &lo; break;
case CCREG: addr = &cycle_count; break;
- case CSREG: addr = &Status; break;
case INVCP: addr = &invc_ptr; is64 = 1; break;
case ROREG: addr = &ram_offset; is64 = 1; break;
default:
{
uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
if (!(offset & 3) && offset <= 16380) {
- assem_debug("str %s,[x%d+%#lx]\n", regname[rt], FP, offset);
+ assem_debug("str %s,[x%d+%#lx]%s\n", regname[rt], FP, offset, fpofs_name(offset));
output_w32(0xb9000000 | imm12_rn_rd(offset >> 2, FP, rt));
}
else
{
uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
if (!(offset & 7) && offset <= 32760) {
- assem_debug("str %s,[x%d+%#lx]\n", regname64[rt], FP, offset);
+ assem_debug("str %s,[x%d+%#lx]%s\n", regname64[rt], FP, offset, fpofs_name(offset));
output_w32(0xf9000000 | imm12_rn_rd(offset >> 3, FP, rt));
}
else
output_w32(0x2a400000 | rm_imm6_rn_rd(rs, imm, rt, rt));
}
+static void emit_orn_asrimm(u_int rs1, u_int rs2, u_int shift, u_int rt)
+{
+ assem_debug("orn %s,%s,%s,asr #%u\n",regname[rt],regname[rs1],regname[rs2],shift);
+ output_w32(0x2aa00000 | rm_imm6_rn_rd(rs2, shift, rs1, rt));
+}
+
static void emit_bicsar_imm(u_int rs,u_int imm,u_int rt)
{
assem_debug("bic %s,%s,%s,asr #%d\n",regname[rt],regname[rt],regname[rs],imm);
assem_debug("sub%s %s,%s,%#lx\n", st, regname[rt], regname[rs], -imm);
output_w32(0x51000000 | is64 | s | imm12_rn_rd(-imm, rs, rt));
}
- else if (imm < 16777216) {
- assem_debug("add %s,%s,#%#lx\n",regname[rt],regname[rt],imm&0xfff000);
- output_w32(0x11400000 | is64 | imm12_rn_rd(imm >> 12, rs, rt));
- if ((imm & 0xfff) || s) {
- assem_debug("add%s %s,%s,#%#lx\n",st,regname[rt],regname[rs],imm&0xfff);
- output_w32(0x11000000 | is64 | s | imm12_rn_rd(imm & 0xfff, rt, rt));
+ else if (imm < 16777216 && (!(imm & 0xfff) || !s)) {
+ assem_debug("add%s %s,%s,#%#lx\n", st, regname[rt], regname[rs], imm&0xfff000);
+ output_w32(0x11400000 | is64 | s | imm12_rn_rd(imm >> 12, rs, rt));
+ if (imm & 0xfff) {
+ assem_debug("add %s,%s,#%#lx\n", regname[rt], regname[rt], imm&0xfff);
+ output_w32(0x11000000 | is64 | imm12_rn_rd(imm & 0xfff, rt, rt));
}
}
- else if (-imm < 16777216) {
- assem_debug("sub %s,%s,#%#lx\n",regname[rt],regname[rt],-imm&0xfff000);
- output_w32(0x51400000 | is64 | imm12_rn_rd(-imm >> 12, rs, rt));
- if ((imm & 0xfff) || s) {
- assem_debug("sub%s %s,%s,#%#lx\n",st,regname[rt],regname[rs],-imm&0xfff);
- output_w32(0x51000000 | is64 | s | imm12_rn_rd(-imm & 0xfff, rt, rt));
+ else if (-imm < 16777216 && (!(-imm & 0xfff) || !s)) {
+ assem_debug("sub%s %s,%s,#%#lx\n", st, regname[rt], regname[rs], -imm&0xfff000);
+ output_w32(0x51400000 | is64 | s | imm12_rn_rd(-imm >> 12, rs, rt));
+ if (-imm & 0xfff) {
+ assem_debug("sub %s,%s,#%#lx\n", regname[rt], regname[rt], -imm&0xfff);
+ output_w32(0x51000000 | is64 | imm12_rn_rd(-imm & 0xfff, rt, rt));
}
}
- else
- abort();
+ else {
+ u_int tmp = rt;
+ assert(!is64);
+ if (rs == rt) {
+ host_tempreg_acquire();
+ tmp = HOST_TEMPREG;
+ }
+ emit_movimm(imm, tmp);
+ assem_debug("add%s %s,%s,%s\n", st, regname[rt], regname[rs], regname[tmp]);
+ output_w32(0x0b000000 | s | rm_rn_rd(rs, tmp, rt));
+ if (tmp == HOST_TEMPREG)
+ host_tempreg_release();
+ }
}
static void emit_addimm(u_int rs, uintptr_t imm, u_int rt)
{
+ if (imm == 0) {
+ emit_mov(rs, rt);
+ return;
+ }
emit_addimm_s(0, 0, rs, imm, rt);
}
emit_addimm_s(0, 1, rs, imm, rt);
}
+static void emit_addimm_ptr(u_int rs, uintptr_t imm, u_int rt)
+{
+ emit_addimm64(rs, imm, rt);
+}
+
static void emit_addimm_and_set_flags(int imm, u_int rt)
{
emit_addimm_s(1, 0, rt, imm, rt);
}
+static void emit_addimm_and_set_flags3(u_int rs, int imm, u_int rt)
+{
+ emit_addimm_s(1, 0, rs, imm, rt);
+}
+
static void emit_logicop_imm(u_int op, u_int rs, u_int imm, u_int rt)
{
const char *names[] = { "and", "orr", "eor", "ands" };
output_w32(0x5a800000 | (COND_LE << 12) | rm_rn_rd(rs2, rs1, rt));
}
+static void emit_csinvne_reg(u_int rs1,u_int rs2,u_int rt)
+{
+ assem_debug("csinv %s,%s,%s,ne\n",regname[rt],regname[rs1],regname[rs2]);
+ output_w32(0x5a800000 | (COND_NE << 12) | rm_rn_rd(rs2, rs1, rt));
+}
+
static void emit_slti32(u_int rs,int imm,u_int rt)
{
if(rs!=rt) emit_zeroreg(rt);
output_w32(0x6b000000 | rm_rn_rd(rt, rs, WZR));
}
+static void emit_cmpcs(u_int rs,u_int rt)
+{
+ assem_debug("ccmp %s,%s,#0,cs\n",regname[rs],regname[rt]);
+ output_w32(0x7a400000 | (COND_CS << 12) | rm_rn_rd(rt, rs, 0));
+}
+
static void emit_set_gz32(u_int rs, u_int rt)
{
//assem_debug("set_gz32\n");
output_w32(0x54000000 | (offset << 5) | COND_GE);
}
+static void emit_jo(const void *a)
+{
+ assem_debug("bvs %p\n", a);
+ u_int offset = genjmpcc(a);
+ output_w32(0x54000000 | (offset << 5) | COND_VS);
+}
+
static void emit_jno(const void *a)
{
assem_debug("bvc %p\n", a);
output_w32(0x34000000 | is64 | isnz | imm19_rt(offset, r));
}
-static void emit_cbz(const void *a, u_int r)
+static void *emit_cbz(u_int r, const void *a)
{
+ void *ret = out;
emit_cb(0, 0, a, r);
+ return ret;
}
static void emit_jmpreg(u_int r)
}
// special case for checking invalid_code
-static void emit_cmpmem_indexedsr12_reg(u_int rbase, u_int r, u_int imm)
+static void emit_ldrb_indexedsr12_reg(u_int rbase, u_int r, u_int rt)
{
- host_tempreg_acquire();
- emit_shrimm(r, 12, HOST_TEMPREG);
- assem_debug("ldrb %s,[%s,%s,uxtw]\n",regname[HOST_TEMPREG],regname64[rbase],regname[HOST_TEMPREG]);
- output_w32(0x38604800 | rm_rn_rd(HOST_TEMPREG, rbase, HOST_TEMPREG));
- emit_cmpimm(HOST_TEMPREG, imm);
- host_tempreg_release();
+ emit_shrimm(r, 12, rt);
+ assem_debug("ldrb %s,[%s,%s,uxtw]\n",regname[rt],regname64[rbase],regname[rt]);
+ output_w32(0x38604800 | rm_rn_rd(rt, rbase, rt));
}
// special for loadlr_assemble, rs2 is destroyed
emit_bic(rs1, rs2, rt);
}
-static void emit_loadlp_ofs(u_int ofs, u_int rt)
-{
- output_w32(0x58000000 | imm19_rt(ofs, rt));
-}
-
static void emit_ldst(int is_st, int is64, u_int rt, u_int rn, u_int ofs)
{
u_int op = 0xb9000000;
}
// parsed by get_pointer, find_extjump_insn
-static void emit_extjump2(u_char *addr, u_int target, void *linker)
+static void emit_extjump(u_char *addr, u_int target)
{
assert(((addr[3]&0xfc)==0x14) || ((addr[3]&0xff)==0x54)); // b or b.cond
// addr is in the current recompiled block (max 256k)
// offset shouldn't exceed +/-1MB
emit_adr(addr, 1);
- emit_far_jump(linker);
+ emit_far_jump(dyna_linker);
}
static void check_extjump2(void *src)
}
// just move the whole thing. At least on Linux all addresses
// seem to be 48bit, so 3 insns - not great not terrible
- assem_debug("movz %s,#%#lx\n", regname64[rt], rt_val & 0xffff);
- output_w32(0xd2800000 | imm16_rd(rt_val & 0xffff, rt));
- assem_debug("movk %s,#%#lx,lsl #16\n", regname64[rt], (rt_val >> 16) & 0xffff);
- output_w32(0xf2a00000 | imm16_rd((rt_val >> 16) & 0xffff, rt));
- assem_debug("movk %s,#%#lx,lsl #32\n", regname64[rt], (rt_val >> 32) & 0xffff);
- output_w32(0xf2c00000 | imm16_rd((rt_val >> 32) & 0xffff, rt));
- if (rt_val >> 48) {
- assem_debug("movk %s,#%#lx,lsl #48\n", regname64[rt], (rt_val >> 48) & 0xffff);
- output_w32(0xf2e00000 | imm16_rd((rt_val >> 48) & 0xffff, rt));
- }
+ emit_movimm64(rt_val, rt);
}
// trashes x2
int i = stubs[n].a;
int rs = stubs[n].b;
const struct regstat *i_regs = (void *)stubs[n].c;
+ int adj = (int)stubs[n].d;
u_int reglist = stubs[n].e;
const signed char *i_regmap = i_regs->regmap;
int rt;
- if(dops[i].itype==C1LS||dops[i].itype==C2LS||dops[i].itype==LOADLR) {
+ if(dops[i].itype==C2LS||dops[i].itype==LOADLR) {
rt=get_reg(i_regmap,FTEMP);
}else{
rt=get_reg(i_regmap,dops[i].rt1);
emit_adds64(temp2,temp2,temp2);
handler_jump=out;
emit_jc(0);
- if(dops[i].itype==C1LS||dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
+ if(dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
switch(type) {
case LOADB_STUB: emit_ldrsb_dualindexed(temp2,rs,rt); break;
case LOADBU_STUB: emit_ldrb_dualindexed(temp2,rs,rt); break;
handler=jump_handler_read32;
assert(handler);
pass_args64(rs,temp2);
- int cc=get_reg(i_regmap,CCREG);
- if(cc<0)
- emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
+ int cc, cc_use;
+ cc = cc_use = get_reg(i_regmap, CCREG);
+ if (cc < 0)
+ emit_loadreg(CCREG, (cc_use = 2));
+ emit_addimm(cc_use, adj, 2);
+
emit_far_call(handler);
- // (no cycle reload after read)
- if(dops[i].itype==C1LS||dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
+
+#if 0
+ // cycle reload for read32 only (value in w2 both in and out)
+ if (type == LOADW_STUB) {
+ emit_addimm(2, -adj, cc_use);
+ if (cc < 0)
+ emit_storereg(CCREG, cc_use);
+ }
+#endif
+ if(dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
loadstore_extend(type,0,rt);
}
if(restore_jump)
static void inline_readstub(enum stub_type type, int i, u_int addr,
const signed char regmap[], int target, int adj, u_int reglist)
{
- int rs=get_reg(regmap,target);
- int rt=get_reg(regmap,target);
- if(rs<0) rs=get_reg(regmap,-1);
- assert(rs>=0);
+ int ra = cinfo[i].addr;
+ int rt = get_reg(regmap, target);
+ assert(ra >= 0);
u_int is_dynamic=0;
uintptr_t host_addr = 0;
void *handler;
- int cc=get_reg(regmap,CCREG);
- //if(pcsx_direct_read(type,addr,adj,cc,target?rs:-1,rt))
+ int cc, cc_use;
+ cc = cc_use = get_reg(regmap, CCREG);
+ //if(pcsx_direct_read(type,addr,adj,cc,target?ra:-1,rt))
// return;
handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
if (handler == NULL) {
if(rt<0||dops[i].rt1==0)
return;
if (addr != host_addr)
- emit_movimm_from64(addr, rs, host_addr, rs);
+ emit_movimm_from64(addr, ra, host_addr, ra);
switch(type) {
- case LOADB_STUB: emit_movsbl_indexed(0,rs,rt); break;
- case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
- case LOADH_STUB: emit_movswl_indexed(0,rs,rt); break;
- case LOADHU_STUB: emit_movzwl_indexed(0,rs,rt); break;
- case LOADW_STUB: emit_readword_indexed(0,rs,rt); break;
+ case LOADB_STUB: emit_movsbl_indexed(0,ra,rt); break;
+ case LOADBU_STUB: emit_movzbl_indexed(0,ra,rt); break;
+ case LOADH_STUB: emit_movswl_indexed(0,ra,rt); break;
+ case LOADHU_STUB: emit_movzwl_indexed(0,ra,rt); break;
+ case LOADW_STUB: emit_readword_indexed(0,ra,rt); break;
default: assert(0);
}
return;
save_regs(reglist);
if(target==0)
emit_movimm(addr,0);
- else if(rs!=0)
- emit_mov(rs,0);
- if(cc<0)
- emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,adj,2);
+ else if(ra!=0)
+ emit_mov(ra,0);
+ if (cc < 0)
+ emit_loadreg(CCREG, (cc_use = 2));
+ emit_addimm(cc_use, adj, 2);
if(is_dynamic) {
uintptr_t l1 = ((uintptr_t *)mem_rtab)[addr>>12] << 1;
- emit_adrp((void *)l1, 1);
- emit_addimm64(1, l1 & 0xfff, 1);
+ intptr_t offset = (l1 & ~0xfffl) - ((intptr_t)out & ~0xfffl);
+ if (-4294967296l <= offset && offset < 4294967296l) {
+ emit_adrp((void *)l1, 1);
+ emit_addimm64(1, l1 & 0xfff, 1);
+ }
+ else
+ emit_movimm64(l1, 1);
}
else
emit_far_call(do_memhandler_pre);
emit_far_call(handler);
- // (no cycle reload after read)
+#if 0
+ // cycle reload for read32 only (value in w2 both in and out)
+ if (type == LOADW_STUB) {
+ if (!is_dynamic)
+ emit_far_call(do_memhandler_post);
+ emit_addimm(2, -adj, cc_use);
+ if (cc < 0)
+ emit_storereg(CCREG, cc_use);
+ }
+#endif
if(rt>=0&&dops[i].rt1!=0)
loadstore_extend(type, 0, rt);
restore_regs(reglist);
int i=stubs[n].a;
int rs=stubs[n].b;
struct regstat *i_regs=(struct regstat *)stubs[n].c;
+ int adj = (int)stubs[n].d;
u_int reglist=stubs[n].e;
signed char *i_regmap=i_regs->regmap;
int rt,r;
- if(dops[i].itype==C1LS||dops[i].itype==C2LS) {
+ if(dops[i].itype==C2LS) {
rt=get_reg(i_regmap,r=FTEMP);
}else{
rt=get_reg(i_regmap,r=dops[i].rs2);
emit_mov64(temp2,3);
host_tempreg_release();
}
- int cc=get_reg(i_regmap,CCREG);
- if(cc<0)
- emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
- // returns new cycle_count
+ int cc, cc_use;
+ cc = cc_use = get_reg(i_regmap, CCREG);
+ if (cc < 0)
+ emit_loadreg(CCREG, (cc_use = 2));
+ emit_addimm(cc_use, adj, 2);
+
emit_far_call(handler);
- emit_addimm(0,-(int)stubs[n].d,cc<0?2:cc);
- if(cc<0)
- emit_storereg(CCREG,2);
- if(restore_jump)
+
+ // new cycle_count returned in x2
+ emit_addimm(2, -adj, cc_use);
+ if (cc < 0)
+ emit_storereg(CCREG, cc_use);
+ if (restore_jump)
set_jump_target(restore_jump, out);
restore_regs(reglist);
emit_jmp(stubs[n].retaddr);
static void inline_writestub(enum stub_type type, int i, u_int addr,
const signed char regmap[], int target, int adj, u_int reglist)
{
- int rs = get_reg(regmap,-1);
+ int ra = cinfo[i].addr;
int rt = get_reg(regmap,target);
- assert(rs >= 0);
+ assert(ra >= 0);
assert(rt >= 0);
uintptr_t host_addr = 0;
void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
if (handler == NULL) {
if (addr != host_addr)
- emit_movimm_from64(addr, rs, host_addr, rs);
+ emit_movimm_from64(addr, ra, host_addr, ra);
switch (type) {
- case STOREB_STUB: emit_writebyte_indexed(rt, 0, rs); break;
- case STOREH_STUB: emit_writehword_indexed(rt, 0, rs); break;
- case STOREW_STUB: emit_writeword_indexed(rt, 0, rs); break;
+ case STOREB_STUB: emit_writebyte_indexed(rt, 0, ra); break;
+ case STOREH_STUB: emit_writehword_indexed(rt, 0, ra); break;
+ case STOREW_STUB: emit_writeword_indexed(rt, 0, ra); break;
default: assert(0);
}
return;
// call a memhandler
save_regs(reglist);
- emit_writeword(rs, &address); // some handlers still need it
+ emit_writeword(ra, &address); // some handlers still need it
loadstore_extend(type, rt, 0);
int cc, cc_use;
cc = cc_use = get_reg(regmap, CCREG);
emit_far_call(do_memhandler_pre);
emit_far_call(handler);
emit_far_call(do_memhandler_post);
- emit_addimm(0, -adj, cc_use);
+ emit_addimm(2, -adj, cc_use);
if (cc < 0)
emit_storereg(CCREG, cc_use);
restore_regs(reglist);
}
-static int verify_code_arm64(const void *source, const void *copy, u_int size)
-{
- int ret = memcmp(source, copy, size);
- //printf("%s %p,%#x = %d\n", __func__, source, size, ret);
- return ret;
-}
-
-// this output is parsed by verify_dirty, get_bounds, isclean, get_clean_addr
-static void do_dirty_stub_base(u_int vaddr, u_int source_len)
-{
- assert(source_len <= MAXBLOCK*4);
- emit_loadlp_ofs(0, 0); // ldr x1, source
- emit_loadlp_ofs(0, 1); // ldr x2, copy
- emit_movz(source_len, 2);
- emit_far_call(verify_code_arm64);
- void *jmp = out;
- emit_cbz(0, 0);
- emit_movz(vaddr & 0xffff, 0);
- emit_movk_lsl16(vaddr >> 16, 0);
- emit_far_call(get_addr);
- emit_jmpreg(0);
- set_jump_target(jmp, out);
-}
-
-static void assert_dirty_stub(const u_int *ptr)
-{
- assert((ptr[0] & 0xff00001f) == 0x58000000); // ldr x0, source
- assert((ptr[1] & 0xff00001f) == 0x58000001); // ldr x1, copy
- assert((ptr[2] & 0xffe0001f) == 0x52800002); // movz w2, #source_len
- assert( ptr[8] == 0xd61f0000); // br x0
-}
-
-static void set_loadlp(u_int *loadl, void *lit)
-{
- uintptr_t ofs = (u_char *)lit - (u_char *)loadl;
- assert((*loadl & ~0x1f) == 0x58000000);
- assert((ofs & 3) == 0);
- assert(ofs < 0x100000);
- *loadl |= (ofs >> 2) << 5;
-}
-
-static void do_dirty_stub_emit_literals(u_int *loadlps)
-{
- set_loadlp(&loadlps[0], out);
- output_w64((uintptr_t)source);
- set_loadlp(&loadlps[1], out);
- output_w64((uintptr_t)copy);
-}
-
-static void *do_dirty_stub(int i, u_int source_len)
-{
- assem_debug("do_dirty_stub %x\n",start+i*4);
- u_int *loadlps = (void *)out;
- do_dirty_stub_base(start + i*4, source_len);
- void *entry = out;
- load_regs_entry(i);
- if (entry == out)
- entry = instr_addr[i];
- emit_jmp(instr_addr[i]);
- do_dirty_stub_emit_literals(loadlps);
- return entry;
-}
-
-static void do_dirty_stub_ds(u_int source_len)
-{
- u_int *loadlps = (void *)out;
- do_dirty_stub_base(start + 1, source_len);
- void *lit_jumpover = out;
- emit_jmp(out + 8*2);
- do_dirty_stub_emit_literals(loadlps);
- set_jump_target(lit_jumpover, out);
-}
-
-static uint64_t get_from_ldr_literal(const u_int *i)
-{
- signed int ofs;
- assert((i[0] & 0xff000000) == 0x58000000);
- ofs = i[0] << 8;
- ofs >>= 5+8;
- return *(uint64_t *)(i + ofs);
-}
-
-static uint64_t get_from_movz(const u_int *i)
-{
- assert((i[0] & 0x7fe00000) == 0x52800000);
- return (i[0] >> 5) & 0xffff;
-}
-
-// Find the "clean" entry point from a "dirty" entry point
-// by skipping past the call to verify_code
-static void *get_clean_addr(u_int *addr)
-{
- assert_dirty_stub(addr);
- return addr + 9;
-}
-
-static int verify_dirty(const u_int *ptr)
-{
- const void *source, *copy;
- u_int len;
- assert_dirty_stub(ptr);
- source = (void *)get_from_ldr_literal(&ptr[0]); // ldr x1, source
- copy = (void *)get_from_ldr_literal(&ptr[1]); // ldr x1, copy
- len = get_from_movz(&ptr[2]); // movz w3, #source_len
- return !memcmp(source, copy, len);
-}
-
-static int isclean(void *addr)
-{
- const u_int *ptr = addr;
- if ((*ptr >> 24) == 0x58) { // the only place ldr (literal) is used
- assert_dirty_stub(ptr);
- return 0;
- }
- return 1;
-}
-
-// get source that block at addr was compiled from (host pointers)
-static void get_bounds(void *addr, u_char **start, u_char **end)
-{
- const u_int *ptr = addr;
- assert_dirty_stub(ptr);
- *start = (u_char *)get_from_ldr_literal(&ptr[0]); // ldr x1, source
- *end = *start + get_from_movz(&ptr[2]); // movz w3, #source_len
-}
-
/* Special assem */
static void c2op_prologue(u_int op, int i, const struct regstat *i_regs, u_int reglist)
// div 0 quotient (remainder is already correct)
host_tempreg_acquire();
- if (dops[i].opcode2 == 0x1A) // DIV
- emit_sub_asrimm(0,numerator,31,HOST_TEMPREG);
+ if (dops[i].opcode2 == 0x1A) { // DIV
+ emit_add_lsrimm(WZR,numerator,31,HOST_TEMPREG);
+ emit_orn_asrimm(HOST_TEMPREG,numerator,31,HOST_TEMPREG);
+ }
else
emit_movimm(~0,HOST_TEMPREG);
emit_test(denominator,denominator);
if (hr >= 0)
emit_mov(numerator,hr);
if (lr >= 0) {
- if (dops[i].opcode2 == 0x1A) // DIV
- emit_sub_asrimm(0,numerator,31,lr);
+ if (dops[i].opcode2 == 0x1A) { // DIV
+ emit_add_lsrimm(WZR,numerator,31,lr);
+ emit_orn_asrimm(lr,numerator,31,lr);
+ }
else
emit_movimm(~0,lr);
}
if (lr >= 0) emit_movimm(~0,lr);
}
}
+ else if ((dops[i].opcode2==0x1A || dops[i].opcode2==0x1B) && dops[i].rs1==0)
+ {
+ signed char denominator = get_reg(i_regs->regmap, dops[i].rs2);
+ assert(denominator >= 0);
+ if (hr >= 0) emit_zeroreg(hr);
+ if (lr >= 0) {
+ emit_zeroreg(lr);
+ emit_test(denominator, denominator);
+ emit_csinvne_reg(lr, lr, lr);
+ }
+ }
else
{
// Multiply by zero is zero.
}
#define multdiv_assemble multdiv_assemble_arm64
+// wb_dirtys making use of stp when possible
+static void wb_dirtys(const signed char i_regmap[], u_int i_dirty)
+{
+ signed char mregs[34+1];
+ int r, hr;
+ memset(mregs, -1, sizeof(mregs));
+ for (hr = 0; hr < HOST_REGS; hr++) {
+ r = i_regmap[hr];
+ if (hr == EXCLUDE_REG || r <= 0 || r == CCREG)
+ continue;
+ if (!((i_dirty >> hr) & 1))
+ continue;
+ assert(r < 34u);
+ mregs[r] = hr;
+ }
+ for (r = 1; r < 34; r++) {
+ if (mregs[r] < 0)
+ continue;
+ if (mregs[r+1] >= 0) {
+ uintptr_t offset = (u_char *)&psxRegs.GPR.r[r] - (u_char *)&dynarec_local;
+ emit_ldstp(1, 0, mregs[r], mregs[r+1], FP, offset);
+ r++;
+ }
+ else
+ emit_storereg(r, mregs[r]);
+ }
+}
+#define wb_dirtys wb_dirtys
+
+static void load_all_regs(const signed char i_regmap[])
+{
+ signed char mregs[34+1];
+ int r, hr;
+ memset(mregs, -1, sizeof(mregs));
+ for (hr = 0; hr < HOST_REGS; hr++) {
+ r = i_regmap[hr];
+ if (hr == EXCLUDE_REG || r < 0 || r == CCREG)
+ continue;
+ if ((u_int)r < 34u)
+ mregs[r] = hr;
+ else if (r < TEMPREG)
+ emit_loadreg(r, hr);
+ }
+ if (mregs[0] >= 0)
+ emit_zeroreg(mregs[0]); // we could use arm64's ZR instead of reg alloc
+ for (r = 1; r < 34; r++) {
+ if (mregs[r] < 0)
+ continue;
+ if (mregs[r+1] >= 0) {
+ uintptr_t offset = (u_char *)&psxRegs.GPR.r[r] - (u_char *)&dynarec_local;
+ emit_ldstp(0, 0, mregs[r], mregs[r+1], FP, offset);
+ r++;
+ }
+ else
+ emit_loadreg(r, mregs[r]);
+ }
+}
+#define load_all_regs load_all_regs
+
static void do_jump_vaddr(u_int rs)
{
if (rs != 0)
emit_mov(rs, 0);
- emit_far_call(get_addr_ht);
+ emit_far_call(ndrc_get_addr_ht);
emit_jmpreg(0);
}
emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
}
-static void clear_cache_arm64(char *start, char *end)
+static unused void clear_cache_arm64(char *start, char *end)
{
// Don't rely on GCC's __clear_cache implementation, as it caches
// icache/dcache cache line sizes, that can vary between cores on
static void arch_init(void)
{
uintptr_t diff = (u_char *)&ndrc->tramp.f - (u_char *)&ndrc->tramp.ops;
- struct tramp_insns *ops = ndrc->tramp.ops;
+ struct tramp_insns *ops = NDRC_WRITE_OFFSET(ndrc->tramp.ops);
size_t i;
assert(!(diff & 3));
start_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
notaz.gp2x.de / pcsx_rearmed.git / blobdiff