drc: update according to the interpreter (3)

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / assem_arm64.h

diff --git a/libpcsxcore/new_dynarec/assem_arm64.h b/libpcsxcore/new_dynarec/assem_arm64.h
index 1360bfa..6d1a17f 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm64.h
+++ b/libpcsxcore/new_dynarec/assem_arm64.h
@@ -1,14 +1,13 @@
-#define HOST_REGS 29
-#define HOST_BTREG 27
-#define EXCLUDE_REG -1
-
 #define HOST_IMM8 1
-#define RAM_SIZE 0x200000
 
 /* calling convention:
    r0 -r17: caller-save
    r19-r29: callee-save */
 
+#define HOST_REGS 29
+#define HOST_BTREG 27
+#define EXCLUDE_REG -1
+
 #define SP 31
 #define WZR SP
 #define XZR SP
@@ -24,6 +23,10 @@
 #define HOST_CCREG 28
 #define rCC w28
 
+#define CALLER_SAVE_REGS 0x0007ffff
+#define PREFERRED_REG_FIRST 19
+#define PREFERRED_REG_LAST  27
+
 // stack space
 #define SSP_CALLEE_REGS (8*12)
 #define SSP_CALLER_REGS (8*20)
@@ -43,4 +46,7 @@ struct tramp_insns
 
 static void clear_cache_arm64(char *start, char *end);
 
+void do_memhandler_pre();
+void do_memhandler_post();
+
 #endif // !__ASSEMBLY__