#include "emu_if.h"
#include "pcsxmem.h"
#include "../psxhle.h"
+#include "../psxinterpreter.h"
+#include "../psxcounters.h"
+#include "../psxevents.h"
#include "../r3000a.h"
-#include "../cdrom.h"
-#include "../psxdma.h"
-#include "../mdec.h"
#include "../gte_arm.h"
#include "../gte_neon.h"
#define FLAGLESS
//#define evprintf printf
#define evprintf(...)
-char invalid_code[0x100000];
-u32 event_cycles[PSXINT_COUNT];
-
-static void schedule_timeslice(void)
-{
- u32 i, c = psxRegs.cycle;
- u32 irqs = psxRegs.interrupt;
- s32 min, dif;
-
- min = PSXCLK;
- for (i = 0; irqs != 0; i++, irqs >>= 1) {
- if (!(irqs & 1))
- continue;
- dif = event_cycles[i] - c;
- //evprintf(" ev %d\n", dif);
- if (0 < dif && dif < min)
- min = dif;
- }
- next_interupt = c + min;
-}
-
-typedef void (irq_func)();
-
-static irq_func * const irq_funcs[] = {
- [PSXINT_SIO] = sioInterrupt,
- [PSXINT_CDR] = cdrInterrupt,
- [PSXINT_CDREAD] = cdrReadInterrupt,
- [PSXINT_GPUDMA] = gpuInterrupt,
- [PSXINT_MDECOUTDMA] = mdec1Interrupt,
- [PSXINT_SPUDMA] = spuInterrupt,
- [PSXINT_MDECINDMA] = mdec0Interrupt,
- [PSXINT_GPUOTCDMA] = gpuotcInterrupt,
- [PSXINT_CDRDMA] = cdrDmaInterrupt,
- [PSXINT_CDRLID] = cdrLidSeekInterrupt,
- [PSXINT_CDRPLAY] = cdrPlayInterrupt,
- [PSXINT_SPU_UPDATE] = spuUpdate,
- [PSXINT_RCNT] = psxRcntUpdate,
-};
-
-/* local dupe of psxBranchTest, using event_cycles */
-static void irq_test(void)
-{
- u32 irqs = psxRegs.interrupt;
- u32 cycle = psxRegs.cycle;
- u32 irq, irq_bits;
-
- // irq_funcs() may queue more irqs
- psxRegs.interrupt = 0;
-
- for (irq = 0, irq_bits = irqs; irq_bits != 0; irq++, irq_bits >>= 1) {
- if (!(irq_bits & 1))
- continue;
- if ((s32)(cycle - event_cycles[irq]) >= 0) {
- irqs &= ~(1 << irq);
- irq_funcs[irq]();
- }
- }
- psxRegs.interrupt |= irqs;
-
- if ((psxHu32(0x1070) & psxHu32(0x1074)) && (Status & 0x401) == 0x401) {
- psxException(0x400, 0);
- pending_exception = 1;
- }
-}
-
-void gen_interupt()
-{
- evprintf(" +ge %08x, %u->%u\n", psxRegs.pc, psxRegs.cycle, next_interupt);
-
- irq_test();
- //psxBranchTest();
- //pending_exception = 1;
-
- schedule_timeslice();
-
- evprintf(" -ge %08x, %u->%u (%d)\n", psxRegs.pc, psxRegs.cycle,
- next_interupt, next_interupt - psxRegs.cycle);
-}
-
-// from interpreter
-extern void MTC0(int reg, u32 val);
-
void pcsx_mtc0(u32 reg, u32 val)
{
evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
- MTC0(reg, val);
- gen_interupt();
- if (Cause & Status & 0x0300) // possible sw irq
+ MTC0(&psxRegs, reg, val);
+ gen_interupt(&psxRegs.CP0);
+
+ //if (psxRegs.CP0.n.Cause & psxRegs.CP0.n.SR & 0x0300) // possible sw irq
+ if ((psxRegs.pc & 0x803ffeff) == 0x80000080)
pending_exception = 1;
}
void pcsx_mtc0_ds(u32 reg, u32 val)
{
evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
- MTC0(reg, val);
-}
-
-void new_dyna_before_save(void)
-{
- psxRegs.interrupt &= ~(1 << PSXINT_RCNT); // old savestate compat
-
- // psxRegs.intCycle is always maintained, no need to convert
-}
-
-void new_dyna_after_save(void)
-{
- psxRegs.interrupt |= 1 << PSXINT_RCNT;
-}
-
-static void new_dyna_restore(void)
-{
- int i;
- for (i = 0; i < PSXINT_COUNT; i++)
- event_cycles[i] = psxRegs.intCycle[i].sCycle + psxRegs.intCycle[i].cycle;
-
- event_cycles[PSXINT_RCNT] = psxNextsCounter + psxNextCounter;
- psxRegs.interrupt |= 1 << PSXINT_RCNT;
- psxRegs.interrupt &= (1 << PSXINT_COUNT) - 1;
-
- new_dyna_pcsx_mem_load_state();
+ MTC0(&psxRegs, reg, val);
}
void new_dyna_freeze(void *f, int mode)
SaveFuncs.write(f, addrs, size);
}
else {
- new_dyna_restore();
+ new_dyna_pcsx_mem_load_state();
bytes = SaveFuncs.read(f, header, sizeof(header));
if (bytes != sizeof(header) || strcmp(header, header_save)) {
//printf("drc: %d block info entries %s\n", size/8, mode ? "saved" : "loaded");
}
-#ifndef DRC_DISABLE
+#if !defined(DRC_DISABLE) && !defined(LIGHTREC)
/* GTE stuff */
void *gte_handlers[64];
NULL , NULL , NULL , NULL , NULL , "GPF" , "GPL" , "NCCT", // 38
};
-/* from gte.txt.. not sure if this is any good. */
-const char gte_cycletab[64] = {
- /* 1 2 3 4 5 6 7 8 9 a b c d e f */
- 0, 15, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 6, 0, 0, 0,
- 8, 8, 8, 19, 13, 0, 44, 0, 0, 0, 0, 17, 11, 0, 14, 0,
- 30, 0, 0, 0, 0, 0, 0, 0, 5, 8, 17, 0, 0, 5, 6, 0,
- 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 5, 5, 39,
-};
-
#define GCBIT(x) \
(1ll << (32+x))
#define GDBIT(x) \
static int ari64_init()
{
static u32 scratch_buf[8*8*2] __attribute__((aligned(64)));
- extern void (*psxCP2[64])();
- extern void psxNULL();
- extern unsigned char *out;
size_t i;
new_dynarec_init();
new_dyna_pcsx_mem_init();
for (i = 0; i < ARRAY_SIZE(gte_handlers); i++)
- if (psxCP2[i] != psxNULL)
+ if (psxCP2[i] != gteNULL)
gte_handlers[i] = psxCP2[i];
#if defined(__arm__) && !defined(DRC_DBG)
zeromem_ptr = zero_mem;
scratch_buf_ptr = scratch_buf;
- SysPrintf("Mapped (RAM/scrp/ROM/LUTs/TC):\n");
- SysPrintf("%p/%p/%p/%p/%p\n",
- psxM, psxH, psxR, mem_rtab, out);
-
return 0;
}
static void ari64_reset()
{
- printf("ari64_reset\n");
new_dyna_pcsx_mem_reset();
- invalidate_all_pages();
- new_dyna_restore();
+ new_dynarec_invalidate_all_pages();
+ new_dyna_pcsx_mem_load_state();
pending_exception = 1;
}
// (HLE softcall exit and BIOS fastboot end)
static void ari64_execute_until()
{
- schedule_timeslice();
-
evprintf("ari64_execute %08x, %u->%u (%d)\n", psxRegs.pc,
psxRegs.cycle, next_interupt, next_interupt - psxRegs.cycle);
static void ari64_execute()
{
while (!stop) {
+ schedule_timeslice();
ari64_execute_until();
evprintf("drc left @%08x\n", psxRegs.pc);
}
}
-static void ari64_clear(u32 addr, u32 size)
+static void ari64_execute_block(enum blockExecCaller caller)
{
- u32 start, end, main_ram;
+ if (caller == EXEC_CALLER_BOOT)
+ stop++;
- size *= 4; /* PCSX uses DMA units (words) */
+ next_interupt = psxRegs.cycle + 1;
+ ari64_execute_until();
- evprintf("ari64_clear %08x %04x\n", addr, size);
+ if (caller == EXEC_CALLER_BOOT)
+ stop--;
+}
- /* check for RAM mirrors */
- main_ram = (addr & 0xffe00000) == 0x80000000;
+static void ari64_clear(u32 addr, u32 size)
+{
+ size *= 4; /* PCSX uses DMA units (words) */
- start = addr >> 12;
- end = (addr + size) >> 12;
+ evprintf("ari64_clear %08x %04x\n", addr, size);
- for (; start <= end; start++)
- if (!main_ram || !invalid_code[start])
- invalidate_block(start);
+ new_dynarec_invalidate_range(addr, addr + size);
}
-#ifdef ICACHE_EMULATION
-static void ari64_notify(int note, void *data) {
- /*
- Should be fixed when ARM dynarec has proper icache emulation.
+static void ari64_notify(enum R3000Anote note, void *data) {
switch (note)
{
- case R3000ACPU_NOTIFY_CACHE_UNISOLATED:
- break;
- case R3000ACPU_NOTIFY_CACHE_ISOLATED:
- Sent from psxDma3().
- case R3000ACPU_NOTIFY_DMA3_EXE_LOAD:
- default:
- break;
+ case R3000ACPU_NOTIFY_CACHE_UNISOLATED:
+ case R3000ACPU_NOTIFY_CACHE_ISOLATED:
+ new_dyna_pcsx_mem_isolate(note == R3000ACPU_NOTIFY_CACHE_ISOLATED);
+ break;
+ case R3000ACPU_NOTIFY_BEFORE_SAVE:
+ break;
+ case R3000ACPU_NOTIFY_AFTER_LOAD:
+ if (data == NULL)
+ ari64_reset();
+ psxInt.Notify(note, data);
+ break;
+ }
+}
+
+static void ari64_apply_config()
+{
+ intApplyConfig();
+
+ if (Config.DisableStalls)
+ new_dynarec_hacks |= NDHACK_NO_STALLS;
+ else
+ new_dynarec_hacks &= ~NDHACK_NO_STALLS;
+
+ if (Config.cycle_multiplier != cycle_multiplier_old
+ || new_dynarec_hacks != new_dynarec_hacks_old)
+ {
+ new_dynarec_clear_full();
}
- */
}
-#endif
static void ari64_shutdown()
{
ari64_init,
ari64_reset,
ari64_execute,
- ari64_execute_until,
+ ari64_execute_block,
ari64_clear,
-#ifdef ICACHE_EMULATION
ari64_notify,
-#endif
+ ari64_apply_config,
ari64_shutdown
};
unsigned int address;
int pending_exception, stop;
-unsigned int next_interupt;
+u32 next_interupt;
int new_dynarec_did_compile;
-int cycle_multiplier;
-int cycle_multiplier_override;
+int cycle_multiplier_old;
int new_dynarec_hacks_pergame;
+int new_dynarec_hacks_old;
int new_dynarec_hacks;
void *psxH_ptr;
void *zeromem_ptr;
-u8 zero_mem[0x1000];
-unsigned char *out;
+u32 zero_mem[0x1000/4];
void *mem_rtab;
void *scratch_buf_ptr;
void new_dynarec_init() {}
void new_dyna_start(void *context) {}
void new_dynarec_cleanup() {}
void new_dynarec_clear_full() {}
-void invalidate_all_pages() {}
-void invalidate_block(unsigned int block) {}
+void new_dynarec_invalidate_all_pages() {}
+void new_dynarec_invalidate_range(unsigned int start, unsigned int end) {}
void new_dyna_pcsx_mem_init(void) {}
void new_dyna_pcsx_mem_reset(void) {}
void new_dyna_pcsx_mem_load_state(void) {}
+void new_dyna_pcsx_mem_isolate(int enable) {}
void new_dyna_pcsx_mem_shutdown(void) {}
int new_dynarec_save_blocks(void *save, int size) { return 0; }
void new_dynarec_load_blocks(const void *save, int size) {}
#include <stddef.h>
static FILE *f;
-extern u32 last_io_addr;
+u32 irq_test_cycle;
+u32 handler_cycle;
+u32 last_io_addr;
-static void dump_mem(const char *fname, void *mem, size_t size)
+void dump_mem(const char *fname, void *mem, size_t size)
{
FILE *f1 = fopen(fname, "wb");
if (f1 == NULL)
void do_insn_trace(void)
{
static psxRegisters oldregs;
- static u32 old_io_addr = (u32)-1;
- static u32 old_io_data = 0xbad0c0de;
static u32 event_cycles_o[PSXINT_COUNT];
u32 *allregs_p = (void *)&psxRegs;
u32 *allregs_o = (void *)&oldregs;
// log event changes
for (i = 0; i < PSXINT_COUNT; i++) {
if (event_cycles[i] != event_cycles_o[i]) {
- byte = 0xfc;
+ byte = 0xf8;
fwrite(&byte, 1, 1, f);
fwrite(&i, 1, 1, f);
fwrite(&event_cycles[i], 1, 4, f);
event_cycles_o[i] = event_cycles[i];
}
}
- // log last io
- if (old_io_addr != last_io_addr) {
- byte = 0xfd;
- fwrite(&byte, 1, 1, f);
- fwrite(&last_io_addr, 1, 4, f);
- old_io_addr = last_io_addr;
+ #define SAVE_IF_CHANGED(code_, name_) { \
+ static u32 old_##name_ = 0xbad0c0de; \
+ if (old_##name_ != name_) { \
+ byte = code_; \
+ fwrite(&byte, 1, 1, f); \
+ fwrite(&name_, 1, 4, f); \
+ old_##name_ = name_; \
+ } \
}
+ SAVE_IF_CHANGED(0xfb, irq_test_cycle);
+ SAVE_IF_CHANGED(0xfc, handler_cycle);
+ SAVE_IF_CHANGED(0xfd, last_io_addr);
io_data = memcheck_read(last_io_addr);
- if (old_io_data != io_data) {
- byte = 0xfe;
- fwrite(&byte, 1, 1, f);
- fwrite(&io_data, 1, 4, f);
- old_io_data = io_data;
- }
+ SAVE_IF_CHANGED(0xfe, io_data);
byte = 0xff;
fwrite(&byte, 1, 1, f);
void do_insn_cmp(void)
{
+ extern int last_count;
static psxRegisters rregs;
static u32 mem_addr, mem_val;
+ static u32 irq_test_cycle_intr;
+ static u32 handler_cycle_intr;
u32 *allregs_p = (void *)&psxRegs;
u32 *allregs_e = (void *)&rregs;
+ u32 badregs_mask = 0;
static u32 ppc, failcount;
- int i, ret, bad = 0, which_event = -1;
+ static u32 badregs_mask_prev;
+ int i, ret, bad = 0, fatal = 0, which_event = -1;
u32 ev_cycles = 0;
u8 code;
if (code == 0xff)
break;
switch (code) {
- case 0xfc:
+ case 0xf8:
which_event = 0;
fread(&which_event, 1, 1, f);
fread(&ev_cycles, 1, 4, f);
continue;
+ case 0xfb:
+ fread(&irq_test_cycle_intr, 1, 4, f);
+ continue;
+ case 0xfc:
+ fread(&handler_cycle_intr, 1, 4, f);
+ continue;
case 0xfd:
fread(&mem_addr, 1, 4, f);
continue;
fread(&mem_val, 1, 4, f);
continue;
}
+ assert(code < offsetof(psxRegisters, intCycle) / 4);
fread(&allregs_e[code], 1, 4, f);
}
if (ret <= 0) {
printf("EOF?\n");
- goto end;
+ exit(1);
}
psxRegs.code = rregs.code; // don't care
- psxRegs.cycle = rregs.cycle;
+ psxRegs.cycle += last_count;
+ //psxRegs.cycle = rregs.cycle; // needs reload in _cmp
psxRegs.CP0.r[9] = rregs.CP0.r[9]; // Count
//if (psxRegs.cycle == 166172) breakme();
- if (memcmp(&psxRegs, &rregs, offsetof(psxRegisters, intCycle)) == 0 &&
- mem_val == memcheck_read(mem_addr)
- ) {
+ if (which_event >= 0 && event_cycles[which_event] != ev_cycles) {
+ printf("bad ev_cycles #%d: %u %u / %u\n", which_event,
+ event_cycles[which_event], ev_cycles, psxRegs.cycle);
+ fatal = 1;
+ }
+
+ if (irq_test_cycle > irq_test_cycle_intr) {
+ printf("bad irq_test_cycle: %u %u\n", irq_test_cycle, irq_test_cycle_intr);
+ fatal = 1;
+ }
+
+ if (handler_cycle != handler_cycle_intr) {
+ printf("bad handler_cycle: %u %u\n", handler_cycle, handler_cycle_intr);
+ fatal = 1;
+ }
+
+ if (mem_val != memcheck_read(mem_addr)) {
+ printf("bad mem @%08x: %08x %08x\n", mem_addr, memcheck_read(mem_addr), mem_val);
+ fatal = 1;
+ }
+
+ if (!fatal && !memcmp(&psxRegs, &rregs, offsetof(psxRegisters, intCycle))) {
failcount = 0;
goto ok;
}
if (allregs_p[i] != allregs_e[i]) {
miss_log_add(i, allregs_p[i], allregs_e[i], psxRegs.pc, psxRegs.cycle);
bad++;
- if (i > 32+2)
- goto end;
+ if (i >= 32)
+ fatal = 1;
+ else
+ badregs_mask |= 1u << i;
}
}
- if (mem_val != memcheck_read(mem_addr)) {
- printf("bad mem @%08x: %08x %08x\n", mem_addr, memcheck_read(mem_addr), mem_val);
- goto end;
- }
-
- if (which_event >= 0 && event_cycles[which_event] != ev_cycles) {
- printf("bad ev_cycles #%d: %08x %08x\n", which_event, event_cycles[which_event], ev_cycles);
- goto end;
- }
+ if (badregs_mask_prev & badregs_mask)
+ failcount++;
+ else
+ failcount = 0;
- if (psxRegs.pc == rregs.pc && bad < 6 && failcount < 32) {
+ if (!fatal && psxRegs.pc == rregs.pc && bad < 6 && failcount < 24) {
static int last_mcycle;
if (last_mcycle != psxRegs.cycle >> 20) {
printf("%u\n", psxRegs.cycle);
last_mcycle = psxRegs.cycle >> 20;
}
- failcount++;
goto ok;
}
-end:
for (i = 0; i < miss_log_len; i++, miss_log_i = (miss_log_i + 1) & miss_log_mask)
printf("bad %5s: %08x %08x, pc=%08x, cycle %u\n",
regnames[miss_log[miss_log_i].reg], miss_log[miss_log_i].val,
for (i = 0; i < 8; i++)
printf("r%d=%08x r%2d=%08x r%2d=%08x r%2d=%08x\n", i, allregs_p[i],
i+8, allregs_p[i+8], i+16, allregs_p[i+16], i+24, allregs_p[i+24]);
- printf("PC: %08x/%08x, cycle %u\n", psxRegs.pc, ppc, psxRegs.cycle);
- dump_mem("/mnt/ntz/dev/pnd/tmp/psxram.dump", psxM, 0x200000);
- dump_mem("/mnt/ntz/dev/pnd/tmp/psxregs.dump", psxH, 0x10000);
+ printf("PC: %08x/%08x, cycle %u, next %u\n", psxRegs.pc, ppc, psxRegs.cycle, next_interupt);
+ //dump_mem("/tmp/psxram.dump", psxM, 0x200000);
+ //dump_mem("/mnt/ntz/dev/pnd/tmp/psxregs.dump", psxH, 0x10000);
exit(1);
ok:
- psxRegs.cycle = rregs.cycle + 2; // sync timing
+ //psxRegs.cycle = rregs.cycle + 2; // sync timing
ppc = psxRegs.pc;
+ badregs_mask_prev = badregs_mask;
}
#endif
notaz.gp2x.de / pcsx_rearmed.git / blobdiff