update gpu DMA related code to pcsxr-svn Nov 28
[pcsx_rearmed.git] / libpcsxcore / new_dynarec / emu_if.c
index bdf0c8f..69e75f9 100644 (file)
@@ -1,20 +1,27 @@
-// pending_exception?
-// swi 0 in do_unalignedwritestub?
+/*
+ * (C) GraÅžvydas "notaz" Ignotas, 2010
+ *
+ * This work is licensed under the terms of GNU GPL version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
 #include <stdio.h>
 
 #include "emu_if.h"
-#include "../psxmem.h"
+#include "pcsxmem.h"
 #include "../psxhle.h"
+#include "../r3000a.h"
+#include "../cdrom.h"
+#include "../psxdma.h"
+#include "../mdec.h"
 
 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
 
-//#define memprintf printf
-#define memprintf(...)
 //#define evprintf printf
 #define evprintf(...)
 
 char invalid_code[0x100000];
-u32 event_cycles[7];
+u32 event_cycles[PSXINT_COUNT];
 
 static void schedule_timeslice(void)
 {
@@ -43,6 +50,48 @@ static void schedule_timeslice(void)
 #endif
 }
 
+typedef void (irq_func)();
+
+static irq_func * const irq_funcs[] = {
+       [PSXINT_SIO]    = sioInterrupt,
+       [PSXINT_CDR]    = cdrInterrupt,
+       [PSXINT_CDREAD] = cdrReadInterrupt,
+       [PSXINT_GPUDMA] = gpuInterrupt,
+       [PSXINT_MDECOUTDMA] = mdec1Interrupt,
+       [PSXINT_SPUDMA] = spuInterrupt,
+       [PSXINT_MDECINDMA] = mdec0Interrupt,
+       [PSXINT_GPUOTCDMA] = gpuotcInterrupt,
+};
+
+/* local dupe of psxBranchTest, using event_cycles */
+static void irq_test(void)
+{
+       u32 irqs = psxRegs.interrupt;
+       u32 cycle = psxRegs.cycle;
+       u32 irq, irq_bits;
+
+       if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
+               psxRcntUpdate();
+
+       // irq_funcs() may queue more irqs
+       psxRegs.interrupt = 0;
+
+       for (irq = 0, irq_bits = irqs; irq_bits != 0; irq++, irq_bits >>= 1) {
+               if (!(irq_bits & 1))
+                       continue;
+               if ((s32)(cycle - event_cycles[irq]) >= 0) {
+                       irqs &= ~(1 << irq);
+                       irq_funcs[irq]();
+               }
+       }
+       psxRegs.interrupt |= irqs;
+
+       if ((psxHu32(0x1070) & psxHu32(0x1074)) && (Status & 0x401) == 0x401) {
+               psxException(0x400, 0);
+               pending_exception = 1;
+       }
+}
+
 void gen_interupt()
 {
        evprintf("  +ge %08x, %u->%u\n", psxRegs.pc, psxRegs.cycle, next_interupt);
@@ -50,14 +99,14 @@ void gen_interupt()
        psxRegs.cycle += 2;
 #endif
 
-       psxBranchTest();
+       irq_test();
+       //psxBranchTest();
+       //pending_exception = 1;
 
        schedule_timeslice();
 
        evprintf("  -ge %08x, %u->%u (%d)\n", psxRegs.pc, psxRegs.cycle,
                next_interupt, next_interupt - psxRegs.cycle);
-
-       pending_exception = 1; /* FIXME */
 }
 
 void MTC0_()
@@ -71,57 +120,22 @@ void MTC0_()
 
 void check_interupt()
 {
+       /* FIXME (also asm) */
        printf("ari64_check_interupt\n");
 }
 
-void read_nomem_new()
-{
-       printf("ari64_read_nomem_new\n");
-}
-
-static void read_mem8()
+void new_dyna_save(void)
 {
-       memprintf("ari64_read_mem8  %08x @%08x %u\n", address, psxRegs.pc, psxRegs.cycle);
-       readmem_word = psxMemRead8(address) & 0xff;
+       // psxRegs.intCycle is always maintained, no need to convert
 }
 
-static void read_mem16()
+void new_dyna_restore(void)
 {
-       memprintf("ari64_read_mem16 %08x @%08x %u\n", address, psxRegs.pc, psxRegs.cycle);
-       readmem_word = psxMemRead16(address) & 0xffff;
-}
-
-static void read_mem32()
-{
-       memprintf("ari64_read_mem32 %08x @%08x %u\n", address, psxRegs.pc, psxRegs.cycle);
-       readmem_word = psxMemRead32(address);
-}
-
-static void write_mem8()
-{
-       memprintf("ari64_write_mem8  %08x,       %02x @%08x %u\n", address, byte, psxRegs.pc, psxRegs.cycle);
-       psxMemWrite8(address, byte);
-}
-
-static void write_mem16()
-{
-       memprintf("ari64_write_mem16 %08x,     %04x @%08x %u\n", address, hword, psxRegs.pc, psxRegs.cycle);
-       psxMemWrite16(address, hword);
-}
-
-static void write_mem32()
-{
-       memprintf("ari64_write_mem32 %08x, %08x @%08x %u\n", address, word, psxRegs.pc, psxRegs.cycle);
-       psxMemWrite32(address, word);
+       int i;
+       for (i = 0; i < PSXINT_NEWDRC_CHECK; i++)
+               event_cycles[i] = psxRegs.intCycle[i].sCycle + psxRegs.intCycle[i].cycle;
 }
 
-void (*readmem[0x10000])();
-void (*readmemb[0x10000])();
-void (*readmemh[0x10000])();
-void (*writemem[0x10000])();
-void (*writememb[0x10000])();
-void (*writememh[0x10000])();
-
 void *gte_handlers[64];
 
 /* from gte.txt.. not sure if this is any good. */
@@ -137,29 +151,25 @@ static int ari64_init()
 {
        extern void (*psxCP2[64])();
        extern void psxNULL();
+       extern void *psxH_ptr;
        size_t i;
 
        new_dynarec_init();
-
-       for (i = 0; i < ARRAY_SIZE(readmem); i++) {
-               readmemb[i] = read_mem8;
-               readmemh[i] = read_mem16;
-               readmem[i] = read_mem32;
-               writememb[i] = write_mem8;
-               writememh[i] = write_mem16;
-               writemem[i] = write_mem32;
-       }
+       new_dyna_pcsx_mem_init();
 
        for (i = 0; i < ARRAY_SIZE(gte_handlers); i++)
                if (psxCP2[i] != psxNULL)
                        gte_handlers[i] = psxCP2[i];
 
+       psxH_ptr = psxH;
+
        return 0;
 }
 
 static void ari64_reset()
 {
        printf("ari64_reset\n");
+       new_dyna_pcsx_mem_reset();
        invalidate_all_pages();
        pending_exception = 1;
 }
@@ -184,8 +194,8 @@ static void ari64_clear(u32 addr, u32 size)
        evprintf("ari64_clear %08x %04x\n", addr, size);
 
        /* check for RAM mirrors */
-       if ((addr & ~0xe0000000) < 0x200000) {
-               addr &= ~0xe0000000;
+       if ((addr & ~0xe0600000) < 0x200000) {
+               addr &= ~0xe0600000;
                addr |=  0x80000000;
        }
 
@@ -237,11 +247,14 @@ unsigned short hword;
 unsigned char byte;
 int pending_exception, stop;
 unsigned int next_interupt;
+void *psxH_ptr;
 void new_dynarec_init() {}
 void new_dyna_start() {}
 void new_dynarec_cleanup() {}
 void invalidate_all_pages() {}
 void invalidate_block(unsigned int block) {}
+void new_dyna_pcsx_mem_init(void) {}
+void new_dyna_pcsx_mem_reset(void) {}
 #endif
 
 #ifdef DRC_DBG
@@ -438,7 +451,7 @@ end:
        printf("-- %d\n", bad);
        for (i = 0; i < 8; i++)
                printf("r%d=%08x r%2d=%08x r%2d=%08x r%2d=%08x\n", i, allregs_p[i],
-                       i+8, allregs_p[i+8], i+16, allregs_p[i+16], i+24, allregs_p[i+23]);
+                       i+8, allregs_p[i+8], i+16, allregs_p[i+16], i+24, allregs_p[i+24]);
        printf("PC: %08x/%08x, cycle %u\n", psxRegs.pc, ppc, psxRegs.cycle);
        dump_mem("/mnt/ntz/dev/pnd/tmp/psxram.dump", psxM, 0x200000);
        dump_mem("/mnt/ntz/dev/pnd/tmp/psxregs.dump", psxH, 0x10000);