cdrom: change pause timing again

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / emu_if.h

diff --git a/libpcsxcore/new_dynarec/emu_if.h b/libpcsxcore/new_dynarec/emu_if.h
index 5783ad3..ec307fc 100644 (file)
--- a/libpcsxcore/new_dynarec/emu_if.h
+++ b/libpcsxcore/new_dynarec/emu_if.h
@@ -1,29 +1,13 @@
 #include "new_dynarec.h"
 #include "../r3000a.h"
 
-extern char invalid_code[0x100000];
-
-/* weird stuff */
-#define EAX 0
-#define ECX 1
-
 extern int dynarec_local[];
 
-/* same as psxRegs */
-extern int reg[];
-
 /* same as psxRegs.GPR.n.* */
 extern int hi, lo;
 
 /* same as psxRegs.CP0.n.* */
 extern int reg_cop0[];
-#define Status   psxRegs.CP0.n.Status
-#define Cause    psxRegs.CP0.n.Cause
-#define EPC      psxRegs.CP0.n.EPC
-#define BadVAddr psxRegs.CP0.n.BadVAddr
-#define Context  psxRegs.CP0.n.Context
-#define EntryHi  psxRegs.CP0.n.EntryHi
-#define Count    psxRegs.cycle // psxRegs.CP0.n.Count
 
 /* COP2/GTE */
 enum gte_opcodes {
@@ -55,7 +39,6 @@ extern int reg_cop2d[], reg_cop2c[];
 extern void *gte_handlers[64];
 extern void *gte_handlers_nf[64];
 extern const char *gte_regnames[64];
-extern const char gte_cycletab[64];
 extern const uint64_t gte_reg_reads[64];
 extern const uint64_t gte_reg_writes[64];
 
@@ -72,14 +55,15 @@ void jump_handler_write32(u32 addr, u32 data, u32 cycles, u32 *table);
 void jump_handler_write_h(u32 addr, u32 data, u32 cycles, void *handler);
 void jump_handle_swl(u32 addr, u32 data, u32 cycles);
 void jump_handle_swr(u32 addr, u32 data, u32 cycles);
-void rcnt0_read_count_m0(u32 addr, u32, u32 cycles);
-void rcnt0_read_count_m1(u32 addr, u32, u32 cycles);
-void rcnt1_read_count_m0(u32 addr, u32, u32 cycles);
-void rcnt1_read_count_m1(u32 addr, u32, u32 cycles);
-void rcnt2_read_count_m0(u32 addr, u32, u32 cycles);
-void rcnt2_read_count_m1(u32 addr, u32, u32 cycles);
+u32  rcnt0_read_count_m0(u32 addr, u32, u32 cycles);
+u32  rcnt0_read_count_m1(u32 addr, u32, u32 cycles);
+u32  rcnt1_read_count_m0(u32 addr, u32, u32 cycles);
+u32  rcnt1_read_count_m1(u32 addr, u32, u32 cycles);
+u32  rcnt2_read_count_m0(u32 addr, u32, u32 cycles);
+u32  rcnt2_read_count_m1(u32 addr, u32, u32 cycles);
 
 extern unsigned int address;
+extern unsigned int hack_addr;
 extern void *psxH_ptr;
 extern void *zeromem_ptr;
 extern void *scratch_buf_ptr;
@@ -89,7 +73,7 @@ extern void *scratch_buf_ptr;
 extern u32 inv_code_start, inv_code_end;
 
 /* cycles/irqs */
-extern unsigned int next_interupt;
+extern u32 next_interupt;
 extern int pending_exception;
 
 /* called by drc */
@@ -99,8 +83,3 @@ void pcsx_mtc0_ds(u32 reg, u32 val);
 /* misc */
 extern void SysPrintf(const char *fmt, ...);
 
-#ifdef RAM_FIXED
-#define rdram ((u_char *)0x80000000)
-#else
-#define rdram ((u_char *)psxM)
-#endif