drc: rework for 64bit, part 1

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / linkage_arm.S

diff --git a/libpcsxcore/new_dynarec/linkage_arm.S b/libpcsxcore/new_dynarec/linkage_arm.S
index 147b0df..1f232c4 100644 (file)
--- a/libpcsxcore/new_dynarec/linkage_arm.S
+++ b/libpcsxcore/new_dynarec/linkage_arm.S
@@ -93,7 +93,7 @@ DRC_VAR(restore_candidate, 512)
 DRC_VAR(FCR0, 4)
 DRC_VAR(FCR31, 4)
 
-#ifdef __MACH__
+#ifdef TEXRELS_FORBIDDEN
        .data
        .align 2
 ptr_jump_in:
@@ -117,21 +117,21 @@ ptr_hash_table:
 #endif
 
 .macro load_varadr reg var
-#if defined(HAVE_ARMV7) && !defined(__PIC__)
-       movw    \reg, #:lower16:\var
-       movt    \reg, #:upper16:\var
-#elif defined(HAVE_ARMV7) && defined(__MACH__)
+#if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN)
        movw    \reg, #:lower16:(\var-(1678f+8))
        movt    \reg, #:upper16:(\var-(1678f+8))
 1678:
        add     \reg, pc
+#elif defined(HAVE_ARMV7) && !defined(__PIC__)
+       movw    \reg, #:lower16:\var
+       movt    \reg, #:upper16:\var
 #else
        ldr     \reg, =\var
 #endif
 .endm
 
 .macro load_varadr_ext reg var
-#if defined(HAVE_ARMV7) && defined(__MACH__) && defined(__PIC__)
+#if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN)
        movw    \reg, #:lower16:(ptr_\var-(1678f+8))
        movt    \reg, #:upper16:(ptr_\var-(1678f+8))
 1678:
@@ -221,8 +221,8 @@ ptr_hash_table:
        ldr     r5, [r3, r2, lsl #2]
        ldr     r7, [r6, r4]!
        teq     r7, r0
-       ldreq   pc, [r6, #4]
-       ldr     r7, [r6, #8]
+       ldreq   pc, [r6, #8]
+       ldr     r7, [r6, #4]
        teq     r7, r0
        ldreq   pc, [r6, #12]
        /* jump_dirty lookup */
@@ -237,10 +237,10 @@ ptr_hash_table:
        ldr     r1, [r4, #8]
        /* hash_table insert */
        ldr     r2, [r6]
-       ldr     r3, [r6, #4]
+       ldr     r3, [r6, #8]
        str     r0, [r6]
-       str     r1, [r6, #4]
-       str     r2, [r6, #8]
+       str     r1, [r6, #8]
+       str     r2, [r6, #4]
        str     r3, [r6, #12]
        mov     pc, r1
 8:
@@ -382,8 +382,8 @@ FUNCTION(jump_vaddr):
        and     r2, r3, r2, lsr #12
        ldr     r2, [r1, r2]!
        teq     r2, r0
-       ldreq   pc, [r1, #4]
-       ldr     r2, [r1, #8]
+       ldreq   pc, [r1, #8]
+       ldr     r2, [r1, #4]
        teq     r2, r0
        ldreq   pc, [r1, #12]
        str     r10, [fp, #LO_cycle_count]