drc: starting arm64 support

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / linkage_arm.S

diff --git a/libpcsxcore/new_dynarec/linkage_arm.S b/libpcsxcore/new_dynarec/linkage_arm.S
index d32dc0b..84a0178 100644 (file)
--- a/libpcsxcore/new_dynarec/linkage_arm.S
+++ b/libpcsxcore/new_dynarec/linkage_arm.S
@@ -89,9 +89,6 @@ DRC_VAR(scratch_buf_ptr, 4)
 DRC_VAR(mini_ht, 256)
 DRC_VAR(restore_candidate, 512)
 
-/* unused */
-DRC_VAR(FCR0, 4)
-DRC_VAR(FCR31, 4)
 
 #ifdef TEXRELS_FORBIDDEN
        .data
@@ -221,8 +218,8 @@ ptr_hash_table:
        ldr     r5, [r3, r2, lsl #2]
        ldr     r7, [r6, r4]!
        teq     r7, r0
-       ldreq   pc, [r6, #4]
-       ldr     r7, [r6, #8]
+       ldreq   pc, [r6, #8]
+       ldr     r7, [r6, #4]
        teq     r7, r0
        ldreq   pc, [r6, #12]
        /* jump_dirty lookup */
@@ -237,10 +234,10 @@ ptr_hash_table:
        ldr     r1, [r4, #8]
        /* hash_table insert */
        ldr     r2, [r6]
-       ldr     r3, [r6, #4]
+       ldr     r3, [r6, #8]
        str     r0, [r6]
-       str     r1, [r6, #4]
-       str     r2, [r6, #8]
+       str     r1, [r6, #8]
+       str     r2, [r6, #4]
        str     r3, [r6, #12]
        mov     pc, r1
 8:
@@ -382,8 +379,8 @@ FUNCTION(jump_vaddr):
        and     r2, r3, r2, lsr #12
        ldr     r2, [r1, r2]!
        teq     r2, r0
-       ldreq   pc, [r1, #4]
-       ldr     r2, [r1, #8]
+       ldreq   pc, [r1, #8]
+       ldr     r2, [r1, #4]
        teq     r2, r0
        ldreq   pc, [r1, #12]
        str     r10, [fp, #LO_cycle_count]
@@ -658,7 +655,7 @@ invalidate_addr_call:
 FUNCTION(new_dyna_start):
        /* ip is stored to conform EABI alignment */
        stmfd   sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
-       load_varadr fp, dynarec_local
+       mov     fp, r0 /* dynarec_local */
        ldr     r0, [fp, #LO_pcaddr]
        bl      get_addr_ht
        ldr     r1, [fp, #LO_next_interupt]