use pc-relative offsets for PIC too

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / linkage_arm.S

diff --git a/libpcsxcore/new_dynarec/linkage_arm.S b/libpcsxcore/new_dynarec/linkage_arm.S
index d79b09d..d32dc0b 100644 (file)
--- a/libpcsxcore/new_dynarec/linkage_arm.S
+++ b/libpcsxcore/new_dynarec/linkage_arm.S
@@ -20,6 +20,7 @@
  * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
 
 #include "arm_features.h"
+#include "new_dynarec_config.h"
 #include "linkage_offsets.h"
 
 
@@ -92,7 +93,7 @@ DRC_VAR(restore_candidate, 512)
 DRC_VAR(FCR0, 4)
 DRC_VAR(FCR31, 4)
 
-#ifdef __MACH__
+#ifdef TEXRELS_FORBIDDEN
        .data
        .align 2
 ptr_jump_in:
@@ -116,21 +117,21 @@ ptr_hash_table:
 #endif
 
 .macro load_varadr reg var
-#if defined(__ARM_ARCH_7A__) && !defined(__PIC__)
-       movw    \reg, #:lower16:\var
-       movt    \reg, #:upper16:\var
-#elif defined(__ARM_ARCH_7A__) && defined(__MACH__)
+#if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN)
        movw    \reg, #:lower16:(\var-(1678f+8))
        movt    \reg, #:upper16:(\var-(1678f+8))
 1678:
        add     \reg, pc
+#elif defined(HAVE_ARMV7) && !defined(__PIC__)
+       movw    \reg, #:lower16:\var
+       movt    \reg, #:upper16:\var
 #else
        ldr     \reg, =\var
 #endif
 .endm
 
 .macro load_varadr_ext reg var
-#if defined(__ARM_ARCH_7A__) && defined(__MACH__) && defined(__PIC__)
+#if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN)
        movw    \reg, #:lower16:(ptr_\var-(1678f+8))
        movt    \reg, #:upper16:(ptr_\var-(1678f+8))
 1678:
@@ -141,7 +142,7 @@ ptr_hash_table:
 .endm
 
 .macro mov_16 reg imm
-#ifdef __ARM_ARCH_7A__
+#ifdef HAVE_ARMV7
        movw    \reg, #\imm
 #else
        mov     \reg, #(\imm & 0x00ff)
@@ -150,7 +151,7 @@ ptr_hash_table:
 .endm
 
 .macro mov_24 reg imm
-#ifdef __ARM_ARCH_7A__
+#ifdef HAVE_ARMV7
        movw    \reg, #(\imm & 0xffff)
        movt    \reg, #(\imm >> 16)
 #else
@@ -160,9 +161,10 @@ ptr_hash_table:
 #endif
 .endm
 
+/* r0 = virtual target address */
+/* r1 = instruction to patch */
 .macro dyna_linker_main
-       /* r0 = virtual target address */
-       /* r1 = instruction to patch */
+#ifndef NO_WRITE_EXEC
        load_varadr_ext r3, jump_in
        /* get_page */
        lsr     r2, r0, #12
@@ -184,14 +186,10 @@ ptr_hash_table:
 1:
        movs    r4, r5
        beq     2f
-       ldr     r3, [r5]
-       ldr     r5, [r4, #12]
+       ldr     r3, [r5]         /* ll_entry .vaddr */
+       ldrd    r4, r5, [r4, #8] /* ll_entry .next, .addr */
        teq     r3, r0
        bne     1b
-       ldr     r3, [r4, #4]
-       ldr     r4, [r4, #8]
-       tst     r3, r3
-       bne     1b
        teq     r4, r6
        moveq   pc, r4 /* Stale i-cache */
        mov     r8, r4
@@ -246,6 +244,11 @@ ptr_hash_table:
        str     r3, [r6, #12]
        mov     pc, r1
 8:
+#else
+       /* XXX: should be able to do better than this... */
+       bl      get_addr_ht
+       mov     pc, r0
+#endif
 .endm
 
 
@@ -694,7 +697,7 @@ FUNCTION(jump_handler_read8):
 
 FUNCTION(jump_handler_read16):
        add     r1, #0x1000/4*4              @ shift to r16 part
-       pcsx_read_mem ldrbcc, 1
+       pcsx_read_mem ldrhcc, 1
 
 FUNCTION(jump_handler_read32):
        pcsx_read_mem ldrcc, 2