drc: patch up some potential issues on the switch

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / new_dynarec.c

diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
index 447023c..0fafc60 100644 (file)
--- a/libpcsxcore/new_dynarec/new_dynarec.c
+++ b/libpcsxcore/new_dynarec/new_dynarec.c
@@ -490,6 +490,8 @@ static void end_tcache_write(void *start, void *end)
   if (g_jit.type == JitType_CodeMemory) {
     armDCacheClean(start, len);
     armICacheInvalidate((char *)start - ndrc_write_ofs, len);
+    // as of v4.2.1 libnx lacks isb
+    __asm__ volatile("isb" ::: "memory");
   }
   #elif defined(__aarch64__)
   // as of 2021, __clear_cache() is still broken on arm64