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drc: adjust timing to be closer to the interpreter
[pcsx_rearmed.git]
/
libpcsxcore
/
new_dynarec
/
new_dynarec.c
diff --git
a/libpcsxcore/new_dynarec/new_dynarec.c
b/libpcsxcore/new_dynarec/new_dynarec.c
index
a1d7f6a
..
4ec3c53
100644
(file)
--- a/
libpcsxcore/new_dynarec/new_dynarec.c
+++ b/
libpcsxcore/new_dynarec/new_dynarec.c
@@
-4478,11
+4478,13
@@
void do_cc(int i,signed char i_regmap[],int *adj,int addr,int taken,int invert)
else if(*adj==0||invert) {
int cycles=CLOCK_ADJUST(count+2);
// faster loop HACK
else if(*adj==0||invert) {
int cycles=CLOCK_ADJUST(count+2);
// faster loop HACK
+#if 0
if (t&&*adj) {
int rel=t-i;
if(-NO_CYCLE_PENALTY_THR<rel&&rel<0)
cycles=CLOCK_ADJUST(*adj)+count+2-*adj;
}
if (t&&*adj) {
int rel=t-i;
if(-NO_CYCLE_PENALTY_THR<rel&&rel<0)
cycles=CLOCK_ADJUST(*adj)+count+2-*adj;
}
+#endif
emit_addimm_and_set_flags(cycles,HOST_CCREG);
jaddr=out;
emit_jns(0);
emit_addimm_and_set_flags(cycles,HOST_CCREG);
jaddr=out;
emit_jns(0);