drc: update according to interpreter

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / patches / trace_drc_chk

diff --git a/libpcsxcore/new_dynarec/patches/trace_drc_chk b/libpcsxcore/new_dynarec/patches/trace_drc_chk
index 414c221..12eeb8a 100644 (file)
--- a/libpcsxcore/new_dynarec/patches/trace_drc_chk
+++ b/libpcsxcore/new_dynarec/patches/trace_drc_chk
@@ -1,8 +1,8 @@
 diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
-index b160a4a..0d91999 100644
+index 2821d466..b3c7ea2f 100644
 --- a/libpcsxcore/new_dynarec/new_dynarec.c
 +++ b/libpcsxcore/new_dynarec/new_dynarec.c
-@@ -285,7 +285,7 @@ static struct decoded_insn
+@@ -311,7 +311,7 @@ static struct decoded_insn
    int new_dynarec_hacks_old;
    int new_dynarec_did_compile;
  
@@ -11,7 +11,7 @@ index b160a4a..0d91999 100644
  
    extern int cycle_count; // ... until end of the timeslice, counts -N -> 0
    extern int last_count;  // last absolute target, often = next_interupt
-@@ -532,6 +532,7 @@ static int cycle_multiplier_active;
+@@ -593,6 +593,7 @@ static int cycle_multiplier_active;
  
  static int CLOCK_ADJUST(int x)
  {
@@ -19,7 +19,7 @@ index b160a4a..0d91999 100644
    int m = cycle_multiplier_active;
    int s = (x >> 31) | 1;
    return (x * m + s * 50) / 100;
-@@ -662,6 +663,9 @@ static void *try_restore_block(u_int vaddr, u_int start_page, u_int end_page)
+@@ -745,6 +746,9 @@ static void *try_restore_block(u_int vaddr, u_int start_page, u_int end_page)
  // This is called from the recompiled JR/JALR instructions
  static void noinline *get_addr(u_int vaddr, int can_compile)
  {
@@ -29,7 +29,7 @@ index b160a4a..0d91999 100644
    u_int start_page = get_page_prev(vaddr);
    u_int i, page, end_page = get_page(vaddr);
    void *found_clean = NULL;
-@@ -7046,7 +7050,7 @@ static noinline void pass2_unneeded_regs(int istart,int iend,int r)
+@@ -7143,7 +7147,7 @@ static noinline void pass2_unneeded_regs(int istart,int iend,int r)
      // R0 is always unneeded
      u|=1;
      // Save it
@@ -38,7 +38,7 @@ index b160a4a..0d91999 100644
      gte_unneeded[i]=gte_u;
      /*
      printf("ur (%d,%d) %x: ",istart,iend,start+i*4);
-@@ -8236,6 +8240,7 @@ static noinline void pass5a_preallocate1(void)
+@@ -8292,6 +8296,7 @@ static noinline void pass5a_preallocate1(void)
  static noinline void pass5b_preallocate2(void)
  {
    int i, hr;
@@ -46,7 +46,7 @@ index b160a4a..0d91999 100644
    for(i=0;i<slen-1;i++)
    {
      if (!i || !dops[i-1].is_jump)
-@@ -9045,6 +9050,11 @@ static int new_recompile_block(u_int addr)
+@@ -9102,6 +9107,11 @@ static int new_recompile_block(u_int addr)
          load_reg(regs[i].regmap_entry,regs[i].regmap,INVCP);
  
        ds = assemble(i, &regs[i], ccadj[i]);
@@ -58,7 +58,7 @@ index b160a4a..0d91999 100644
  
        if (dops[i].is_ujump)
          literal_pool(1024);
-@@ -9236,6 +9246,10 @@ static int new_recompile_block(u_int addr)
+@@ -9292,6 +9302,10 @@ static int new_recompile_block(u_int addr)
  
  #ifdef ASSEM_PRINT
    fflush(stdout);
@@ -70,23 +70,23 @@ index b160a4a..0d91999 100644
    stat_inc(stat_bc_direct);
    return 0;
 diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
-index bb471b6..8f68a3b 100644
+index 190f8fc7..5feb7a02 100644
 --- a/libpcsxcore/new_dynarec/pcsxmem.c
 +++ b/libpcsxcore/new_dynarec/pcsxmem.c
-@@ -272,6 +272,8 @@ static void write_biu(u32 value)
-       if (address != 0xfffe0130)
+@@ -289,6 +289,8 @@ static void write_biu(u32 value)
                return;
+       }
  
 +extern u32 handler_cycle;
 +handler_cycle = psxRegs.cycle;
-       switch (value) {
-       case 0x800: case 0x804:
-               unmap_ram_write();
+       memprintf("write_biu %08x @%08x %u\n", value, psxRegs.pc, psxRegs.cycle);
+       psxRegs.biuReg = value;
+ }
 diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
-index ff0efbc..4459644 100644
+index 18bd6a4e..bc2eb3f6 100644
 --- a/libpcsxcore/psxcounters.c
 +++ b/libpcsxcore/psxcounters.c
-@@ -379,9 +379,12 @@ void psxRcntUpdate()
+@@ -389,9 +389,12 @@ void psxRcntUpdate()
  
  /******************************************************************************/
  
@@ -99,7 +99,7 @@ index ff0efbc..4459644 100644
  
      _psxRcntWcount( index, value );
      psxRcntSet();
-@@ -390,6 +393,7 @@ void psxRcntWcount( u32 index, u32 value )
+@@ -400,6 +403,7 @@ void psxRcntWcount( u32 index, u32 value )
  void psxRcntWmode( u32 index, u32 value )
  {
      verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value );
@@ -107,7 +107,7 @@ index ff0efbc..4459644 100644
  
      _psxRcntWmode( index, value );
      _psxRcntWcount( index, 0 );
-@@ -401,6 +405,7 @@ void psxRcntWmode( u32 index, u32 value )
+@@ -411,6 +415,7 @@ void psxRcntWmode( u32 index, u32 value )
  void psxRcntWtarget( u32 index, u32 value )
  {
      verboseLog( 1, "[RCNT %i] wtarget: %x\n", index, value );
@@ -115,7 +115,7 @@ index ff0efbc..4459644 100644
  
      rcnts[index].target = value;
  
-@@ -413,6 +418,7 @@ void psxRcntWtarget( u32 index, u32 value )
+@@ -423,6 +428,7 @@ void psxRcntWtarget( u32 index, u32 value )
  u32 psxRcntRcount( u32 index )
  {
      u32 count;
@@ -123,4 +123,31 @@ index ff0efbc..4459644 100644
  
      count = _psxRcntRcount( index );
  
-
+diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
+index e212d8a9..b98b694e 100644
+--- a/libpcsxcore/psxinterpreter.c
++++ b/libpcsxcore/psxinterpreter.c
+@@ -237,7 +237,7 @@ static inline void addCycle(psxRegisters *regs)
+ {
+       assert(regs->subCycleStep >= 0x10000);
+       regs->subCycle += regs->subCycleStep;
+-      regs->cycle += regs->subCycle >> 16;
++      regs->cycle += 2; //regs->subCycle >> 16;
+       regs->subCycle &= 0xffff;
+ }
+ 
+@@ -1341,8 +1341,14 @@ static void intShutdown() {
+ 
+ // single step (may do several ops in case of a branch or load delay)
+ void execI(psxRegisters *regs) {
++ extern int last_count;
++ void do_insn_cmp(void);
++ printf("execI %08x c %u, ni %u\n", regs->pc, regs->cycle, next_interupt);
++ last_count = 0;
+       do {
+               execIbp(psxMemRLUT, regs);
++              if (regs->dloadReg[0] || regs->dloadReg[1])
++                      do_insn_cmp();
+       } while (regs->dloadReg[0] || regs->dloadReg[1]);
+ }
+