#ifdef PSXHW_LOG
PSXHW_LOG("*Unknown 32bit write at address %x value %x\n", add, value);
diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
#ifdef PSXHW_LOG
PSXHW_LOG("*Unknown 32bit write at address %x value %x\n", add, value);
diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
--- a/libpcsxcore/psxinterpreter.c
+++ b/libpcsxcore/psxinterpreter.c
@@ -237,7 +237,7 @@ static inline void addCycle(psxRegisters *regs)
--- a/libpcsxcore/psxinterpreter.c
+++ b/libpcsxcore/psxinterpreter.c
@@ -237,7 +237,7 @@ static inline void addCycle(psxRegisters *regs)
-@@ -967,7 +969,7 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) {
+@@ -959,7 +961,7 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) {
regs->code = fetch(regs, memRLUT, pc);
psxBSC[regs->code >> 26](regs, regs->code);
+ psxRegs.cycle += 2;
regs->code = fetch(regs, memRLUT, pc);
psxBSC[regs->code >> 26](regs, regs->code);
+ psxRegs.cycle += 2;
-@@ -1195,6 +1198,7 @@ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
+@@ -1187,6 +1191,8 @@ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
regs->pc += 4;
regs->code = fetch(regs, memRLUT, pc);
psxBSC[regs->code >> 26](regs, regs->code);
+ psxRegs.cycle += 2;
regs->pc += 4;
regs->code = fetch(regs, memRLUT, pc);
psxBSC[regs->code >> 26](regs, regs->code);
+ psxRegs.cycle += 2;
assert(psxSPC[26] == psxDIV || psxSPC[26] == psxDIV_stall);
assert(psxSPC[27] == psxDIVU || psxSPC[27] == psxDIVU_stall);
assert(psxSPC[26] == psxDIV || psxSPC[26] == psxDIV_stall);
assert(psxSPC[27] == psxDIVU || psxSPC[27] == psxDIVU_stall);