diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
-index 2c82f58..8572981 100644
+index 2862c546..8af9a27e 100644
--- a/libpcsxcore/new_dynarec/emu_if.c
+++ b/libpcsxcore/new_dynarec/emu_if.c
-@@ -417,13 +417,17 @@ static void ari64_shutdown()
+@@ -322,13 +322,18 @@ static void ari64_shutdown()
{
new_dynarec_cleanup();
new_dyna_pcsx_mem_shutdown();
+ (void)ari64_execute;
++ (void)ari64_execute_block;
}
+extern void intExecuteT();
ari64_init,
ari64_reset,
- ari64_execute,
-- ari64_execute_until,
+- ari64_execute_block,
+ intExecuteT,
+ intExecuteBlockT,
ari64_clear,
- #ifdef ICACHE_EMULATION
ari64_notify,
-@@ -489,7 +493,7 @@ static u32 memcheck_read(u32 a)
+ ari64_apply_config,
+@@ -397,7 +402,7 @@ static u32 memcheck_read(u32 a)
return *(u32 *)(psxM + (a & 0x1ffffc));
}
void do_insn_trace(void)
{
static psxRegisters oldregs;
+diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
+index 190f8fc7..5feb7a02 100644
+--- a/libpcsxcore/new_dynarec/pcsxmem.c
++++ b/libpcsxcore/new_dynarec/pcsxmem.c
+@@ -289,6 +289,8 @@ static void write_biu(u32 value)
+ return;
+ }
+
++extern u32 handler_cycle;
++handler_cycle = psxRegs.cycle;
+ memprintf("write_biu %08x @%08x %u\n", value, psxRegs.pc, psxRegs.cycle);
+ psxRegs.biuReg = value;
+ }
+diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
+index 18bd6a4e..bc2eb3f6 100644
+--- a/libpcsxcore/psxcounters.c
++++ b/libpcsxcore/psxcounters.c
+@@ -389,9 +389,12 @@ void psxRcntUpdate()
+
+ /******************************************************************************/
+
++extern u32 handler_cycle;
++
+ void psxRcntWcount( u32 index, u32 value )
+ {
+ verboseLog( 2, "[RCNT %i] wcount: %x\n", index, value );
++handler_cycle = psxRegs.cycle;
+
+ _psxRcntWcount( index, value );
+ psxRcntSet();
+@@ -400,6 +403,7 @@ void psxRcntWcount( u32 index, u32 value )
+ void psxRcntWmode( u32 index, u32 value )
+ {
+ verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value );
++handler_cycle = psxRegs.cycle;
+
+ _psxRcntWmode( index, value );
+ _psxRcntWcount( index, 0 );
+@@ -411,6 +415,7 @@ void psxRcntWmode( u32 index, u32 value )
+ void psxRcntWtarget( u32 index, u32 value )
+ {
+ verboseLog( 1, "[RCNT %i] wtarget: %x\n", index, value );
++handler_cycle = psxRegs.cycle;
+
+ rcnts[index].target = value;
+
+@@ -423,6 +428,7 @@ void psxRcntWtarget( u32 index, u32 value )
+ u32 psxRcntRcount( u32 index )
+ {
+ u32 count;
++handler_cycle = psxRegs.cycle;
+
+ count = _psxRcntRcount( index );
+
diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
-index dbcb989..0716f5e 100644
+index 27ddfeab..d7c6ff05 100644
--- a/libpcsxcore/psxhw.c
+++ b/libpcsxcore/psxhw.c
-@@ -373,13 +373,14 @@ void psxHwWrite8(u32 add, u8 value) {
+@@ -377,13 +377,14 @@ void psxHwWrite8(u32 add, u8 value) {
case 0x1f801803: cdrWrite3(value); break;
default:
#ifdef PSXHW_LOG
PSXHW_LOG("*Known 8bit write at address %x value %x\n", add, value);
#endif
-@@ -504,6 +505,7 @@ void psxHwWrite16(u32 add, u16 value) {
+@@ -506,6 +507,7 @@ void psxHwWrite16(u32 add, u16 value) {
return;
}
psxHu16ref(add) = SWAPu16(value);
#ifdef PSXHW_LOG
PSXHW_LOG("*Unknown 16bit write at address %x value %x\n", add, value);
-@@ -699,9 +701,9 @@ void psxHwWrite32(u32 add, u32 value) {
+@@ -701,9 +703,9 @@ void psxHwWrite32(u32 add, u32 value) {
return;
case 0x1f801820:
case 0x1f801100:
#ifdef PSXHW_LOG
-@@ -759,6 +761,7 @@ void psxHwWrite32(u32 add, u32 value) {
+@@ -761,6 +763,7 @@ void psxHwWrite32(u32 add, u32 value) {
return;
}
#ifdef PSXHW_LOG
PSXHW_LOG("*Unknown 32bit write at address %x value %x\n", add, value);
diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
-index 02e00a9..a007dc5 100644
+index e212d8a9..42498e96 100644
--- a/libpcsxcore/psxinterpreter.c
+++ b/libpcsxcore/psxinterpreter.c
-@@ -512,8 +512,9 @@ static void doBranch(u32 tar) {
- debugI();
-
- psxRegs.pc += 4;
-- psxRegs.cycle += BIAS;
-
-+ (void)tmp;
-+#if 0
- // check for load delay
- tmp = psxRegs.code >> 26;
- switch (tmp) {
-@@ -547,13 +548,15 @@ static void doBranch(u32 tar) {
- }
- break;
- }
--
-+#endif
- psxBSC[psxRegs.code >> 26]();
+@@ -237,7 +237,7 @@ static inline void addCycle(psxRegisters *regs)
+ {
+ assert(regs->subCycleStep >= 0x10000);
+ regs->subCycle += regs->subCycleStep;
+- regs->cycle += regs->subCycle >> 16;
++ regs->cycle += 2; //regs->subCycle >> 16;
+ regs->subCycle &= 0xffff;
+ }
- branch = 0;
- psxRegs.pc = branchPC;
+@@ -434,7 +434,9 @@ static void doBranch(psxRegisters *regs, u32 tar, enum R3000Abdt taken) {
+ regs->CP0.n.Target = pc_final;
+ regs->branching = 0;
++ psxRegs.cycle += 2;
psxBranchTest();
-+
-+ psxRegs.cycle += BIAS;
++ psxRegs.cycle -= 2;
}
- /*********************************************************
-@@ -636,12 +639,13 @@ void psxMULTU() {
- psxRegs.GPR.n.hi = (u32)((res >> 32) & 0xffffffff);
+ static void doBranchReg(psxRegisters *regs, u32 tar) {
+@@ -959,7 +961,7 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) {
+ }
}
-+#define doBranchNotTaken() do { psxRegs.cycle -= BIAS; execI(); psxBranchTest(); psxRegs.cycle += BIAS; } while(0)
- /*********************************************************
- * Register branch logic *
- * Format: OP rs, offset *
- *********************************************************/
--#define RepZBranchi32(op) if(_i32(_rRs_) op 0) doBranch(_BranchTarget_);
--#define RepZBranchLinki32(op) { _SetLink(31); if(_i32(_rRs_) op 0) { doBranch(_BranchTarget_); } }
-+#define RepZBranchi32(op) if(_i32(_rRs_) op 0) doBranch(_BranchTarget_); else doBranchNotTaken();
-+#define RepZBranchLinki32(op) { _SetLink(31); if(_i32(_rRs_) op 0) { doBranch(_BranchTarget_); } else doBranchNotTaken(); }
-
- void psxBGEZ() { RepZBranchi32(>=) } // Branch if Rs >= 0
- void psxBGEZAL() { RepZBranchLinki32(>=) } // Branch if Rs >= 0 and link
-@@ -711,7 +715,7 @@ void psxRFE() {
- * Register branch logic *
- * Format: OP rs, rt, offset *
- *********************************************************/
--#define RepBranchi32(op) if(_i32(_rRs_) op _i32(_rRt_)) doBranch(_BranchTarget_);
-+#define RepBranchi32(op) if(_i32(_rRs_) op _i32(_rRt_)) doBranch(_BranchTarget_); else doBranchNotTaken();
-
- void psxBEQ() { RepBranchi32(==) } // Branch if Rs == Rt
- void psxBNE() { RepBranchi32(!=) } // Branch if Rs != Rt
-@@ -895,6 +899,9 @@ void MTC0(int reg, u32 val) {
- case 12: // Status
- psxRegs.CP0.r[12] = val;
- psxTestSWInts();
-+#ifndef __arm__
-+ psxBranchTest();
-+#endif
- break;
-
- case 13: // Cause
-@@ -1057,6 +1064,23 @@ void intExecuteBlock() {
- while (!branch2) execI();
+-OP(psxMTC0) { MTC0(regs_, _Rd_, _u32(_rRt_)); }
++OP(psxMTC0) { MTC0(regs_, _Rd_, _u32(_rRt_)); psxBranchTest(); }
+
+ // no exception
+ static inline void psxNULLne(psxRegisters *regs) {
+@@ -1167,18 +1169,20 @@ static void intReset() {
+ static inline void execI_(u8 **memRLUT, psxRegisters *regs) {
+ u32 pc = regs->pc;
+
+- addCycle(regs);
++ //addCycle(regs);
+ dloadStep(regs);
+
+ regs->pc += 4;
+ regs->code = fetch(regs, memRLUT, pc);
+ psxBSC[regs->code >> 26](regs, regs->code);
++ psxRegs.cycle += 2;
++ fetchNoCache(regs, memRLUT, regs->pc); // bus err check
+ }
+
+ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
+ u32 pc = regs->pc;
+
+- addCycle(regs);
++ //addCycle(regs);
+ dloadStep(regs);
+
+ if (execBreakCheck(regs, pc))
+@@ -1187,6 +1191,8 @@ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
+ regs->pc += 4;
+ regs->code = fetch(regs, memRLUT, pc);
+ psxBSC[regs->code >> 26](regs, regs->code);
++ psxRegs.cycle += 2;
++ fetchNoCache(regs, memRLUT, regs->pc); // bus err check
+ }
+
+ static void intExecute() {
+@@ -1216,6 +1222,30 @@ void intExecuteBlock(enum blockExecCaller caller) {
+ execI_(memRLUT, regs_);
}
+extern void do_insn_trace(void);
+
+void intExecuteT() {
-+ for (;;) {
++ psxRegisters *regs_ = &psxRegs;
++ u8 **memRLUT = psxMemRLUT;
++ extern int stop;
++
++ while (!stop) {
+ do_insn_trace();
-+ execI();
++ execIbp(memRLUT, regs_);
+ }
+}
+
+void intExecuteBlockT() {
-+ branch2 = 0;
-+ while (!branch2) {
++ psxRegisters *regs_ = &psxRegs;
++ u8 **memRLUT = psxMemRLUT;
++
++ branchSeen = 0;
++ while (!branchSeen) {
+ do_insn_trace();
-+ execI();
++ execIbp(memRLUT, regs_);
+ }
+}
+
static void intClear(u32 Addr, u32 Size) {
}
+@@ -1263,7 +1293,7 @@ void intApplyConfig() {
+ assert(psxSPC[26] == psxDIV || psxSPC[26] == psxDIV_stall);
+ assert(psxSPC[27] == psxDIVU || psxSPC[27] == psxDIVU_stall);
+
+- if (Config.DisableStalls) {
++ if (1) {
+ psxBSC[18] = psxCOP2;
+ psxBSC[50] = gteLWC2;
+ psxBSC[58] = gteSWC2;
diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c
-index c09965d..135a5d0 100644
+index 54219ae0..41168ced 100644
--- a/libpcsxcore/psxmem.c
+++ b/libpcsxcore/psxmem.c
-@@ -219,11 +219,13 @@ void psxMemShutdown() {
+@@ -278,10 +278,13 @@ void psxMemOnIsolate(int enable)
+ : R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL);
}
- static int writeok = 1;
-+u32 last_io_addr;
-
++extern u32 last_io_addr;
++
u8 psxMemRead8(u32 mem) {
char *p;
u32 t;
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
-@@ -249,6 +251,7 @@ u16 psxMemRead16(u32 mem) {
+@@ -307,6 +310,7 @@ u16 psxMemRead16(u32 mem) {
char *p;
u32 t;
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
-@@ -274,6 +277,7 @@ u32 psxMemRead32(u32 mem) {
+@@ -332,6 +336,7 @@ u32 psxMemRead32(u32 mem) {
char *p;
u32 t;
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
-@@ -299,6 +303,7 @@ void psxMemWrite8(u32 mem, u8 value) {
+@@ -359,6 +364,7 @@ void psxMemWrite8(u32 mem, u8 value) {
char *p;
u32 t;
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
-@@ -326,6 +331,7 @@ void psxMemWrite16(u32 mem, u16 value) {
+@@ -386,6 +392,7 @@ void psxMemWrite16(u32 mem, u16 value) {
char *p;
u32 t;
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
-@@ -353,6 +359,7 @@ void psxMemWrite32(u32 mem, u32 value) {
+@@ -413,6 +420,7 @@ void psxMemWrite32(u32 mem, u32 value) {
char *p;
u32 t;
// if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n");
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
+@@ -431,6 +439,8 @@ void psxMemWrite32(u32 mem, u32 value) {
+ #endif
+ } else {
+ if (mem == 0xfffe0130) {
++extern u32 handler_cycle;
++handler_cycle = psxRegs.cycle;
+ psxRegs.biuReg = value;
+ return;
+ }
+diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c
+index dffbf6e7..0a3bdb65 100644
+--- a/libpcsxcore/r3000a.c
++++ b/libpcsxcore/r3000a.c
+@@ -124,6 +124,8 @@ void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) {
+ }
+
+ void psxBranchTest() {
++ extern u32 irq_test_cycle;
++ irq_test_cycle = psxRegs.cycle;
+ if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
+ psxRcntUpdate();
+
notaz.gp2x.de / pcsx_rearmed.git / blobdiff