fully reinit drc on change

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / pcsxmem.c

diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
index 586c760..4d83452 100644 (file)
--- a/libpcsxcore/new_dynarec/pcsxmem.c
+++ b/libpcsxcore/new_dynarec/pcsxmem.c
@@ -6,13 +6,19 @@
  */
 
 #include <stdio.h>
-#include <sys/mman.h>
 #include "../psxhw.h"
 #include "../cdrom.h"
 #include "../mdec.h"
+#include "../gpu.h"
+#include "../psxmem_map.h"
 #include "emu_if.h"
 #include "pcsxmem.h"
 
+#ifdef __thumb__
+#error the dynarec is incompatible with Thumb functions,
+#error please add -marm to compile flags
+#endif
+
 //#define memprintf printf
 #define memprintf(...)
 
@@ -27,8 +33,10 @@ static u32 mem_unmwtab[(1+2+4) * 0x1000 / 4];
 static void map_item(u32 *out, const void *h, u32 flag)
 {
        u32 hv = (u32)h;
-       if (hv & 1)
-               fprintf(stderr, "%p has LSB set\n", h);
+       if (hv & 1) {
+               SysPrintf("FATAL: %p has LSB set\n", h);
+               abort();
+       }
        *out = (hv >> 1) | (flag << 31);
 }
 
@@ -40,7 +48,7 @@ static void map_item(u32 *out, const void *h, u32 flag)
 #define IOMEM16(a) (0x1000/4 + (((a) & 0xfff) / 2))
 #define IOMEM8(a)  (0x1000/4 + 0x1000/2 + ((a) & 0xfff))
 
-static u8 unmapped_mem[0x1000];
+u8 zero_mem[0x1000];
 
 u32 read_mem_dummy()
 {
@@ -77,13 +85,11 @@ static void io_write_sio32(u32 value)
        sioWrite8((unsigned char)(value >> 24));
 }
 
+#ifndef DRC_DBG
+
 static void map_rcnt_rcount0(u32 mode)
 {
-       if (mode & 0x01) { // gate
-               map_item(&mem_iortab[IOMEM32(0x1100)], &psxH[0x1000], 0);
-               map_item(&mem_iortab[IOMEM16(0x1100)], &psxH[0x1000], 0);
-       }
-       else if (mode & 0x100) { // pixel clock
+       if (mode & 0x100) { // pixel clock
                map_item(&mem_iortab[IOMEM32(0x1100)], rcnt0_read_count_m1, 1);
                map_item(&mem_iortab[IOMEM16(0x1100)], rcnt0_read_count_m1, 1);
        }
@@ -95,11 +101,7 @@ static void map_rcnt_rcount0(u32 mode)
 
 static void map_rcnt_rcount1(u32 mode)
 {
-       if (mode & 0x01) { // gate
-               map_item(&mem_iortab[IOMEM32(0x1110)], &psxH[0x1000], 0);
-               map_item(&mem_iortab[IOMEM16(0x1110)], &psxH[0x1000], 0);
-       }
-       else if (mode & 0x100) { // hcnt
+       if (mode & 0x100) { // hcnt
                map_item(&mem_iortab[IOMEM32(0x1110)], rcnt1_read_count_m1, 1);
                map_item(&mem_iortab[IOMEM16(0x1110)], rcnt1_read_count_m1, 1);
        }
@@ -125,6 +127,12 @@ static void map_rcnt_rcount2(u32 mode)
        }
 }
 
+#else
+#define map_rcnt_rcount0(mode)
+#define map_rcnt_rcount1(mode)
+#define map_rcnt_rcount2(mode)
+#endif
+
 #define make_rcnt_funcs(i) \
 static u32 io_rcnt_read_count##i()  { return psxRcntRcount(i); } \
 static u32 io_rcnt_read_mode##i()   { return psxRcntRmode(i); } \
@@ -209,6 +217,27 @@ static void io_spu_write32(u32 value)
        wfunc(a + 2, value >> 16);
 }
 
+static u32 io_gpu_read_status(void)
+{
+       u32 v;
+
+       // meh2, syncing for img bit, might want to avoid it..
+       gpuSyncPluginSR();
+       v = HW_GPU_STATUS;
+
+       // XXX: because of large timeslices can't use hSyncCount, using rough
+       // approximization instead. Perhaps better use hcounter code here or something.
+       if (hSyncCount < 240 && (HW_GPU_STATUS & PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS)
+               v |= PSXGPU_LCF & (psxRegs.cycle << 20);
+       return v;
+}
+
+static void io_gpu_write_status(u32 value)
+{
+       GPU_writeStatus(value);
+       gpuSyncPluginSR();
+}
+
 static void map_ram_write(void)
 {
        int i;
@@ -272,10 +301,9 @@ void new_dyna_pcsx_mem_init(void)
        int i;
 
        // have to map these further to keep tcache close to .text
-       mem_readtab = mmap((void *)0x08000000, 0x200000 * 4, PROT_READ | PROT_WRITE,
-               MAP_FIXED | MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
-       if (mem_readtab == MAP_FAILED) {
-               fprintf(stderr, "failed to map mem tables\n");
+       mem_readtab = psxMap(0x08000000, 0x200000 * 4, 0, MAP_TAG_LUTS);
+       if (mem_readtab == NULL) {
+               SysPrintf("failed to map mem tables\n");
                exit(1);
        }
        mem_writetab = mem_readtab + 0x100000;
@@ -290,7 +318,7 @@ void new_dyna_pcsx_mem_init(void)
        // default/unmapped memhandlers
        for (i = 0; i < 0x100000; i++) {
                //map_item(&mem_readtab[i], mem_unmrtab, 1);
-               map_l1_mem(mem_readtab, i, 0, 0x1000, unmapped_mem);
+               map_l1_mem(mem_readtab, i, 0, 0x1000, zero_mem);
                map_item(&mem_writetab[i], mem_unmwtab, 1);
        }
 
@@ -346,7 +374,7 @@ void new_dyna_pcsx_mem_init(void)
        map_item(&mem_iortab[IOMEM32(0x1124)], io_rcnt_read_mode2, 1);
        map_item(&mem_iortab[IOMEM32(0x1128)], io_rcnt_read_target2, 1);
 //     map_item(&mem_iortab[IOMEM32(0x1810)], GPU_readData, 1);
-//     map_item(&mem_iortab[IOMEM32(0x1814)], GPU_readStatus, 1);
+       map_item(&mem_iortab[IOMEM32(0x1814)], io_gpu_read_status, 1);
        map_item(&mem_iortab[IOMEM32(0x1820)], mdecRead0, 1);
        map_item(&mem_iortab[IOMEM32(0x1824)], mdecRead1, 1);
 
@@ -392,7 +420,7 @@ void new_dyna_pcsx_mem_init(void)
        map_item(&mem_iowtab[IOMEM32(0x1124)], io_rcnt_write_mode2, 1);
        map_item(&mem_iowtab[IOMEM32(0x1128)], io_rcnt_write_target2, 1);
 //     map_item(&mem_iowtab[IOMEM32(0x1810)], GPU_writeData, 1);
-//     map_item(&mem_iowtab[IOMEM32(0x1814)], GPU_writeStatus, 1);
+       map_item(&mem_iowtab[IOMEM32(0x1814)], io_gpu_write_status, 1);
        map_item(&mem_iowtab[IOMEM32(0x1820)], mdecWrite0, 1);
        map_item(&mem_iowtab[IOMEM32(0x1824)], mdecWrite1, 1);
 
@@ -441,11 +469,15 @@ void new_dyna_pcsx_mem_reset(void)
 
        // plugins might change so update the pointers
        map_item(&mem_iortab[IOMEM32(0x1810)], GPU_readData, 1);
-       map_item(&mem_iortab[IOMEM32(0x1814)], GPU_readStatus, 1);
 
        for (i = 0x1c00; i < 0x1e00; i += 2)
                map_item(&mem_iortab[IOMEM16(i)], SPU_readRegister, 1);
 
        map_item(&mem_iowtab[IOMEM32(0x1810)], GPU_writeData, 1);
-       map_item(&mem_iowtab[IOMEM32(0x1814)], GPU_writeStatus, 1);
+}
+
+void new_dyna_pcsx_mem_shutdown(void)
+{
+       psxUnmap(mem_readtab, 0x200000 * 4, MAP_TAG_LUTS);
+       mem_writetab = mem_readtab = NULL;
 }