reduce some code duplication

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / pcsxmem.c

diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
index 8057b7e..87aa17c 100644 (file)
--- a/libpcsxcore/new_dynarec/pcsxmem.c
+++ b/libpcsxcore/new_dynarec/pcsxmem.c
@@ -67,7 +67,7 @@ static u32 read_mem_dummy(u32 addr)
 
 static void write_mem_dummy(u32 data)
 {
-       if (!(psxRegs.CP0.n.Status & (1 << 16)))
+       if (!(psxRegs.CP0.n.SR & (1 << 16)))
                memprintf("unmapped w %08x, %08x @%08x %u\n",
                          address, data, psxRegs.pc, psxRegs.cycle);
 }
@@ -157,43 +157,6 @@ make_rcnt_funcs(0)
 make_rcnt_funcs(1)
 make_rcnt_funcs(2)
 
-static void io_write_ireg16(u32 value)
-{
-       psxHu16ref(0x1070) &= value;
-}
-
-static void io_write_imask16(u32 value)
-{
-       psxHu16ref(0x1074) = value;
-       if (psxHu16ref(0x1070) & value)
-               new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1);
-}
-
-static void io_write_ireg32(u32 value)
-{
-       psxHu32ref(0x1070) &= value;
-}
-
-static void io_write_imask32(u32 value)
-{
-       psxHu32ref(0x1074) = value;
-       if (psxHu32ref(0x1070) & value)
-               new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1);
-}
-
-static void io_write_dma_icr32(u32 value)
-{
-       u32 tmp = value & 0x00ff803f;
-       tmp |= (SWAPu32(HW_DMA_ICR) & ~value) & 0x7f000000;
-       if ((tmp & HW_DMA_ICR_GLOBAL_ENABLE && tmp & 0x7f000000)
-           || tmp & HW_DMA_ICR_BUS_ERROR) {
-               if (!(SWAPu32(HW_DMA_ICR) & HW_DMA_ICR_IRQ_SENT))
-                       psxHu32ref(0x1070) |= SWAP32(8);
-               tmp |= HW_DMA_ICR_IRQ_SENT;
-       }
-       HW_DMA_ICR = SWAPu32(tmp);
-}
-
 #define make_dma_func(n) \
 static void io_write_chcr##n(u32 value) \
 { \
@@ -385,6 +348,7 @@ void new_dyna_pcsx_mem_init(void)
        }
 
        map_item(&mem_iortab[IOMEM32(0x1040)], io_read_sio32, 1);
+       map_item(&mem_iortab[IOMEM16(0x1044)], sioReadStat16, 1);
        map_item(&mem_iortab[IOMEM32(0x1100)], io_rcnt_read_count0, 1);
        map_item(&mem_iortab[IOMEM32(0x1104)], io_rcnt_read_mode0, 1);
        map_item(&mem_iortab[IOMEM32(0x1108)], io_rcnt_read_target0, 1);
@@ -422,15 +386,15 @@ void new_dyna_pcsx_mem_init(void)
 
        // write(u32 data)
        map_item(&mem_iowtab[IOMEM32(0x1040)], io_write_sio32, 1);
-       map_item(&mem_iowtab[IOMEM32(0x1070)], io_write_ireg32, 1);
-       map_item(&mem_iowtab[IOMEM32(0x1074)], io_write_imask32, 1);
+       map_item(&mem_iowtab[IOMEM32(0x1070)], psxHwWriteIstat, 1);
+       map_item(&mem_iowtab[IOMEM32(0x1074)], psxHwWriteImask, 1);
        map_item(&mem_iowtab[IOMEM32(0x1088)], io_write_chcr0, 1);
        map_item(&mem_iowtab[IOMEM32(0x1098)], io_write_chcr1, 1);
        map_item(&mem_iowtab[IOMEM32(0x10a8)], io_write_chcr2, 1);
        map_item(&mem_iowtab[IOMEM32(0x10b8)], io_write_chcr3, 1);
        map_item(&mem_iowtab[IOMEM32(0x10c8)], io_write_chcr4, 1);
        map_item(&mem_iowtab[IOMEM32(0x10e8)], io_write_chcr6, 1);
-       map_item(&mem_iowtab[IOMEM32(0x10f4)], io_write_dma_icr32, 1);
+       map_item(&mem_iowtab[IOMEM32(0x10f4)], psxHwWriteDmaIcr32, 1);
        map_item(&mem_iowtab[IOMEM32(0x1100)], io_rcnt_write_count0, 1);
        map_item(&mem_iowtab[IOMEM32(0x1104)], io_rcnt_write_mode0, 1);
        map_item(&mem_iowtab[IOMEM32(0x1108)], io_rcnt_write_target0, 1);
@@ -450,8 +414,8 @@ void new_dyna_pcsx_mem_init(void)
        map_item(&mem_iowtab[IOMEM16(0x1048)], sioWriteMode16, 1);
        map_item(&mem_iowtab[IOMEM16(0x104a)], sioWriteCtrl16, 1);
        map_item(&mem_iowtab[IOMEM16(0x104e)], sioWriteBaud16, 1);
-       map_item(&mem_iowtab[IOMEM16(0x1070)], io_write_ireg16, 1);
-       map_item(&mem_iowtab[IOMEM16(0x1074)], io_write_imask16, 1);
+       map_item(&mem_iowtab[IOMEM16(0x1070)], psxHwWriteIstat, 1);
+       map_item(&mem_iowtab[IOMEM16(0x1074)], psxHwWriteImask, 1);
        map_item(&mem_iowtab[IOMEM16(0x1100)], io_rcnt_write_count0, 1);
        map_item(&mem_iowtab[IOMEM16(0x1104)], io_rcnt_write_mode0, 1);
        map_item(&mem_iowtab[IOMEM16(0x1108)], io_rcnt_write_target0, 1);
@@ -468,7 +432,7 @@ void new_dyna_pcsx_mem_init(void)
        map_item(&mem_iowtab[IOMEM8(0x1802)], cdrWrite2, 1);
        map_item(&mem_iowtab[IOMEM8(0x1803)], cdrWrite3, 1);
 
-       for (i = 0x1c00; i < 0x1e00; i += 2) {
+       for (i = 0x1c00; i < 0x2000; i += 2) {
                map_item(&mem_iowtab[IOMEM16(i)], io_spu_write16, 1);
                map_item(&mem_iowtab[IOMEM32(i)], io_spu_write32, 1);
        }
@@ -494,7 +458,7 @@ void new_dyna_pcsx_mem_reset(void)
        // plugins might change so update the pointers
        map_item(&mem_iortab[IOMEM32(0x1810)], GPU_readData, 1);
 
-       for (i = 0x1c00; i < 0x1e00; i += 2)
+       for (i = 0x1c00; i < 0x2000; i += 2)
                map_item(&mem_iortab[IOMEM16(i)], SPU_readRegister, 1);
 
        map_item(&mem_iowtab[IOMEM32(0x1810)], GPU_writeData, 1);
@@ -502,6 +466,6 @@ void new_dyna_pcsx_mem_reset(void)
 
 void new_dyna_pcsx_mem_shutdown(void)
 {
-       psxUnmap(mem_readtab, 0x200000 * 4, MAP_TAG_LUTS);
+       psxUnmap(mem_readtab, 0x200000 * sizeof(mem_readtab[0]), MAP_TAG_LUTS);
        mem_writetab = mem_readtab = NULL;
 }