drc: fix various register trashing in mtc0

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / pcsxmem.c

diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
index e56abb7..c9fb5a8 100644 (file)
--- a/libpcsxcore/new_dynarec/pcsxmem.c
+++ b/libpcsxcore/new_dynarec/pcsxmem.c
@@ -77,13 +77,11 @@ static void io_write_sio32(u32 value)
        sioWrite8((unsigned char)(value >> 24));
 }
 
+#ifndef DRC_DBG
+
 static void map_rcnt_rcount0(u32 mode)
 {
-       if (mode & 0x01) { // gate
-               map_item(&mem_iortab[IOMEM32(0x1100)], &psxH[0x1000], 0);
-               map_item(&mem_iortab[IOMEM16(0x1100)], &psxH[0x1000], 0);
-       }
-       else if (mode & 0x100) { // pixel clock
+       if (mode & 0x100) { // pixel clock
                map_item(&mem_iortab[IOMEM32(0x1100)], rcnt0_read_count_m1, 1);
                map_item(&mem_iortab[IOMEM16(0x1100)], rcnt0_read_count_m1, 1);
        }
@@ -95,11 +93,7 @@ static void map_rcnt_rcount0(u32 mode)
 
 static void map_rcnt_rcount1(u32 mode)
 {
-       if (mode & 0x01) { // gate
-               map_item(&mem_iortab[IOMEM32(0x1110)], &psxH[0x1000], 0);
-               map_item(&mem_iortab[IOMEM16(0x1110)], &psxH[0x1000], 0);
-       }
-       else if (mode & 0x100) { // hcnt
+       if (mode & 0x100) { // hcnt
                map_item(&mem_iortab[IOMEM32(0x1110)], rcnt1_read_count_m1, 1);
                map_item(&mem_iortab[IOMEM16(0x1110)], rcnt1_read_count_m1, 1);
        }
@@ -125,6 +119,12 @@ static void map_rcnt_rcount2(u32 mode)
        }
 }
 
+#else
+#define map_rcnt_rcount0(mode)
+#define map_rcnt_rcount1(mode)
+#define map_rcnt_rcount2(mode)
+#endif
+
 #define make_rcnt_funcs(i) \
 static u32 io_rcnt_read_count##i()  { return psxRcntRcount(i); } \
 static u32 io_rcnt_read_mode##i()   { return psxRcntRmode(i); } \