drc: arm64 wip

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / pcsxmem_inline.c

diff --git a/libpcsxcore/new_dynarec/pcsxmem_inline.c b/libpcsxcore/new_dynarec/pcsxmem_inline.c
index 02e7705..69227f2 100644 (file)
--- a/libpcsxcore/new_dynarec/pcsxmem_inline.c
+++ b/libpcsxcore/new_dynarec/pcsxmem_inline.c
@@ -15,6 +15,7 @@ static int pcsx_direct_read(int type, u_int addr, int cc_adj, int cc, int rs, in
       case 0x1120: // rcnt2 count
         if (rt < 0) goto dont_care;
         if (cc < 0) return 0;
+        host_tempreg_acquire();
         emit_readword(&rcnts[2].mode, HOST_TEMPREG);
         emit_readword(&rcnts[2].cycleStart, rt);
         emit_testimm(HOST_TEMPREG, 0x200);
@@ -23,6 +24,7 @@ static int pcsx_direct_read(int type, u_int addr, int cc_adj, int cc, int rs, in
         emit_add(HOST_TEMPREG, cc, HOST_TEMPREG);
         if (cc_adj)
           emit_addimm(HOST_TEMPREG, cc_adj, rt);
+        host_tempreg_release();
         emit_shrne_imm(rt, 3, rt);
         mov_loadtype_adj(type!=LOADW_STUB?type:LOADH_STUB, rt, rt);
         goto hit;
@@ -32,8 +34,10 @@ static int pcsx_direct_read(int type, u_int addr, int cc_adj, int cc, int rs, in
         if (rt < 0) return 0;
         t = (addr >> 4) & 3;
         emit_readword(&rcnts[t].mode, rt);
+        host_tempreg_acquire();
         emit_andimm(rt, ~0x1800, HOST_TEMPREG);
         emit_writeword(HOST_TEMPREG, &rcnts[t].mode);
+        host_tempreg_release();
         mov_loadtype_adj(type, rt, rt);
         goto hit;
     }