*/
#include "psxdma.h"
+#include "gpu.h"
+
+#ifndef min
+#define min(a, b) ((b) < (a) ? (b) : (a))
+#endif
+#ifndef PSXDMA_LOG
+#define PSXDMA_LOG(...)
+#endif
// Dma0/1 in Mdec.c
// Dma3 in CdRom.c
void spuInterrupt() {
- HW_DMA4_CHCR &= SWAP32(~0x01000000);
- DMA_INTERRUPT(4);
+ if (HW_DMA4_CHCR & SWAP32(0x01000000))
+ {
+ HW_DMA4_CHCR &= SWAP32(~0x01000000);
+ DMA_INTERRUPT(4);
+ }
}
void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
+ u32 words, words_max = 0, words_copy;
u16 *ptr;
- u32 size;
+
+ madr &= ~3;
+ ptr = getDmaRam(madr, &words_max);
+ if (ptr == INVALID_PTR)
+ log_unhandled("bad dma4 madr %x\n", madr);
+
+ words = words_copy = (bcr >> 16) * (bcr & 0xffff);
+ if (words_copy > words_max) {
+ log_unhandled("bad dma4 madr %x bcr %x\n", madr, bcr);
+ words_copy = words_max;
+ }
switch (chcr) {
case 0x01000201: //cpu to spu transfer
-#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA4 SPU - mem2spu *** %x addr = %x size = %x\n", chcr, madr, bcr);
-#endif
- ptr = (u16 *)PSXM(madr);
- if (ptr == NULL) {
-#ifdef CPU_LOG
- CPU_LOG("*** DMA4 SPU - mem2spu *** NULL Pointer!!!\n");
-#endif
+ if (ptr == INVALID_PTR)
break;
- }
- SPU_writeDMAMem(ptr, (bcr >> 16) * (bcr & 0xffff) * 2);
- SPUDMA_INT((bcr >> 16) * (bcr & 0xffff) / 2);
+ SPU_writeDMAMem(ptr, words_copy * 2, psxRegs.cycle);
+ HW_DMA4_MADR = SWAPu32(madr + words_copy * 2);
+ // This should be much slower, like 12+ cycles/byte, it's like
+ // that because the CPU runs too fast and fifo is not emulated.
+ // See also set_dma_end().
+ set_event(PSXINT_SPUDMA, words * 4 * 4);
return;
case 0x01000200: //spu to cpu transfer
-#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA4 SPU - spu2mem *** %x addr = %x size = %x\n", chcr, madr, bcr);
-#endif
- ptr = (u16 *)PSXM(madr);
- if (ptr == NULL) {
-#ifdef CPU_LOG
- CPU_LOG("*** DMA4 SPU - spu2mem *** NULL Pointer!!!\n");
-#endif
+ if (ptr == INVALID_PTR)
break;
- }
- size = (bcr >> 16) * (bcr & 0xffff) * 2;
- SPU_readDMAMem(ptr, size);
- psxCpu->Clear(madr, size);
- break;
+ SPU_readDMAMem(ptr, words_copy * 2, psxRegs.cycle);
+ psxCpu->Clear(madr, words_copy);
+
+ HW_DMA4_MADR = SWAPu32(madr + words_copy * 4);
+ set_event(PSXINT_SPUDMA, words * 4 * 4);
+ return;
-#ifdef PSXDMA_LOG
default:
- PSXDMA_LOG("*** DMA4 SPU - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
+ log_unhandled("*** DMA4 SPU - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
break;
-#endif
}
HW_DMA4_CHCR &= SWAP32(~0x01000000);
DMA_INTERRUPT(4);
}
-void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
- u32 *ptr;
+#if 0
+// Taken from PEOPS SOFTGPU
+static inline boolean CheckForEndlessLoop(u32 laddr, u32 *lUsedAddr) {
+ if (laddr == lUsedAddr[1]) return TRUE;
+ if (laddr == lUsedAddr[2]) return TRUE;
+
+ if (laddr < lUsedAddr[0]) lUsedAddr[1] = laddr;
+ else lUsedAddr[2] = laddr;
+
+ lUsedAddr[0] = laddr;
+
+ return FALSE;
+}
+
+static u32 gpuDmaChainSize(u32 addr) {
u32 size;
+ u32 DMACommandCounter = 0;
+ u32 lUsedAddr[3];
- switch(chcr) {
- case 0x01000200: // vram2mem
-#ifdef PSXDMA_LOG
- PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %x addr = %x size = %x\n", chcr, madr, bcr);
-#endif
- ptr = (u32 *)PSXM(madr);
- if (ptr == NULL) {
-#ifdef CPU_LOG
- CPU_LOG("*** DMA2 GPU - vram2mem *** NULL Pointer!!!\n");
+ lUsedAddr[0] = lUsedAddr[1] = lUsedAddr[2] = 0xffffff;
+
+ // initial linked list ptr (word)
+ size = 1;
+
+ do {
+ addr &= 0x1ffffc;
+
+ if (DMACommandCounter++ > 2000000) break;
+ if (CheckForEndlessLoop(addr, lUsedAddr)) break;
+
+ // # 32-bit blocks to transfer
+ size += psxMu8( addr + 3 );
+
+ // next 32-bit pointer
+ addr = psxMu32( addr & ~0x3 ) & 0xffffff;
+ size += 1;
+ } while (!(addr & 0x800000)); // contrary to some documentation, the end-of-linked-list marker is not actually 0xFF'FFFF
+ // any pointer with bit 23 set will do.
+
+ return size;
+}
#endif
+
+void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
+ u32 *ptr, madr_next, *madr_next_p;
+ u32 words, words_left, words_max, words_copy;
+ int cycles_sum, cycles_last_cmd = 0, do_walking;
+
+ madr &= ~3;
+ switch (chcr) {
+ case 0x01000200: // vram2mem
+ PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
+ ptr = getDmaRam(madr, &words_max);
+ if (ptr == INVALID_PTR) {
+ log_unhandled("bad dma2 madr %x\n", madr);
break;
}
- size = (bcr >> 16) * (bcr & 0xffff);
- GPU_readDataMem(ptr, size);
- psxCpu->Clear(madr, size);
- break;
+ // BA blocks * BS words (word = 32-bits)
+ words = words_copy = (bcr >> 16) * (bcr & 0xffff);
+ if (words > words_max) {
+ log_unhandled("bad dma2 madr %x bcr %x\n", madr, bcr);
+ words_copy = words_max;
+ }
+ GPU_readDataMem(ptr, words_copy);
+ psxCpu->Clear(madr, words_copy);
+
+ HW_DMA2_MADR = SWAPu32(madr + words_copy * 4);
+
+ // careful: gpu_state_change() also messes with this
+ psxRegs.gpuIdleAfter = psxRegs.cycle + words / 4 + 16;
+ // already 32-bit word size ((size * 4) / 4)
+ set_event(PSXINT_GPUDMA, words / 4);
+ return;
case 0x01000201: // mem2vram
-#ifdef PSXDMA_LOG
- PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %x addr = %x size = %x\n", chcr, madr, bcr);
-#endif
- ptr = (u32 *)PSXM(madr);
- if (ptr == NULL) {
-#ifdef CPU_LOG
- CPU_LOG("*** DMA2 GPU - mem2vram *** NULL Pointer!!!\n");
-#endif
- break;
+ PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
+ words = words_left = (bcr >> 16) * (bcr & 0xffff);
+ while (words_left > 0) {
+ ptr = getDmaRam(madr, &words_max);
+ if (ptr == INVALID_PTR) {
+ log_unhandled("bad2 dma madr %x\n", madr);
+ break;
+ }
+ words_copy = min(words_left, words_max);
+ GPU_writeDataMem(ptr, words_copy);
+ words_left -= words_copy;
+ madr += words_copy * 4;
}
- size = (bcr >> 16) * (bcr & 0xffff);
- GPU_writeDataMem(ptr, size);
- GPUDMA_INT(size / 4);
+
+ HW_DMA2_MADR = SWAPu32(madr);
+
+ // careful: gpu_state_change() also messes with this
+ psxRegs.gpuIdleAfter = psxRegs.cycle + words / 4 + 16;
+ // already 32-bit word size ((size * 4) / 4)
+ set_event(PSXINT_GPUDMA, words / 4);
return;
case 0x01000401: // dma chain
-#ifdef PSXDMA_LOG
- PSXDMA_LOG("*** DMA 2 - GPU dma chain *** %x addr = %x size = %x\n", chcr, madr, bcr);
-#endif
- GPU_dmaChain((u32 *)psxM, madr & 0x1fffff);
- break;
+ PSXDMA_LOG("*** DMA 2 - GPU dma chain *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
+ // when not emulating walking progress, end immediately
+ madr_next = 0xffffff;
+
+ do_walking = Config.GpuListWalking;
+ if (do_walking < 0 || Config.hacks.gpu_timing1024)
+ do_walking = Config.hacks.gpu_slow_list_walking;
+ madr_next_p = do_walking ? &madr_next : NULL;
+
+ cycles_sum = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff,
+ madr_next_p, &cycles_last_cmd);
+
+ HW_DMA2_MADR = SWAPu32(madr_next);
+
+ // a hack for Judge Dredd which is annoyingly sensitive to timing
+ if (Config.hacks.gpu_timing1024)
+ cycles_sum = 1024;
+
+ psxRegs.gpuIdleAfter = psxRegs.cycle + cycles_sum + cycles_last_cmd;
+ set_event(PSXINT_GPUDMA, cycles_sum);
+ //printf("%u dma2cf: %6d,%4d %08x %08x %08x %08x\n", psxRegs.cycle,
+ // cycles_sum, cycles_last_cmd, madr, bcr, chcr, HW_DMA2_MADR);
+ return;
-#ifdef PSXDMA_LOG
default:
- PSXDMA_LOG("*** DMA 2 - GPU unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
+ log_unhandled("*** DMA 2 - GPU unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
break;
-#endif
}
HW_DMA2_CHCR &= SWAP32(~0x01000000);
}
void gpuInterrupt() {
- HW_DMA2_CHCR &= SWAP32(~0x01000000);
- DMA_INTERRUPT(2);
+ if (HW_DMA2_CHCR == SWAP32(0x01000401) && !(HW_DMA2_MADR & SWAP32(0x800000)))
+ {
+ u32 madr_next = 0xffffff, madr = SWAPu32(HW_DMA2_MADR);
+ int cycles_sum, cycles_last_cmd = 0;
+ cycles_sum = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff,
+ &madr_next, &cycles_last_cmd);
+ HW_DMA2_MADR = SWAPu32(madr_next);
+ if ((s32)(psxRegs.gpuIdleAfter - psxRegs.cycle) > 0)
+ cycles_sum += psxRegs.gpuIdleAfter - psxRegs.cycle;
+ psxRegs.gpuIdleAfter = psxRegs.cycle + cycles_sum + cycles_last_cmd;
+ set_event(PSXINT_GPUDMA, cycles_sum);
+ //printf("%u dma2cn: %6d,%4d %08x\n", psxRegs.cycle, cycles_sum,
+ // cycles_last_cmd, HW_DMA2_MADR);
+ return;
+ }
+ if (HW_DMA2_CHCR & SWAP32(0x01000000))
+ {
+ HW_DMA2_CHCR &= SWAP32(~0x01000000);
+ DMA_INTERRUPT(2);
+ }
+}
+
+void psxAbortDma2() {
+ psxRegs.gpuIdleAfter = psxRegs.cycle + 32;
}
void psxDma6(u32 madr, u32 bcr, u32 chcr) {
- u32 *mem = (u32 *)PSXM(madr);
+ u32 words, words_max;
+ u32 *mem;
-#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA6 OT *** %x addr = %x size = %x\n", chcr, madr, bcr);
-#endif
if (chcr == 0x11000002) {
- if (mem == NULL) {
-#ifdef CPU_LOG
- CPU_LOG("*** DMA6 OT *** NULL Pointer!!!\n");
-#endif
- HW_DMA6_CHCR &= SWAP32(~0x01000000);
+ madr &= ~3;
+ mem = getDmaRam(madr, &words_max);
+ if (mem == INVALID_PTR) {
+ log_unhandled("bad6 dma madr %x\n", madr);
+ HW_DMA6_CHCR &= SWAP32(~0x11000000);
DMA_INTERRUPT(6);
return;
}
- while (bcr--) {
+ // already 32-bit size
+ words = bcr;
+
+ while (bcr-- && mem > (u32 *)psxM) {
*mem-- = SWAP32((madr - 4) & 0xffffff);
madr -= 4;
}
- mem++; *mem = 0xffffff;
+ *++mem = SWAP32(0xffffff);
+
+ // halted
+ psxRegs.cycle += words;
+ set_event(PSXINT_GPUOTCDMA, 16);
+ return;
}
-#ifdef PSXDMA_LOG
else {
// Unknown option
- PSXDMA_LOG("*** DMA6 OT - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
+ log_unhandled("*** DMA6 OT - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
}
-#endif
- HW_DMA6_CHCR &= SWAP32(~0x01000000);
+ HW_DMA6_CHCR &= SWAP32(~0x11000000);
DMA_INTERRUPT(6);
}
+void gpuotcInterrupt()
+{
+ if (HW_DMA6_CHCR & SWAP32(0x01000000))
+ {
+ HW_DMA6_CHCR &= SWAP32(~0x11000000);
+ DMA_INTERRUPT(6);
+ }
+}
notaz.gp2x.de / pcsx_rearmed.git / blobdiff