*/
#include "psxdma.h"
+#include "gpu.h"
// Dma0/1 in Mdec.c
// Dma3 in CdRom.c
void spuInterrupt() {
- HW_DMA4_CHCR &= SWAP32(~0x01000000);
- DMA_INTERRUPT(4);
+ if (HW_DMA4_CHCR & SWAP32(0x01000000))
+ {
+ HW_DMA4_CHCR &= SWAP32(~0x01000000);
+ DMA_INTERRUPT(4);
+ }
}
void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
u16 *ptr;
- u32 size;
+ u32 words;
switch (chcr) {
case 0x01000201: //cpu to spu transfer
#endif
break;
}
- SPU_writeDMAMem(ptr, (bcr >> 16) * (bcr & 0xffff) * 2);
- SPUDMA_INT((bcr >> 16) * (bcr & 0xffff) / 2);
+ words = (bcr >> 16) * (bcr & 0xffff);
+ SPU_writeDMAMem(ptr, words * 2, psxRegs.cycle);
+ HW_DMA4_MADR = SWAPu32(madr + words * 4);
+ SPUDMA_INT(words / 2);
return;
case 0x01000200: //spu to cpu transfer
#endif
break;
}
- size = (bcr >> 16) * (bcr & 0xffff) * 2;
- SPU_readDMAMem(ptr, size);
- psxCpu->Clear(madr, size);
- break;
+ words = (bcr >> 16) * (bcr & 0xffff);
+ SPU_readDMAMem(ptr, words * 2, psxRegs.cycle);
+ psxCpu->Clear(madr, words);
+
+ HW_DMA4_MADR = SWAPu32(madr + words * 4);
+ SPUDMA_INT(words / 2);
+ return;
#ifdef PSXDMA_LOG
default:
DMA_INTERRUPT(4);
}
+// Taken from PEOPS SOFTGPU
+static inline boolean CheckForEndlessLoop(u32 laddr, u32 *lUsedAddr) {
+ if (laddr == lUsedAddr[1]) return TRUE;
+ if (laddr == lUsedAddr[2]) return TRUE;
+
+ if (laddr < lUsedAddr[0]) lUsedAddr[1] = laddr;
+ else lUsedAddr[2] = laddr;
+
+ lUsedAddr[0] = laddr;
+
+ return FALSE;
+}
+
+static u32 gpuDmaChainSize(u32 addr) {
+ u32 size;
+ u32 DMACommandCounter = 0;
+ u32 lUsedAddr[3];
+
+ lUsedAddr[0] = lUsedAddr[1] = lUsedAddr[2] = 0xffffff;
+
+ // initial linked list ptr (word)
+ size = 1;
+
+ do {
+ addr &= 0x1ffffc;
+
+ if (DMACommandCounter++ > 2000000) break;
+ if (CheckForEndlessLoop(addr, lUsedAddr)) break;
+
+ // # 32-bit blocks to transfer
+ size += psxMu8( addr + 3 );
+
+ // next 32-bit pointer
+ addr = psxMu32( addr & ~0x3 ) & 0xffffff;
+ size += 1;
+ } while (!(addr & 0x800000)); // contrary to some documentation, the end-of-linked-list marker is not actually 0xFF'FFFF
+ // any pointer with bit 23 set will do.
+
+ return size;
+}
+
void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
u32 *ptr;
+ u32 words;
u32 size;
- switch(chcr) {
+ switch (chcr) {
case 0x01000200: // vram2mem
#ifdef PSXDMA_LOG
- PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %x addr = %x size = %x\n", chcr, madr, bcr);
+ PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
#endif
ptr = (u32 *)PSXM(madr);
if (ptr == NULL) {
#endif
break;
}
- size = (bcr >> 16) * (bcr & 0xffff);
- GPU_readDataMem(ptr, size);
- psxCpu->Clear(madr, size);
- break;
+ // BA blocks * BS words (word = 32-bits)
+ words = (bcr >> 16) * (bcr & 0xffff);
+ GPU_readDataMem(ptr, words);
+ psxCpu->Clear(madr, words);
+
+ HW_DMA2_MADR = SWAPu32(madr + words * 4);
+
+ // already 32-bit word size ((size * 4) / 4)
+ GPUDMA_INT(words / 4);
+ return;
case 0x01000201: // mem2vram
#ifdef PSXDMA_LOG
- PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %x addr = %x size = %x\n", chcr, madr, bcr);
+ PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
#endif
ptr = (u32 *)PSXM(madr);
if (ptr == NULL) {
#endif
break;
}
- size = (bcr >> 16) * (bcr & 0xffff);
- GPU_writeDataMem(ptr, size);
- GPUDMA_INT(size / 4);
+ // BA blocks * BS words (word = 32-bits)
+ words = (bcr >> 16) * (bcr & 0xffff);
+ GPU_writeDataMem(ptr, words);
+
+ HW_DMA2_MADR = SWAPu32(madr + words * 4);
+
+ // already 32-bit word size ((size * 4) / 4)
+ GPUDMA_INT(words / 4);
return;
case 0x01000401: // dma chain
#ifdef PSXDMA_LOG
- PSXDMA_LOG("*** DMA 2 - GPU dma chain *** %x addr = %x size = %x\n", chcr, madr, bcr);
+ PSXDMA_LOG("*** DMA 2 - GPU dma chain *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
#endif
- GPU_dmaChain((u32 *)psxM, madr & 0x1fffff);
- break;
+
+ size = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff);
+ if ((int)size <= 0)
+ size = gpuDmaChainSize(madr);
+ HW_GPU_STATUS &= ~PSXGPU_nBUSY;
+
+ // we don't emulate progress, just busy flag and end irq,
+ // so pretend we're already at the last block
+ HW_DMA2_MADR = SWAPu32(0xffffff);
+
+ // Tekken 3 = use 1.0 only (not 1.5x)
+
+ // Einhander = parse linked list in pieces (todo)
+ // Final Fantasy 4 = internal vram time (todo)
+ // Rebel Assault 2 = parse linked list in pieces (todo)
+ // Vampire Hunter D = allow edits to linked list (todo)
+ GPUDMA_INT(size);
+ return;
#ifdef PSXDMA_LOG
default:
- PSXDMA_LOG("*** DMA 2 - GPU unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
+ PSXDMA_LOG("*** DMA 2 - GPU unknown *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
break;
#endif
}
}
void gpuInterrupt() {
- HW_DMA2_CHCR &= SWAP32(~0x01000000);
- DMA_INTERRUPT(2);
+ if (HW_DMA2_CHCR & SWAP32(0x01000000))
+ {
+ HW_DMA2_CHCR &= SWAP32(~0x01000000);
+ DMA_INTERRUPT(2);
+ }
+ HW_GPU_STATUS |= PSXGPU_nBUSY; // GPU no longer busy
}
void psxDma6(u32 madr, u32 bcr, u32 chcr) {
+ u32 words;
u32 *mem = (u32 *)PSXM(madr);
#ifdef PSXDMA_LOG
return;
}
+ // already 32-bit size
+ words = bcr;
+
while (bcr--) {
*mem-- = SWAP32((madr - 4) & 0xffffff);
madr -= 4;
}
mem++; *mem = 0xffffff;
+
+ //GPUOTCDMA_INT(size);
+ // halted
+ psxRegs.cycle += words;
+ GPUOTCDMA_INT(16);
+ return;
}
#ifdef PSXDMA_LOG
else {
DMA_INTERRUPT(6);
}
+void gpuotcInterrupt()
+{
+ if (HW_DMA6_CHCR & SWAP32(0x01000000))
+ {
+ HW_DMA6_CHCR &= SWAP32(~0x01000000);
+ DMA_INTERRUPT(6);
+ }
+}
notaz.gp2x.de / pcsx_rearmed.git / blobdiff