rework gpu busy timing

[pcsx_rearmed.git] / libpcsxcore / psxhw.c

diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
index 254693e..4811f99 100644 (file)
--- a/libpcsxcore/psxhw.c
+++ b/libpcsxcore/psxhw.c
@@ -22,6 +22,7 @@
 */
 
 #include "psxhw.h"
+#include "psxevents.h"
 #include "mdec.h"
 #include "cdrom.h"
 #include "gpu.h"
@@ -40,7 +41,7 @@ void psxHwReset() {
        mdecInit(); // initialize mdec decoder
        cdrReset();
        psxRcntInit();
-       HW_GPU_STATUS = SWAP32(0x14802000);
+       HW_GPU_STATUS = SWAP32(0x10802000);
        psxHwReadGpuSRptr = Config.hacks.gpu_busy_hack
                ? psxHwReadGpuSRbusyHack : psxHwReadGpuSR;
 }
@@ -62,7 +63,7 @@ void psxHwWriteImask(u32 value)
        if (stat & value) {
                //if ((psxRegs.CP0.n.SR & 0x401) == 0x401)
                //      log_unhandled("irq on unmask @%08x\n", psxRegs.pc);
-               new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1);
+               set_event(PSXINT_NEWDRC_CHECK, 1);
        }
        psxRegs.CP0.n.Cause &= ~0x400;
        if (stat & value)
@@ -90,16 +91,17 @@ void psxHwWriteGpuSR(u32 value)
 
 u32 psxHwReadGpuSR(void)
 {
-       u32 v;
+       u32 v, c = psxRegs.cycle;
 
        // meh2, syncing for img bit, might want to avoid it..
        gpuSyncPluginSR();
-       v = HW_GPU_STATUS;
+       v = SWAP32(HW_GPU_STATUS);
+       v |= ((s32)(psxRegs.gpuIdleAfter - c) >> 31) & PSXGPU_nBUSY;
 
        // XXX: because of large timeslices can't use hSyncCount, using rough
        // approximization instead. Perhaps better use hcounter code here or something.
-       if (hSyncCount < 240 && (HW_GPU_STATUS & PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS)
-               v |= PSXGPU_LCF & (psxRegs.cycle << 20);
+       if (hSyncCount < 240 && (v & PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS)
+               v |= PSXGPU_LCF & (c << 20);
        return v;
 }