drc: make hash table issues easier to debug

[pcsx_rearmed.git] / libpcsxcore / psxinterpreter.c

diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
index be15f78..2ffab69 100644 (file)
--- a/libpcsxcore/psxinterpreter.c
+++ b/libpcsxcore/psxinterpreter.c
@@ -112,7 +112,8 @@ static void intException(psxRegisters *regs, u32 pc, u32 cause)
        if (cause != 0x20) {
                //FILE *f = fopen("/tmp/psx_ram.bin", "wb");
                //fwrite(psxM, 1, 0x200000, f); fclose(f);
-               log_unhandled("exception %08x @%08x\n", cause, pc);
+               log_unhandled("exception %08x @%08x ra=%08x\n",
+                       cause, pc, regs->GPR.n.ra);
        }
        dloadFlush(regs);
        regs->pc = pc;
@@ -127,6 +128,19 @@ static void intExceptionInsn(psxRegisters *regs, u32 cause)
        intException(regs, regs->pc - 4, cause);
 }
 
+static noinline void intExceptionReservedInsn(psxRegisters *regs)
+{
+#ifdef DO_EXCEPTION_RESERVEDI
+       static u32 ppc_ = ~0u;
+       if (regs->pc != ppc_) {
+               SysPrintf("reserved instruction %08x @%08x ra=%08x\n",
+                       regs->code, regs->pc - 4, regs->GPR.n.ra);
+               ppc_ = regs->pc;
+       }
+       intExceptionInsn(regs, R3000E_RI << 2);
+#endif
+}
+
 // 29  Enable for 80000000-ffffffff
 // 30  Enable for 00000000-7fffffff
 // 31  Enable exception
@@ -454,14 +468,6 @@ static void doBranchRegE(psxRegisters *regs, u32 tar) {
        doBranch(regs, tar, R3000A_BRANCH_TAKEN);
 }
 
-#if __has_builtin(__builtin_add_overflow) || (defined(__GNUC__) && __GNUC__ >= 5)
-#define add_overflow(a, b, r) __builtin_add_overflow(a, b, &(r))
-#define sub_overflow(a, b, r) __builtin_sub_overflow(a, b, &(r))
-#else
-#define add_overflow(a, b, r) ({r = (u32)a + (u32)b; (a ^ ~b) & (a ^ r) & (1u<<31);})
-#define sub_overflow(a, b, r) ({r = (u32)a - (u32)b; (a ^  b) & (a ^ r) & (1u<<31);})
-#endif
-
 static void addExc(psxRegisters *regs, u32 rt, s32 a1, s32 a2) {
        s32 val;
        if (add_overflow(a1, a2, val)) {
@@ -930,10 +936,8 @@ OP(psxSWRe) { if (checkST(regs_, _oB_     , 0)) doSWR(regs_, _Rt_, _oB_); }
 *********************************************************/
 OP(psxMFC0) {
        u32 r = _Rd_;
-#ifdef DO_EXCEPTION_RESERVEDI
        if (unlikely(0x00000417u & (1u << r)))
-               intExceptionInsn(regs_, R3000E_RI << 2);
-#endif
+               intExceptionReservedInsn(regs_);
        doLoad(regs_, _Rt_, regs_->CP0.r[r]);
 }
 
@@ -981,9 +985,7 @@ static inline void psxNULLne(psxRegisters *regs) {
 
 OP(psxNULL) {
        psxNULLne(regs_);
-#ifdef DO_EXCEPTION_RESERVEDI
-       intExceptionInsn(regs_, R3000E_RI << 2);
-#endif
+       intExceptionReservedInsn(regs_);
 }
 
 void gteNULL(struct psxCP2Regs *regs) {
@@ -1125,7 +1127,9 @@ OP(psxHLE) {
                psxSWCx(regs_, code);
                return;
        }
+       dloadFlush(regs_);
        psxHLEt[hleCode]();
+       branchSeen = 1;
 }
 
 static void (INT_ATTR *psxBSC[64])(psxRegisters *regs_, u32 code) = {
@@ -1344,12 +1348,15 @@ void intApplyConfig() {
 }
 
 static void intShutdown() {
+       dloadClear(&psxRegs);
 }
 
-// single step (may do several ops in case of a branch)
+// single step (may do several ops in case of a branch or load delay)
+// called by asm/dynarec
 void execI(psxRegisters *regs) {
-       execI_(psxMemRLUT, regs);
-       dloadFlush(regs);
+       do {
+               execIbp(psxMemRLUT, regs);
+       } while (regs->dloadReg[0] || regs->dloadReg[1]);
 }
 
 R3000Acpu psxInt = {