r3000a: reset cpu after setting up registers

[pcsx_rearmed.git] / libpcsxcore / r3000a.c

diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c
index 27c247b..98aff3a 100644 (file)
--- a/libpcsxcore/r3000a.c
+++ b/libpcsxcore/r3000a.c
@@ -48,8 +48,6 @@ int psxInit() {
 }
 
 void psxReset() {
-       psxCpu->Reset();
-
        psxMemReset();
 
        memset(&psxRegs, 0, sizeof(psxRegs));
@@ -59,6 +57,8 @@ void psxReset() {
        psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
        psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
 
+       psxCpu->Reset();
+
        psxHwReset();
        psxBiosInit();
 
@@ -151,6 +151,36 @@ void psxBranchTest() {
                                spuInterrupt();
                        }
                }
+               if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in
+                       if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) {
+                               psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA);
+                               mdec0Interrupt();
+                       }
+               }
+               if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc
+                       if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) {
+                               psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA);
+                               gpuotcInterrupt();
+                       }
+               }
+               if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom
+                       if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) {
+                               psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA);
+                               cdrDmaInterrupt();
+                       }
+               }
+               if (psxRegs.interrupt & (1 << PSXINT_CDRPLAY)) { // cdr play timing
+                       if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRPLAY].sCycle) >= psxRegs.intCycle[PSXINT_CDRPLAY].cycle) {
+                               psxRegs.interrupt &= ~(1 << PSXINT_CDRPLAY);
+                               cdrPlayInterrupt();
+                       }
+               }
+               if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states
+                       if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) {
+                               psxRegs.interrupt &= ~(1 << PSXINT_CDRLID);
+                               cdrLidSeekInterrupt();
+                       }
+               }
        }
 
        if (psxHu32(0x1070) & psxHu32(0x1074)) {