psxbios: completely rework exception handling

[pcsx_rearmed.git] / libpcsxcore / r3000a.c

diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c
index 1e8d0b0..b5fe3bd 100644 (file)
--- a/libpcsxcore/r3000a.c
+++ b/libpcsxcore/r3000a.c
@@ -25,18 +25,23 @@
 #include "cdrom.h"
 #include "mdec.h"
 #include "gte.h"
+#include "psxinterpreter.h"
+#include "../include/compiler_features.h"
 
 R3000Acpu *psxCpu = NULL;
+#ifdef DRC_DISABLE
 psxRegisters psxRegs;
+#endif
 
 int psxInit() {
-       SysPrintf(_("Running PCSX Version %s (%s).\n"), PACKAGE_VERSION, __DATE__);
+       SysPrintf(_("Running PCSX Version %s (%s).\n"), PCSX_VERSION, __DATE__);
 
-#ifdef PSXREC
+#ifndef DRC_DISABLE
        if (Config.Cpu == CPU_INTERPRETER) {
                psxCpu = &psxInt;
        } else psxCpu = &psxRec;
 #else
+       Config.Cpu = CPU_INTERPRETER;
        psxCpu = &psxInt;
 #endif
 
@@ -54,16 +59,24 @@ void psxReset() {
 
        psxRegs.pc = 0xbfc00000; // Start in bootstrap
 
-       psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
-       psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
+       psxRegs.CP0.n.SR   = 0x10600000; // COP0 enabled | BEV = 1 | TS = 1
+       psxRegs.CP0.n.PRid = 0x00000002; // PRevID = Revision ID, same as R3000A
+       if (Config.HLE)
+               psxRegs.CP0.n.SR |= 1u << 30; // COP2 enabled
 
+       psxCpu->ApplyConfig();
        psxCpu->Reset();
 
        psxHwReset();
        psxBiosInit();
 
-       if (!Config.HLE)
+       BiosLikeGPUSetup(); // a bit of a hack but whatever
+
+       if (!Config.HLE) {
                psxExecuteBios();
+               if (psxRegs.pc == 0x80030000 && !Config.SlowBoot)
+                       BiosBootBypass();
+       }
 
 #ifdef EMU_LOG
        EMU_LOG("*BIOS END*\n");
@@ -72,46 +85,40 @@ void psxReset() {
 }
 
 void psxShutdown() {
-       psxMemShutdown();
        psxBiosShutdown();
 
        psxCpu->Shutdown();
+
+       psxMemShutdown();
 }
 
-void psxException(u32 code, u32 bd) {
-       if (!Config.HLE && (((PSXMu32(psxRegs.pc) >> 24) & 0xfe) == 0x4a)) {
+// cp0 is passed separately for lightrec to be less messy
+void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) {
+       u32 opcode = intFakeFetch(psxRegs.pc);
+       
+       if (unlikely(!Config.HLE && (opcode >> 25) == 0x25)) {
                // "hokuto no ken" / "Crash Bandicot 2" ...
                // BIOS does not allow to return to GTE instructions
                // (just skips it, supposedly because it's scheduled already)
-               // so we step over it with the interpreter
-               extern void execI();
-               execI();
+               // so we execute it here
+               psxCP2Regs *cp2 = (psxCP2Regs *)(cp0 + 1);
+               psxRegs.code = opcode;
+               psxCP2[opcode & 0x3f](cp2);
        }
 
        // Set the Cause
-       psxRegs.CP0.n.Cause = code;
+       cp0->n.Cause = (bdt << 30) | (cp0->n.Cause & 0x300) | cause;
 
        // Set the EPC & PC
-       if (bd) {
-#ifdef PSXCPU_LOG
-               PSXCPU_LOG("bd set!!!\n");
-#endif
-               SysPrintf("bd set!!!\n");
-               psxRegs.CP0.n.Cause |= 0x80000000;
-               psxRegs.CP0.n.EPC = (psxRegs.pc - 4);
-       } else
-               psxRegs.CP0.n.EPC = (psxRegs.pc);
+       cp0->n.EPC = bdt ? psxRegs.pc - 4 : psxRegs.pc;
 
-       if (psxRegs.CP0.n.Status & 0x400000)
+       if (cp0->n.SR & 0x400000)
                psxRegs.pc = 0xbfc00180;
        else
                psxRegs.pc = 0x80000080;
 
-       // Set the Status
-       psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status &~0x3f) |
-                                                 ((psxRegs.CP0.n.Status & 0xf) << 2);
-
-       if (Config.HLE) psxBiosException();
+       // Set the SR
+       cp0->n.SR = (cp0->n.SR & ~0x3f) | ((cp0->n.SR & 0x0f) << 2);
 }
 
 void psxBranchTest() {
@@ -119,7 +126,7 @@ void psxBranchTest() {
                psxRcntUpdate();
 
        if (psxRegs.interrupt) {
-               if ((psxRegs.interrupt & (1 << PSXINT_SIO)) && !Config.Sio) { // sio
+               if ((psxRegs.interrupt & (1 << PSXINT_SIO))) { // sio
                        if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) {
                                psxRegs.interrupt &= ~(1 << PSXINT_SIO);
                                sioInterrupt();
@@ -134,7 +141,7 @@ void psxBranchTest() {
                if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read
                        if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) {
                                psxRegs.interrupt &= ~(1 << PSXINT_CDREAD);
-                               cdrReadInterrupt();
+                               cdrPlayReadInterrupt();
                        }
                }
                if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma
@@ -173,27 +180,27 @@ void psxBranchTest() {
                                cdrDmaInterrupt();
                        }
                }
-               if (psxRegs.interrupt & (1 << PSXINT_CDRPLAY)) { // cdr play timing
-                       if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRPLAY].sCycle) >= psxRegs.intCycle[PSXINT_CDRPLAY].cycle) {
-                               psxRegs.interrupt &= ~(1 << PSXINT_CDRPLAY);
-                               cdrPlayInterrupt();
-                       }
-               }
                if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states
                        if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) {
                                psxRegs.interrupt &= ~(1 << PSXINT_CDRLID);
                                cdrLidSeekInterrupt();
                        }
                }
+               if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update
+                       if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) {
+                               psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE);
+                               spuUpdate();
+                       }
+               }
        }
 
        if (psxHu32(0x1070) & psxHu32(0x1074)) {
-               if ((psxRegs.CP0.n.Status & 0x401) == 0x401) {
+               if ((psxRegs.CP0.n.SR & 0x401) == 0x401) {
 #ifdef PSXCPU_LOG
                        PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074));
 #endif
 //                     SysPrintf("Interrupt (%x): %x %x\n", psxRegs.cycle, psxHu32(0x1070), psxHu32(0x1074));
-                       psxException(0x400, 0);
+                       psxException(0x400, 0, &psxRegs.CP0);
                }
        }
 }
@@ -230,7 +237,13 @@ void psxJumpTest() {
 }
 
 void psxExecuteBios() {
-       while (psxRegs.pc != 0x80030000)
-               psxCpu->ExecuteBlock();
+       int i;
+       for (i = 0; i < 5000000; i++) {
+               psxCpu->ExecuteBlock(EXEC_CALLER_BOOT);
+               if ((psxRegs.pc & 0xff800000) == 0x80000000)
+                       break;
+       }
+       if (psxRegs.pc != 0x80030000)
+               SysPrintf("non-standard BIOS detected (%d, %08x)\n", i, psxRegs.pc);
 }