fix build on some archs

[pcsx_rearmed.git] / libpcsxcore / r3000a.h

diff --git a/libpcsxcore/r3000a.h b/libpcsxcore/r3000a.h
index aced381..32538e5 100644 (file)
--- a/libpcsxcore/r3000a.h
+++ b/libpcsxcore/r3000a.h
@@ -40,10 +40,8 @@ typedef struct {
 
 extern R3000Acpu *psxCpu;
 extern R3000Acpu psxInt;
-#if (defined(__x86_64__) || defined(__i386__) || defined(__sh__) || defined(__ppc__) || defined(__arm__)) && !defined(NOPSXREC)
 extern R3000Acpu psxRec;
 #define PSXREC
-#endif
 
 typedef union {
 #if defined(__BIGENDIAN__)
@@ -157,17 +155,28 @@ enum {
        PSXINT_GPUOTCDMA,
        PSXINT_CDRDMA,
        PSXINT_NEWDRC_CHECK,
-       DUMMY2,
+       PSXINT_RCNT,
        PSXINT_CDRLID,
        PSXINT_CDRPLAY,
+       PSXINT_SPU_UPDATE,
        PSXINT_COUNT
 };
 
+typedef struct psxCP2Regs {
+       psxCP2Data CP2D;        /* Cop2 data registers */
+       psxCP2Ctrl CP2C;        /* Cop2 control registers */
+} psxCP2Regs;
+
 typedef struct {
        psxGPRRegs GPR;         /* General Purpose Registers */
        psxCP0Regs CP0;         /* Coprocessor0 Registers */
-       psxCP2Data CP2D;        /* Cop2 data registers */
-       psxCP2Ctrl CP2C;        /* Cop2 control registers */
+       union {
+               struct {
+                       psxCP2Data CP2D;        /* Cop2 data registers */
+                       psxCP2Ctrl CP2C;        /* Cop2 control registers */
+               };
+               psxCP2Regs CP2;
+       };
     u32 pc;                            /* Program counter */
     u32 code;                  /* The instruction */
        u32 cycle;
@@ -181,8 +190,9 @@ extern psxRegisters psxRegs;
 extern u32 event_cycles[PSXINT_COUNT];
 extern u32 next_interupt;
 
-void new_dyna_save(void);
-void new_dyna_restore(void);
+void new_dyna_before_save(void);
+void new_dyna_after_save(void);
+void new_dyna_freeze(void *f, int mode);
 
 #define new_dyna_set_event(e, c) { \
        s32 c_ = c; \