spu: add asm mixing code for ARMv5 too

[pcsx_rearmed.git] / plugins / dfsound / arm_utils.s

diff --git a/plugins/dfsound/arm_utils.s b/plugins/dfsound/arm_utils.s
index 6d3c974..70ff24d 100644 (file)
--- a/plugins/dfsound/arm_utils.s
+++ b/plugins/dfsound/arm_utils.s
@@ -12,6 +12,8 @@
 .text
 .align 2
 
 .text
 .align 2
 

+@ XXX: should be HAVE_NEON
+.if HAVE_ARMV7

 
 .global mix_chan @ (int start, int count, int lv, int rv)
 mix_chan:
 
 .global mix_chan @ (int start, int count, int lv, int rv)
 mix_chan:


@@ -95,4 +97,65 @@ mcr_finish:
     vstmiage    r3!, {d8}
     bx          lr
 
     vstmiage    r3!, {d8}
     bx          lr
 

+.else
+
+.global mix_chan @ (int start, int count, int lv, int rv)
+mix_chan:
+    stmfd       sp!, {r4-r8,lr}
+    orr         r3, r2, r3, lsl #16
+    lsl         r3, #1                 @ packed multipliers << 1
+    mov         r12, r0
+    ldr         r0, =ChanBuf
+    ldr         r2, =SSumLR
+    add         r0, r12, lsl #2
+    add         r2, r12, lsl #3
+0:
+    ldmia       r0!, {r4,r5}
+    ldmia       r2, {r6-r8,lr}
+    lsl         r4, #1                 @ adjust for mul
+    lsl         r5, #1
+    smlawb      r6, r4, r3, r6
+    smlawt      r7, r4, r3, r7
+    smlawb      r8, r5, r3, r8
+    smlawt      lr, r5, r3, lr
+    subs        r1, #2
+    blt         mc_finish
+    stmia       r2!, {r6-r8,lr}
+    bgt         0b
+    ldmeqfd     sp!, {r4-r8,pc}
+
+mc_finish:
+    stmia       r2!, {r6,r7}
+    ldmfd       sp!, {r4-r8,pc}
+
+
+.global mix_chan_rvb @ (int start, int count, int lv, int rv)
+mix_chan_rvb:
+    stmfd       sp!, {r4-r8,lr}
+    orr         lr, r2, r3, lsl #16
+    lsl         lr, #1
+    ldr         r3, =sRVBStart
+    ldr         r2, =SSumLR
+    ldr         r4, =ChanBuf
+    ldr         r3, [r3]
+    add         r2, r2, r0, lsl #3
+    add         r3, r3, r0, lsl #3
+    add         r0, r4, r0, lsl #2
+0:
+    ldr         r4, [r0], #4
+    ldmia       r2, {r6,r7}
+    ldmia       r3, {r8,r12}
+    lsl         r4, #1
+    smlawb      r6, r4, lr, r6         @ supposedly takes single cycle?
+    smlawt      r7, r4, lr, r7
+    smlawb      r8, r4, lr, r8
+    smlawt      r12,r4, lr, r12
+    subs        r1, #1
+    stmia       r2!, {r6,r7}
+    stmia       r3!, {r8,r12}
+    bgt         0b
+    ldmfd       sp!, {r4-r8,pc}
+
+.endif
+

 @ vim:filetype=armasm
 @ vim:filetype=armasm