cdrom: change pause timing again

[pcsx_rearmed.git] / plugins / dfsound / dma.c

diff --git a/plugins/dfsound/dma.c b/plugins/dfsound/dma.c
index d3706b9..fde1f83 100644 (file)
--- a/plugins/dfsound/dma.c
+++ b/plugins/dfsound/dma.c
@@ -20,18 +20,15 @@
 #define _IN_DMA\r
 \r
 #include "externals.h"\r
+#include "registers.h"\r
 \r
-////////////////////////////////////////////////////////////////////////\r
-// READ DMA (one value)\r
-////////////////////////////////////////////////////////////////////////\r
-\r
-unsigned short CALLBACK SPUreadDMA(void)\r
+static void set_dma_end(int iSize, unsigned int cycles)\r
 {\r
- unsigned short s=spu.spuMem[spu.spuAddr>>1];\r
- spu.spuAddr+=2;\r
- if(spu.spuAddr>0x7ffff) spu.spuAddr=0;\r
-\r
- return s;\r
+ // this must be > psxdma.c dma irq\r
+ // Road Rash also wants a considerable delay, maybe because of fifo?\r
+ cycles += iSize * 20;  // maybe\r
+ cycles |= 1;           // indicates dma is active\r
+ spu.cycles_dma_end = cycles;\r
 }\r
 \r
 ////////////////////////////////////////////////////////////////////////\r
@@ -41,36 +38,24 @@ unsigned short CALLBACK SPUreadDMA(void)
 void CALLBACK SPUreadDMAMem(unsigned short *pusPSXMem, int iSize,\r
  unsigned int cycles)\r
 {\r
- int i;\r
-\r
- do_samples_if_needed(cycles);\r
-\r
- for(i=0;i<iSize;i++)\r
-  {\r
-   *pusPSXMem++=spu.spuMem[spu.spuAddr>>1];            // spu addr got by writeregister\r
-   spu.spuAddr+=2;                                     // inc spu addr\r
-   if(spu.spuAddr>0x7ffff) spu.spuAddr=0;              // wrap\r
-  }\r
-}\r
-\r
-////////////////////////////////////////////////////////////////////////\r
-////////////////////////////////////////////////////////////////////////\r
-////////////////////////////////////////////////////////////////////////\r
-\r
-// to investigate: do sound data updates by writedma affect spu\r
-// irqs? Will an irq be triggered, if new data is written to\r
-// the memory irq address?\r
-\r
-////////////////////////////////////////////////////////////////////////\r
-// WRITE DMA (one value)\r
-////////////////////////////////////////////////////////////////////////\r
-  \r
-void CALLBACK SPUwriteDMA(unsigned short val)\r
-{\r
- spu.spuMem[spu.spuAddr>>1] = val;                     // spu addr got by writeregister\r
-\r
- spu.spuAddr+=2;                                       // inc spu addr\r
- if(spu.spuAddr>0x7ffff) spu.spuAddr=0;                // wrap\r
+ unsigned int addr = spu.spuAddr, irq_addr = regAreaGet(H_SPUirqAddr) << 3;\r
+ int i, irq_after;\r
+\r
+ do_samples_if_needed(cycles, 1, 2);\r
+ irq_after = (irq_addr - addr) & 0x7ffff;\r
+\r
+ for(i = 0; i < iSize; i++)\r
+ {\r
+  *pusPSXMem++ = *(unsigned short *)(spu.spuMemC + addr);\r
+  addr += 2;\r
+  addr &= 0x7fffe;\r
+ }\r
+ if ((spu.spuCtrl & CTRL_IRQ) && irq_after < iSize * 2) {\r
+  log_unhandled("rdma spu irq: %x/%x-%x\n", irq_addr, spu.spuAddr, addr);\r
+  do_irq_io(irq_after);\r
+ }\r
+ spu.spuAddr = addr;\r
+ set_dma_end(iSize, cycles);\r
 }\r
 \r
 ////////////////////////////////////////////////////////////////////////\r
@@ -80,23 +65,54 @@ void CALLBACK SPUwriteDMA(unsigned short val)
 void CALLBACK SPUwriteDMAMem(unsigned short *pusPSXMem, int iSize,\r
  unsigned int cycles)\r
 {\r
- int i;\r
+ unsigned int addr = spu.spuAddr, irq_addr = regAreaGet(H_SPUirqAddr) << 3;\r
+ int i, irq_after;\r
  \r
- do_samples_if_needed(cycles);\r
-\r
- if(spu.spuAddr + iSize*2 < 0x80000)\r
+ do_samples_if_needed(cycles + iSize*2 * 4, 1, 2);\r
+ irq_after = (irq_addr - addr) & 0x7ffff;\r
+ spu.bMemDirty = 1;\r
+\r
+ if (addr + iSize*2 < 0x80000)\r
+ {\r
+  memcpy(spu.spuMemC + addr, pusPSXMem, iSize*2);\r
+  addr += iSize*2;\r
+ }\r
+ else\r
+ {\r
+  for (i = 0; i < iSize; i++)\r
   {\r
-   memcpy(&spu.spuMem[spu.spuAddr>>1], pusPSXMem, iSize*2);\r
-   spu.spuAddr += iSize*2;\r
-   return;\r
+   *(unsigned short *)(spu.spuMemC + addr) = *pusPSXMem++;\r
+   addr += 2;\r
+   addr &= 0x7fffe;\r
   }\r
-\r
- for(i=0;i<iSize;i++)\r
-  {\r
-   spu.spuMem[spu.spuAddr>>1] = *pusPSXMem++;          // spu addr got by writeregister\r
-   spu.spuAddr+=2;                                     // inc spu addr\r
-   spu.spuAddr&=0x7ffff;                               // wrap\r
+ }\r
+ if ((spu.spuCtrl & CTRL_IRQ) && irq_after < iSize * 2) {\r
+  log_unhandled("%u wdma spu irq: %x/%x-%x (%u)\n",\r
+    cycles, irq_addr, spu.spuAddr, addr, irq_after);\r
+  // this should be consistent with psxdma.c timing\r
+  // might also need more delay like in set_dma_end()\r
+  do_irq_io(irq_after * 4);\r
+ }\r
+ for (i = 0; i < 24; i++) {\r
+  size_t ediff, p = spu.s_chan[i].pCurr - spu.spuMemC;\r
+  if (spu.s_chan[i].ADSRX.State == ADSR_RELEASE && !spu.s_chan[i].ADSRX.EnvelopeVol)\r
+   continue;\r
+  ediff = addr - p;\r
+  if (spu.spuAddr < p && p < spu.spuAddr + iSize * 2) {\r
+   log_unhandled("%u spu ch%02d play %zx dma %x-%x (%zd)\n",\r
+     cycles, i, p, spu.spuAddr, addr, ediff);\r
+   //exit(1);\r
+  }\r
+  // a hack for the super annoying timing issues in The Emperor's New Groove\r
+  // (which is a game bug, but tends to trigger more here)\r
+  if (ediff <= 0x20u) {\r
+   spu.s_chan[i].pCurr += ediff;\r
+   break;\r
   }\r
+ }\r
+ spu.spuAddr = addr;\r
+ set_dma_end(iSize, cycles);\r
 }\r
 \r
 ////////////////////////////////////////////////////////////////////////\r
+// vim:shiftwidth=1:expandtab\r