//------------------------------------------------//\r
case 14: // loop?\r
spu.s_chan[ch].pLoop=spu.spuMemC+((val&~1)<<3);\r
+ spu.s_chan[ch].bIgnoreLoop = 1;\r
goto upd_irq;\r
//------------------------------------------------//\r
}\r
break;\r
//-------------------------------------------------//\r
case H_CDLeft:\r
- spu.iLeftXAVol=val & 0x7fff;\r
- if(spu.cddavCallback) spu.cddavCallback(0,val);\r
+ spu.iLeftXAVol=(int16_t)val;\r
+ if(spu.cddavCallback) spu.cddavCallback(0,(int16_t)val);\r
break;\r
case H_CDRight:\r
- spu.iRightXAVol=val & 0x7fff;\r
- if(spu.cddavCallback) spu.cddavCallback(1,val);\r
+ spu.iRightXAVol=(int16_t)val;\r
+ if(spu.cddavCallback) spu.cddavCallback(1,(int16_t)val);\r
break;\r
//-------------------------------------------------//\r
case H_FMod1:\r
return spu.spuCtrl;\r
\r
case H_SPUstat:\r
- return spu.spuStat;\r
+ return (spu.spuStat & ~0x3F) | (spu.spuCtrl & 0x3F);\r
\r
case H_SPUaddr:\r
return (unsigned short)(spu.spuAddr>>3);\r
{\r
if((val&1) && regAreaGet(ch,6)) // mmm... start has to be set before key on !?!\r
{\r
- spu.s_chan[ch].pCurr=spu.spuMemC+((regAreaGet(ch,6)&~1)<<3); // must be block aligned\r
- spu.s_chan[ch].pLoop=spu.spuMemC+((regAreaGet(ch,14)&~1)<<3);\r
+ spu.s_chan[ch].bIgnoreLoop = 0;\r
spu.dwNewChannel|=(1<<ch);\r
}\r
}\r
if(val>0x3fff) NP=0x3fff; // get pitch val\r
else NP=val;\r
\r
- spu.s_chan[ch].iRawPitch=NP;\r
- spu.s_chan[ch].sinc=(NP<<4)|8;\r
- spu.s_chan[ch].sinc_inv=0;\r
- if (spu_config.iUseInterpolation == 1)\r
- spu.SB[ch * SB_SIZE + 32] = 1; // -> freq change in simple interpolation mode: set flag\r
+ spu.s_chan[ch].iRawPitch = NP;\r
+ spu.s_chan[ch].sinc = NP << 4;\r
+ spu.s_chan[ch].sinc_inv = 0;\r
+ spu.SB[ch * SB_SIZE + 32] = 1; // -> freq change in simple interpolation mode: set flag\r
}\r
\r
////////////////////////////////////////////////////////////////////////\r