gpu_neon: integrate Exophase's rasterizer

[pcsx_rearmed.git] / plugins / gpu_neon / gpu.c

diff --git a/plugins/gpu_neon/gpu.c b/plugins/gpu_neon/gpu.c
index 5bd4151..24f731e 100644 (file)
--- a/plugins/gpu_neon/gpu.c
+++ b/plugins/gpu_neon/gpu.c
@@ -17,14 +17,14 @@
 #define noinline __attribute__((noinline))
 
 #define gpu_log(fmt, ...) \
-  printf("%d:%03d: " fmt, gpu.state.frame_count, *gpu.state.hcnt, ##__VA_ARGS__)
+  printf("%d:%03d: " fmt, *gpu.state.frame_count, *gpu.state.hcnt, ##__VA_ARGS__)
 
 //#define log_io gpu_log
 #define log_io(...)
 //#define log_anomaly gpu_log
 #define log_anomaly(...)
 
-struct psx_gpu gpu __attribute__((aligned(64)));
+struct psx_gpu gpu __attribute__((aligned(2048)));
 
 static noinline void do_reset(void)
 {
@@ -59,14 +59,32 @@ static noinline void update_height(void)
 
 static noinline void decide_frameskip(void)
 {
-  gpu.frameskip.frame_ready = !gpu.frameskip.active;
+  if (gpu.frameskip.active)
+    gpu.frameskip.cnt++;
+  else {
+    gpu.frameskip.cnt = 0;
+    gpu.frameskip.frame_ready = 1;
+  }
 
   if (!gpu.frameskip.active && *gpu.frameskip.advice)
     gpu.frameskip.active = 1;
+  else if (gpu.frameskip.set > 0 && gpu.frameskip.cnt < gpu.frameskip.set)
+    gpu.frameskip.active = 1;
   else
     gpu.frameskip.active = 0;
 }
 
+static noinline void decide_frameskip_allow(uint32_t cmd_e3)
+{
+  // no frameskip if it decides to draw to display area,
+  // but not for interlace since it'll most likely always do that
+  uint32_t x = cmd_e3 & 0x3ff;
+  uint32_t y = (cmd_e3 >> 10) & 0x3ff;
+  gpu.frameskip.allow = gpu.status.interlace ||
+    (uint32_t)(x - gpu.screen.x) >= (uint32_t)gpu.screen.w ||
+    (uint32_t)(y - gpu.screen.y) >= (uint32_t)gpu.screen.h;
+}
+
 static noinline void get_gpu_info(uint32_t data)
 {
   switch (data & 0x0f) {
@@ -94,8 +112,7 @@ long GPUinit(void)
   ret  = vout_init();
   ret |= renderer_init();
 
-  gpu.lcf_hc = &gpu.zero;
-  gpu.state.frame_count = 0;
+  gpu.state.frame_count = &gpu.zero;
   gpu.state.hcnt = &gpu.zero;
   do_reset();
   return ret;
@@ -113,7 +130,7 @@ void GPUwriteStatus(uint32_t data)
   uint32_t cmd = data >> 24;
 
   if (cmd < ARRAY_SIZE(gpu.regs)) {
-    if (cmd != 0 && gpu.regs[cmd] == data)
+    if (cmd != 0 && cmd != 5 && gpu.regs[cmd] == data)
       return;
     gpu.regs[cmd] = data;
   }
@@ -133,8 +150,13 @@ void GPUwriteStatus(uint32_t data)
     case 0x05:
       gpu.screen.x = data & 0x3ff;
       gpu.screen.y = (data >> 10) & 0x3ff;
-      if (gpu.frameskip.enabled)
-        decide_frameskip();
+      if (gpu.frameskip.set) {
+        decide_frameskip_allow(gpu.ex_regs[3]);
+        if (gpu.frameskip.last_flip_frame != *gpu.state.frame_count) {
+          decide_frameskip();
+          gpu.frameskip.last_flip_frame = *gpu.state.frame_count;
+        }
+      }
       break;
     case 0x06:
       gpu.screen.x1 = data & 0xfff;
@@ -284,25 +306,17 @@ static int check_cmd(uint32_t *data, int count)
       //printf("  %3d: %02x %d\n", pos, cmd, len);
       if ((cmd & 0xf4) == 0x24) {
         // flat textured prim
-        gpu.status.reg &= ~0x1ff;
-        gpu.status.reg |= list[4] & 0x1ff;
+        gpu.ex_regs[1] &= ~0x1ff;
+        gpu.ex_regs[1] |= list[4] & 0x1ff;
       }
       else if ((cmd & 0xf4) == 0x34) {
         // shaded textured prim
-        gpu.status.reg &= ~0x1ff;
-        gpu.status.reg |= list[5] & 0x1ff;
-      }
-      else switch (cmd)
-      {
-        case 0xe1:
-          gpu.status.reg &= ~0x7ff;
-          gpu.status.reg |= list[0] & 0x7ff;
-          break;
-        case 0xe6:
-          gpu.status.reg &= ~0x1800;
-          gpu.status.reg |= (list[0] & 3) << 11;
-          break;
+        gpu.ex_regs[1] &= ~0x1ff;
+        gpu.ex_regs[1] |= list[5] & 0x1ff;
       }
+      else if (cmd == 0xe3)
+        decide_frameskip_allow(list[0]);
+
       if (2 <= cmd && cmd < 0xc0)
         vram_dirty = 1;
       else if ((cmd & 0xf8) == 0xe0)
@@ -318,7 +332,7 @@ static int check_cmd(uint32_t *data, int count)
     }
 
     if (pos - start > 0) {
-      if (!gpu.frameskip.active)
+      if (!gpu.frameskip.active || !gpu.frameskip.allow)
         do_cmd_list(data + start, pos - start);
       start = pos;
     }
@@ -328,11 +342,16 @@ static int check_cmd(uint32_t *data, int count)
       start_vram_transfer(data[pos + 1], data[pos + 2], cmd == 0xc0);
       pos += len;
     }
-
-    if (cmd == -1)
+    else if (cmd == -1)
       break;
   }
 
+  gpu.status.reg &= ~0x1fff;
+  gpu.status.reg |= gpu.ex_regs[1] & 0x7ff;
+  gpu.status.reg |= (gpu.ex_regs[6] & 3) << 11;
+
+  if (gpu.frameskip.active)
+    renderer_sync_ecmds(gpu.ex_regs);
   gpu.state.fb_dirty |= vram_dirty;
 
   return count - pos;
@@ -379,9 +398,9 @@ long GPUdmaChain(uint32_t *rambase, uint32_t start_addr)
     flush_cmd_buffer();
 
   // ff7 sends it's main list twice, detect this
-  if (gpu.state.frame_count == gpu.state.last_list.frame &&
-     *gpu.state.hcnt - gpu.state.last_list.hcnt <= 1 &&
-      gpu.state.last_list.words > 1024)
+  if (*gpu.state.frame_count == gpu.state.last_list.frame &&
+      *gpu.state.hcnt - gpu.state.last_list.hcnt <= 1 &&
+       gpu.state.last_list.words > 1024)
   {
     llist_entry = rambase + (gpu.state.last_list.addr & 0x1fffff) / 4;
     *llist_entry |= 0x800000;
@@ -423,7 +442,7 @@ long GPUdmaChain(uint32_t *rambase, uint32_t start_addr)
   if (llist_entry)
     *llist_entry &= ~0x800000;
 
-  gpu.state.last_list.frame = gpu.state.frame_count;
+  gpu.state.last_list.frame = *gpu.state.frame_count;
   gpu.state.last_list.hcnt = *gpu.state.hcnt;
   gpu.state.last_list.words = dma_words;
   gpu.state.last_list.addr = start_addr;
@@ -462,20 +481,20 @@ uint32_t GPUreadStatus(void)
   if (unlikely(gpu.cmd_len > 0))
     flush_cmd_buffer();
 
-  ret = gpu.status.reg | (*gpu.lcf_hc << 31);
+  ret = gpu.status.reg;
   log_io("gpu_read_status %08x\n", ret);
   return ret;
 }
 
-typedef struct GPUFREEZETAG
+struct GPUFreeze
 {
   uint32_t ulFreezeVersion;      // should be always 1 for now (set by main emu)
   uint32_t ulStatus;             // current gpu status
   uint32_t ulControl[256];       // latest control register values
   unsigned char psxVRam[1024*1024*2]; // current VRam image (full 2 MB for ZN)
-} GPUFreeze_t;
+};
 
-long GPUfreeze(uint32_t type, GPUFreeze_t *freeze)
+long GPUfreeze(uint32_t type, struct GPUFreeze *freeze)
 {
   int i;
 
@@ -498,28 +517,11 @@ long GPUfreeze(uint32_t type, GPUFreeze_t *freeze)
         gpu.regs[i] ^= 1; // avoid reg change detection
         GPUwriteStatus((i << 24) | (gpu.regs[i] ^ 1));
       }
+      renderer_sync_ecmds(gpu.ex_regs);
       break;
   }
 
   return 1;
 }
 
-void GPUvBlank(int val, uint32_t *hcnt)
-{
-  gpu.lcf_hc = &gpu.zero;
-  if (gpu.status.interlace) {
-    if (val)
-      gpu.status.lcf ^= 1;
-  }
-  else {
-    gpu.status.lcf = 0;
-    if (!val)
-      gpu.lcf_hc = hcnt;
-  }
-  if (!val)
-    gpu.state.frame_count++;
-
-  gpu.state.hcnt = hcnt;
-}
-
 // vim:shiftwidth=2:expandtab