gpu_neon: keep texture bits in sync

[pcsx_rearmed.git] / plugins / gpu_neon / gpu.c

diff --git a/plugins/gpu_neon/gpu.c b/plugins/gpu_neon/gpu.c
index 12417e6..a5d0b87 100644 (file)
--- a/plugins/gpu_neon/gpu.c
+++ b/plugins/gpu_neon/gpu.c
@@ -17,7 +17,7 @@
 #define noinline __attribute__((noinline))
 
 #define gpu_log(fmt, ...) \
 #define noinline __attribute__((noinline))
 
 #define gpu_log(fmt, ...) \

-  printf("%d:%03d: " fmt, gpu.state.frame_count, *gpu.state.hcnt, ##__VA_ARGS__)
+  printf("%d:%03d: " fmt, *gpu.state.frame_count, *gpu.state.hcnt, ##__VA_ARGS__)

 
 //#define log_io gpu_log
 #define log_io(...)
 
 //#define log_io gpu_log
 #define log_io(...)


@@ -94,7 +94,7 @@ long GPUinit(void)
   ret  = vout_init();
   ret |= renderer_init();
 
   ret  = vout_init();
   ret |= renderer_init();
 

-  gpu.state.frame_count = 0;
+  gpu.state.frame_count = &gpu.zero;

   gpu.state.hcnt = &gpu.zero;
   do_reset();
   return ret;
   gpu.state.hcnt = &gpu.zero;
   do_reset();
   return ret;


@@ -283,24 +283,13 @@ static int check_cmd(uint32_t *data, int count)
       //printf("  %3d: %02x %d\n", pos, cmd, len);
       if ((cmd & 0xf4) == 0x24) {
         // flat textured prim
       //printf("  %3d: %02x %d\n", pos, cmd, len);
       if ((cmd & 0xf4) == 0x24) {
         // flat textured prim

-        gpu.status.reg &= ~0x1ff;
-        gpu.status.reg |= list[4] & 0x1ff;
+        gpu.ex_regs[1] &= ~0x1ff;
+        gpu.ex_regs[1] |= list[4] & 0x1ff;

       }
       else if ((cmd & 0xf4) == 0x34) {
         // shaded textured prim
       }
       else if ((cmd & 0xf4) == 0x34) {
         // shaded textured prim

-        gpu.status.reg &= ~0x1ff;
-        gpu.status.reg |= list[5] & 0x1ff;
-      }
-      else switch (cmd)
-      {
-        case 0xe1:
-          gpu.status.reg &= ~0x7ff;
-          gpu.status.reg |= list[0] & 0x7ff;
-          break;
-        case 0xe6:
-          gpu.status.reg &= ~0x1800;
-          gpu.status.reg |= (list[0] & 3) << 11;
-          break;
+        gpu.ex_regs[1] &= ~0x1ff;
+        gpu.ex_regs[1] |= list[5] & 0x1ff;

       }
       if (2 <= cmd && cmd < 0xc0)
         vram_dirty = 1;
       }
       if (2 <= cmd && cmd < 0xc0)
         vram_dirty = 1;


@@ -331,6 +320,10 @@ static int check_cmd(uint32_t *data, int count)
       break;
   }
 
       break;
   }
 

+  gpu.status.reg &= ~0x1fff;
+  gpu.status.reg |= gpu.ex_regs[1] & 0x7ff;
+  gpu.status.reg |= (gpu.ex_regs[6] & 3) << 11;
+

   if (gpu.frameskip.active)
     renderer_sync_ecmds(gpu.ex_regs);
   gpu.state.fb_dirty |= vram_dirty;
   if (gpu.frameskip.active)
     renderer_sync_ecmds(gpu.ex_regs);
   gpu.state.fb_dirty |= vram_dirty;


@@ -379,9 +372,9 @@ long GPUdmaChain(uint32_t *rambase, uint32_t start_addr)
     flush_cmd_buffer();
 
   // ff7 sends it's main list twice, detect this
     flush_cmd_buffer();
 
   // ff7 sends it's main list twice, detect this

-  if (gpu.state.frame_count == gpu.state.last_list.frame &&
-     *gpu.state.hcnt - gpu.state.last_list.hcnt <= 1 &&
-      gpu.state.last_list.words > 1024)
+  if (*gpu.state.frame_count == gpu.state.last_list.frame &&
+      *gpu.state.hcnt - gpu.state.last_list.hcnt <= 1 &&
+       gpu.state.last_list.words > 1024)

   {
     llist_entry = rambase + (gpu.state.last_list.addr & 0x1fffff) / 4;
     *llist_entry |= 0x800000;
   {
     llist_entry = rambase + (gpu.state.last_list.addr & 0x1fffff) / 4;
     *llist_entry |= 0x800000;


@@ -423,7 +416,7 @@ long GPUdmaChain(uint32_t *rambase, uint32_t start_addr)
   if (llist_entry)
     *llist_entry &= ~0x800000;
 
   if (llist_entry)
     *llist_entry &= ~0x800000;
 

-  gpu.state.last_list.frame = gpu.state.frame_count;
+  gpu.state.last_list.frame = *gpu.state.frame_count;

   gpu.state.last_list.hcnt = *gpu.state.hcnt;
   gpu.state.last_list.words = dma_words;
   gpu.state.last_list.addr = start_addr;
   gpu.state.last_list.hcnt = *gpu.state.hcnt;
   gpu.state.last_list.words = dma_words;
   gpu.state.last_list.addr = start_addr;