vec_4x32u uvrg_base;
vec_4x32u b_base;
- vec_4x32u const_0x8000;
+ vec_4x32u uvrgb_phase;
vec_4x16s d0_a_d3_c, d0_b, d0_c;
vec_4x16s d1_a, d1_b, d1_c_d2_a;
setup_gradient_calculation_input(1, b);
setup_gradient_calculation_input(2, c);
- dup_4x32b(const_0x8000, 0x8000);
+ dup_4x32b(uvrgb_phase, psx_gpu->uvrgb_phase);
shl_long_4x16b(uvrg_base, x0_a_y0_c, 16);
shl_long_4x16b(b_base, x0_b, 16);
- add_4x32b(uvrg_base, uvrg_base, const_0x8000);
- add_4x32b(b_base, b_base, const_0x8000);
+ add_4x32b(uvrg_base, uvrg_base, uvrgb_phase);
+ add_4x32b(b_base, b_base, uvrgb_phase);
// Can probably pair these, but it'll require careful register allocation
sub_4x16b(d0_a_d3_c, x1_a_y1_c, x0_a_y0_c);
}
}
}
- if(psx_gpu->render_mode & RENDER_DOUBLE_MODE)
- {
- u32 i;
- for(i = 0; i < psx_gpu->num_spans; i++)
- {
- psx_gpu->span_edge_data[i].y *= 2;
- }
- }
u32 render_state = flags &
(RENDER_FLAGS_MODULATE_TEXELS | RENDER_FLAGS_BLEND |
if((width == 0) || (height == 0))
return;
+ if(width > 1024)
+ width = 1024;
+
u32 r = color & 0xFF;
u32 g = (color >> 8) & 0xFF;
u32 b = (color >> 16) & 0xFF;
psx_gpu->mask_msb;
u32 color_32bpp = color_16bpp | (color_16bpp << 16);
- u32 *vram_ptr = (u32 *)(psx_gpu->vram_out_ptr + x + (y * 2048));
+ u32 *vram_ptr = (u32 *)(psx_gpu->vram_out_ptr + x + (y * 1024));
- u32 pitch = 2048 / 2 - (width / 2);
+ u32 pitch = 1024 / 2 - (width / 2);
u32 num_width;
while(height)
psx_gpu->render_state = 0;
psx_gpu->render_state_base = 0;
psx_gpu->num_blocks = 0;
+ psx_gpu->uvrgb_phase = 0x8000;
psx_gpu->vram_ptr = vram;
psx_gpu->vram_out_ptr = vram;
psx_gpu->dither_table[3] = dither_table_row(3, -1, 2, -2);
psx_gpu->primitive_type = PRIMITIVE_TYPE_UNKNOWN;
+
+ psx_gpu->enhancement_x_threshold = 256;
}
u64 get_us(void)