{
int ret;
+#if defined(__arm__) && defined(NEON_BUILD) && !defined(SIMD_BUILD)
+ // the asm doesn't bother to save callee-save vector regs, so do it here
+ __asm__ __volatile__("":::"q4","q5","q6","q7");
+#endif
+
if (gpu.state.enhancement_active)
ret = gpu_parse_enhanced(&egpu, list, count * 4, (u32 *)last_cmd);
else
ret = gpu_parse(&egpu, list, count * 4, (u32 *)last_cmd);
+#if defined(__arm__) && defined(NEON_BUILD) && !defined(SIMD_BUILD)
+ __asm__ __volatile__("":::"q4","q5","q6","q7");
+#endif
+
ex_regs[1] &= ~0x1ff;
ex_regs[1] |= egpu.texture_settings & 0x1ff;
return ret;
#define ENHANCEMENT_BUF_SIZE (1024 * 1024 * 2 * 4 + 4096 * 2)
-static uint16_t *get_enhancement_bufer(int *x, int *y, int *w, int *h,
+static void *get_enhancement_bufer(int *x, int *y, int *w, int *h,
int *vram_h)
{
uint16_t *ret = select_enhancement_buf_ptr(&egpu, *x);