add Pete's null SPU plugin

[pcsx_rearmed.git] / plugins / spunull / register.h

diff --git a/plugins/spunull/register.h b/plugins/spunull/register.h
new file mode 100644 (file)
index 0000000..52128b7
--- /dev/null
+++ b/plugins/spunull/register.h
@@ -0,0 +1,121 @@
+#define H_SPUirqAddr     0x0da4\r
+#define H_SPUaddr        0x0da6\r
+#define H_SPUdata        0x0da8\r
+#define H_SPUctrl        0x0daa\r
+#define H_SPUstat        0x0dae\r
+#define H_SPUon1         0x0d88\r
+#define H_SPUon2         0x0d8a\r
+#define H_SPUoff1        0x0d8c\r
+#define H_SPUoff2        0x0d8e\r
+#define H_FMod1          0x0d90\r
+#define H_FMod2          0x0d92\r
+#define H_Noise1         0x0d94\r
+#define H_Noise2         0x0d96\r
+#define H_RVBon1         0x0d98\r
+#define H_RVBon2         0x0d9a\r
+#define H_SPUIsOn1       0x0d9c\r
+#define H_SPUIsOn2       0x0d9e\r
+#define H_CDLeft         0x0db0\r
+#define H_CDRight        0x0db2\r
+#define H_Reverb         0x0dc0\r
+\r
+#define H_SPUPitch0      0x0c04\r
+#define H_SPUPitch1      0x0c14\r
+#define H_SPUPitch2      0x0c24\r
+#define H_SPUPitch3      0x0c34\r
+#define H_SPUPitch4      0x0c44\r
+#define H_SPUPitch5      0x0c54\r
+#define H_SPUPitch6      0x0c64\r
+#define H_SPUPitch7      0x0c74\r
+#define H_SPUPitch8      0x0c84\r
+#define H_SPUPitch9      0x0c94\r
+#define H_SPUPitch10     0x0ca4\r
+#define H_SPUPitch11     0x0cb4\r
+#define H_SPUPitch12     0x0cc4\r
+#define H_SPUPitch13     0x0cd4\r
+#define H_SPUPitch14     0x0ce4\r
+#define H_SPUPitch15     0x0cf4\r
+#define H_SPUPitch16     0x0d04\r
+#define H_SPUPitch17     0x0d14\r
+#define H_SPUPitch18     0x0d24\r
+#define H_SPUPitch19     0x0d34\r
+#define H_SPUPitch20     0x0d44\r
+#define H_SPUPitch21     0x0d54\r
+#define H_SPUPitch22     0x0d64\r
+#define H_SPUPitch23     0x0d74\r
+\r
+#define H_SPUStartAdr0   0x0c06\r
+#define H_SPUStartAdr1   0x0c16\r
+#define H_SPUStartAdr2   0x0c26\r
+#define H_SPUStartAdr3   0x0c36\r
+#define H_SPUStartAdr4   0x0c46\r
+#define H_SPUStartAdr5   0x0c56\r
+#define H_SPUStartAdr6   0x0c66\r
+#define H_SPUStartAdr7   0x0c76\r
+#define H_SPUStartAdr8   0x0c86\r
+#define H_SPUStartAdr9   0x0c96\r
+#define H_SPUStartAdr10  0x0ca6\r
+#define H_SPUStartAdr11  0x0cb6\r
+#define H_SPUStartAdr12  0x0cc6\r
+#define H_SPUStartAdr13  0x0cd6\r
+#define H_SPUStartAdr14  0x0ce6\r
+#define H_SPUStartAdr15  0x0cf6\r
+#define H_SPUStartAdr16  0x0d06\r
+#define H_SPUStartAdr17  0x0d16\r
+#define H_SPUStartAdr18  0x0d26\r
+#define H_SPUStartAdr19  0x0d36\r
+#define H_SPUStartAdr20  0x0d46\r
+#define H_SPUStartAdr21  0x0d56\r
+#define H_SPUStartAdr22  0x0d66\r
+#define H_SPUStartAdr23  0x0d76\r
+\r
+#define H_SPULoopAdr0   0x0c0e\r
+#define H_SPULoopAdr1   0x0c1e\r
+#define H_SPULoopAdr2   0x0c2e\r
+#define H_SPULoopAdr3   0x0c3e\r
+#define H_SPULoopAdr4   0x0c4e\r
+#define H_SPULoopAdr5   0x0c5e\r
+#define H_SPULoopAdr6   0x0c6e\r
+#define H_SPULoopAdr7   0x0c7e\r
+#define H_SPULoopAdr8   0x0c8e\r
+#define H_SPULoopAdr9   0x0c9e\r
+#define H_SPULoopAdr10  0x0cae\r
+#define H_SPULoopAdr11  0x0cbe\r
+#define H_SPULoopAdr12  0x0cce\r
+#define H_SPULoopAdr13  0x0cde\r
+#define H_SPULoopAdr14  0x0cee\r
+#define H_SPULoopAdr15  0x0cfe\r
+#define H_SPULoopAdr16  0x0d0e\r
+#define H_SPULoopAdr17  0x0d1e\r
+#define H_SPULoopAdr18  0x0d2e\r
+#define H_SPULoopAdr19  0x0d3e\r
+#define H_SPULoopAdr20  0x0d4e\r
+#define H_SPULoopAdr21  0x0d5e\r
+#define H_SPULoopAdr22  0x0d6e\r
+#define H_SPULoopAdr23  0x0d7e\r
+\r
+#define H_SPU_ADSRLevel0   0x0c08\r
+#define H_SPU_ADSRLevel1   0x0c18\r
+#define H_SPU_ADSRLevel2   0x0c28\r
+#define H_SPU_ADSRLevel3   0x0c38\r
+#define H_SPU_ADSRLevel4   0x0c48\r
+#define H_SPU_ADSRLevel5   0x0c58\r
+#define H_SPU_ADSRLevel6   0x0c68\r
+#define H_SPU_ADSRLevel7   0x0c78\r
+#define H_SPU_ADSRLevel8   0x0c88\r
+#define H_SPU_ADSRLevel9   0x0c98\r
+#define H_SPU_ADSRLevel10  0x0ca8\r
+#define H_SPU_ADSRLevel11  0x0cb8\r
+#define H_SPU_ADSRLevel12  0x0cc8\r
+#define H_SPU_ADSRLevel13  0x0cd8\r
+#define H_SPU_ADSRLevel14  0x0ce8\r
+#define H_SPU_ADSRLevel15  0x0cf8\r
+#define H_SPU_ADSRLevel16  0x0d08\r
+#define H_SPU_ADSRLevel17  0x0d18\r
+#define H_SPU_ADSRLevel18  0x0d28\r
+#define H_SPU_ADSRLevel19  0x0d38\r
+#define H_SPU_ADSRLevel20  0x0d48\r
+#define H_SPU_ADSRLevel21  0x0d58\r
+#define H_SPU_ADSRLevel22  0x0d68\r
+#define H_SPU_ADSRLevel23  0x0d78\r
+\r