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inline | side by side (from parent 1:
3a32113)
Thanks to CatalystG for some initial code and testing.
ARM_CORTEXA8 ?= 1
PLATFORM ?= pandora
USE_OSS ?= 1
ARM_CORTEXA8 ?= 1
PLATFORM ?= pandora
USE_OSS ?= 1
#USE_ALSA = 1
#DRC_DBG = 1
#PCNT = 1
#USE_ALSA = 1
#DRC_DBG = 1
#PCNT = 1
libpcsxcore/new_dynarec/emu_if.o: CFLAGS += -D_FILE_OFFSET_BITS=64
CFLAGS += -DDRC_DBG
endif
libpcsxcore/new_dynarec/emu_if.o: CFLAGS += -D_FILE_OFFSET_BITS=64
CFLAGS += -DDRC_DBG
endif
+ifeq "$(RAM_FIXED)" "1"
+CFLAGS += -DRAM_FIXED
+endif
# spu
OBJS += plugins/dfsound/dma.o plugins/dfsound/freeze.o \
# spu
OBJS += plugins/dfsound/dma.o plugins/dfsound/freeze.o \
char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
#endif
char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
#endif
+ if(ram_offset!=0) {
+ emit_addimm(addr,ram_offset,HOST_TEMPREG);
+ addr=*addr_reg_override=HOST_TEMPREG;
+ }
jaddr=emit_fastpath_cmp_jump(i,temp2,&fastload_reg_override);
}
else {
jaddr=emit_fastpath_cmp_jump(i,temp2,&fastload_reg_override);
}
else {
+ if(ram_offset&&memtarget) {
+ emit_addimm(temp2,ram_offset,HOST_TEMPREG);
+ fastload_reg_override=HOST_TEMPREG;
+ }
if (opcode[i]==0x22||opcode[i]==0x26) {
emit_movimm(((constmap[i][s]+offset)<<3)&24,temp); // LWL/LWR
}else{
if (opcode[i]==0x22||opcode[i]==0x26) {
emit_movimm(((constmap[i][s]+offset)<<3)&24,temp); // LWL/LWR
}else{
//#undef USE_MINI_HT
#endif
//#undef USE_MINI_HT
#endif
#ifndef __ANDROID__
#define BASE_ADDR_FIXED 1
#ifndef __ANDROID__
#define BASE_ADDR_FIXED 1
+#else
+#define BASE_ADDR_FIXED 0
+#endif
#define TARGET_SIZE_2 24 // 2^24 = 16 megabytes
// Code generator target address
#define TARGET_SIZE_2 24 // 2^24 = 16 megabytes
// Code generator target address
// "round" address helpful for debug
#define BASE_ADDR 0x1000000
#else
extern char translation_cache[1 << TARGET_SIZE_2];
#define BASE_ADDR translation_cache
#endif
// "round" address helpful for debug
#define BASE_ADDR 0x1000000
#else
extern char translation_cache[1 << TARGET_SIZE_2];
#define BASE_ADDR translation_cache
#endif
-
-// This is defined in linkage_arm.s, but gcc -O3 likes this better
-#define rdram ((unsigned int *)0x80000000)
/* misc */
extern void (*psxHLEt[])();
/* misc */
extern void (*psxHLEt[])();
+
+#ifdef RAM_FIXED
+#define rdram ((u_int)0x80000000)
+#else
+#define rdram ((u_int)psxM)
+#endif
/* .equiv HAVE_ARMV7, 1 */
/* .equiv HAVE_ARMV7, 1 */
- .global rdram
-rdram = 0x80000000
.global dynarec_local
.global reg
.global hi
.global dynarec_local
.global reg
.global hi
int new_dynarec_did_compile;
int new_dynarec_hacks;
u_int stop_after_jal;
int new_dynarec_did_compile;
int new_dynarec_hacks;
u_int stop_after_jal;
+#ifndef RAM_FIXED
+ static u_int ram_offset;
+#else
+ static const u_int ram_offset=0;
+#endif
extern u_char restore_candidate[512];
extern int cycle_count;
extern u_char restore_candidate[512];
extern int cycle_count;
jaddr=emit_fastpath_cmp_jump(i,addr,&fastload_reg_override);
}
}
jaddr=emit_fastpath_cmp_jump(i,addr,&fastload_reg_override);
}
}
+ else if(ram_offset&&memtarget) {
+ emit_addimm(addr,ram_offset,HOST_TEMPREG);
+ fastload_reg_override=HOST_TEMPREG;
+ }
}else{ // using tlb
int x=0;
if (opcode[i]==0x20||opcode[i]==0x24) x=3; // LB/LBU
}else{ // using tlb
int x=0;
if (opcode[i]==0x20||opcode[i]==0x24) x=3; // LB/LBU
gen_tlb_addr_r(a,map);
emit_movswl_indexed(x,a,tl);
}else{
gen_tlb_addr_r(a,map);
emit_movswl_indexed(x,a,tl);
}else{
emit_movswl_indexed(x,a,tl);
#else
emit_movswl_indexed((int)rdram-0x80000000+x,a,tl);
emit_movswl_indexed(x,a,tl);
#else
emit_movswl_indexed((int)rdram-0x80000000+x,a,tl);
gen_tlb_addr_r(a,map);
emit_movzwl_indexed(x,a,tl);
}else{
gen_tlb_addr_r(a,map);
emit_movzwl_indexed(x,a,tl);
}else{
emit_movzwl_indexed(x,a,tl);
#else
emit_movzwl_indexed((int)rdram-0x80000000+x,a,tl);
emit_movzwl_indexed(x,a,tl);
#else
emit_movzwl_indexed((int)rdram-0x80000000+x,a,tl);
jaddr=emit_fastpath_cmp_jump(i,addr,&faststore_reg_override);
#endif
}
jaddr=emit_fastpath_cmp_jump(i,addr,&faststore_reg_override);
#endif
}
+ else if(ram_offset&&memtarget) {
+ emit_addimm(addr,ram_offset,HOST_TEMPREG);
+ faststore_reg_override=HOST_TEMPREG;
+ }
}else{ // using tlb
int x=0;
if (opcode[i]==0x28) x=3; // SB
}else{ // using tlb
int x=0;
if (opcode[i]==0x28) x=3; // SB
gen_tlb_addr_w(a,map);
emit_writehword_indexed(tl,x,a);
}else
gen_tlb_addr_w(a,map);
emit_writehword_indexed(tl,x,a);
}else
- emit_writehword_indexed(tl,(int)rdram-0x80000000+x,a);
+ //emit_writehword_indexed(tl,(int)rdram-0x80000000+x,a);
+ emit_writehword_indexed(tl,x,a);
if(!c) {
jaddr2=emit_fastpath_cmp_jump(i,ar,&fastio_reg_override);
}
if(!c) {
jaddr2=emit_fastpath_cmp_jump(i,ar,&fastio_reg_override);
}
+ else if(ram_offset&&memtarget) {
+ emit_addimm(ar,ram_offset,HOST_TEMPREG);
+ fastio_reg_override=HOST_TEMPREG;
+ }
if (opcode[i]==0x32) { // LWC2
#ifdef HOST_IMM_ADDR32
if(c) emit_readword_tlb(constmap[i][s]+offset,-1,tl);
if (opcode[i]==0x32) { // LWC2
#ifdef HOST_IMM_ADDR32
if(c) emit_readword_tlb(constmap[i][s]+offset,-1,tl);
{
printf("Init new dynarec\n");
out=(u_char *)BASE_ADDR;
{
printf("Init new dynarec\n");
out=(u_char *)BASE_ADDR;
if (mmap (out, 1<<TARGET_SIZE_2,
PROT_READ | PROT_WRITE | PROT_EXEC,
MAP_FIXED | MAP_PRIVATE | MAP_ANONYMOUS,
if (mmap (out, 1<<TARGET_SIZE_2,
PROT_READ | PROT_WRITE | PROT_EXEC,
MAP_FIXED | MAP_PRIVATE | MAP_ANONYMOUS,
#endif
tlb_hacks();
arch_init();
#endif
tlb_hacks();
arch_init();
+#ifndef RAM_FIXED
+ ram_offset=(u_int)rdram-0x80000000;
+#endif
}
void new_dynarec_cleanup()
{
int n;
}
void new_dynarec_cleanup()
{
int n;
if (munmap ((void *)BASE_ADDR, 1<<TARGET_SIZE_2) < 0) {printf("munmap() failed\n");}
#endif
for(n=0;n<4096;n++) ll_clear(jump_in+n);
if (munmap ((void *)BASE_ADDR, 1<<TARGET_SIZE_2) < 0) {printf("munmap() failed\n");}
#endif
for(n=0;n<4096;n++) ll_clear(jump_in+n);
psxM = mmap((void *)0x80000000, 0x00210000,
PROT_WRITE | PROT_READ, MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED, -1, 0);
psxM = mmap((void *)0x80000000, 0x00210000,
PROT_WRITE | PROT_READ, MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED, -1, 0);
+#ifndef RAM_FIXED
+ if (psxM == MAP_FAILED)
+ psxM = mmap((void *)0x70000000, 0x00210000,
+ PROT_WRITE | PROT_READ, MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED, -1, 0);
+#endif
+ if (psxM == MAP_FAILED) {
+ SysMessage(_("mapping main RAM failed"));
+ return -1;
+ }
psxP = &psxM[0x200000];
psxH = mmap((void *)0x1f800000, 0x00010000,
psxP = &psxM[0x200000];
psxH = mmap((void *)0x1f800000, 0x00010000,
PROT_WRITE | PROT_READ, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
if (psxMemRLUT == NULL || psxMemWLUT == NULL ||
PROT_WRITE | PROT_READ, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
if (psxMemRLUT == NULL || psxMemWLUT == NULL ||
- psxM != (void *)0x80000000 || psxR == MAP_FAILED ||
psxP == NULL || psxH != (void *)0x1f800000) {
SysMessage(_("Error allocating memory!"));
return -1;
psxP == NULL || psxH != (void *)0x1f800000) {
SysMessage(_("Error allocating memory!"));
return -1;