1.10 release

[picodrive.git] / Pico / PicoInt.h

// Pico Library - Header File\r
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// (c) Copyright 2004 Dave, All rights reserved.\r
// (c) Copyright 2006 notaz, All rights reserved.\r
// Free for non-commercial use.\r
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// For commercial use, separate licencing terms must be obtained.\r
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#include <stdio.h>\r
#include <stdlib.h>\r
#include <string.h>\r
#include "Pico.h"\r
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// to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project\r
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#ifdef __cplusplus\r
extern "C" {\r
#endif\r
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// ----------------------- 68000 CPU -----------------------\r
#ifdef EMU_C68K\r
#include "../cpu/Cyclone/Cyclone.h"\r
extern struct Cyclone PicoCpu, PicoCpuS68k;\r
#define SekCyclesLeft PicoCpu.cycles // cycles left for this run\r
#define SekSetCyclesLeft(c) PicoCpu.cycles=c\r
#define SekPc (PicoCpu.pc-PicoCpu.membase)\r
#define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase)\r
#endif\r
\r
#ifdef EMU_A68K\r
void __cdecl M68000_RUN();\r
// The format of the data in a68k.asm (at the _M68000_regs location)\r
struct A68KContext\r
{\r
  unsigned int d[8],a[8];\r
  unsigned int isp,srh,ccr,xc,pc,irq,sr;\r
  int (*IrqCallback) (int nIrq);\r
  unsigned int ppc;\r
  void *pResetCallback;\r
  unsigned int sfc,dfc,usp,vbr;\r
  unsigned int AsmBank,CpuVersion;\r
};\r
struct A68KContext M68000_regs;\r
extern int m68k_ICount;\r
#define SekCyclesLeft m68k_ICount\r
#define SekSetCyclesLeft(c) m68k_ICount=c\r
#define SekPc M68000_regs.pc\r
#endif\r
\r
#ifdef EMU_M68K\r
#include "../cpu/musashi/m68kcpu.h"\r
extern m68ki_cpu_core PicoM68kCPU; // MD's CPU\r
extern m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU\r
#ifndef SekCyclesLeft\r
#define SekCyclesLeft m68k_cycles_remaining()\r
#define SekSetCyclesLeft(c) SET_CYCLES(c)\r
#define SekPc m68k_get_reg(&PicoM68kCPU, M68K_REG_PC)\r
#define SekPcS68k m68k_get_reg(&PicoS68kCPU, M68K_REG_PC)\r
#endif\r
#endif\r
\r
extern int SekCycleCnt; // cycles done in this frame\r
extern int SekCycleAim; // cycle aim\r
extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame\r
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#define SekCyclesReset() {SekCycleCntT+=SekCycleCnt;SekCycleCnt=SekCycleAim=0;}\r
#define SekCyclesBurn(c)  SekCycleCnt+=c\r
#define SekCyclesDone()  (SekCycleAim-SekCyclesLeft)    // nuber of cycles done in this frame (can be checked anywhere)\r
#define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom\r
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#define SekEndRun(after) { \\r
	SekCycleCnt -= SekCyclesLeft - after; \\r
	if(SekCycleCnt < 0) SekCycleCnt = 0; \\r
	SekSetCyclesLeft(after); \\r
}\r
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extern int SekCycleCntS68k;\r
extern int SekCycleAimS68k;\r
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#define SekCyclesResetS68k() {SekCycleCntS68k=SekCycleAimS68k=0;}\r
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// does not work as expected\r
//extern int z80ExtraCycles; // extra z80 cycles, used when z80 is [en|dis]abled\r
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extern int PicoMCD;\r
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// ---------------------------------------------------------\r
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// main oscillator clock which controls timing\r
#define OSC_NTSC 53693100\r
#define OSC_PAL  53203424 // not accurate\r
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struct PicoVideo\r
{\r
  unsigned char reg[0x20];\r
  unsigned int command; // 32-bit Command\r
  unsigned char pending; // 1 if waiting for second half of 32-bit command\r
  unsigned char type; // Command type (v/c/vsram read/write)\r
  unsigned short addr; // Read/Write address\r
  int status; // Status bits\r
  unsigned char pending_ints; // pending interrupts: ??VH????\r
  unsigned char pad[0x13];\r
};\r
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struct PicoMisc\r
{\r
  unsigned char rotate;\r
  unsigned char z80Run;\r
  unsigned char padTHPhase[2]; // phase of gamepad TH switches\r
  short scanline; // 0 to 261||311; -1 in fast mode\r
  char dirtyPal; // Is the palette dirty (1 - change @ this frame, 2 - some time before)\r
  unsigned char hardware; // Hardware value for country\r
  unsigned char pal; // 1=PAL 0=NTSC\r
  unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM?\r
  unsigned short z80_bank68k;\r
  unsigned short z80_lastaddr; // this is for Z80 faking\r
  unsigned char  z80_fakeval;\r
  unsigned char  pad0;\r
  unsigned char  padDelay[2];  // gamepad phase time outs, so we count a delay\r
  unsigned short sram_addr;  // EEPROM address register\r
  unsigned char sram_cycle;  // EEPROM SRAM cycle number\r
  unsigned char sram_slave;  // EEPROM slave word for X24C02 and better SRAMs\r
  unsigned char prot_bytes[2]; // simple protection fakeing\r
  unsigned short dma_bytes;  //\r
  unsigned char pad[2];\r
  unsigned int  frame_count; // mainly for movies\r
};\r
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// some assembly stuff depend on these, do not touch!\r
struct Pico\r
{\r
  unsigned char ram[0x10000];  // 0x00000 scratch ram\r
  unsigned short vram[0x8000]; // 0x10000\r
  unsigned char zram[0x2000];  // 0x20000 Z80 ram\r
  unsigned char ioports[0x10];\r
  unsigned int pad[0x3c];      // unused\r
  unsigned short cram[0x40];   // 0x22100\r
  unsigned short vsram[0x40];  // 0x22180\r
\r
  unsigned char *rom;          // 0x22200\r
  unsigned int romsize;        // 0x22204\r
\r
  struct PicoMisc m;\r
  struct PicoVideo video;\r
};\r
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// sram\r
struct PicoSRAM\r
{\r
  unsigned char *data; // actual data\r
  unsigned int start;  // start address in 68k address space\r
  unsigned int end;\r
  unsigned char resize; // 1=SRAM size changed and needs to be reallocated on PicoReset\r
  unsigned char reg_back; // copy of Pico.m.sram_reg to set after reset\r
  unsigned char changed;\r
  unsigned char pad;\r
};\r
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// MCD\r
#include "cd/cd_sys.h"\r
#include "cd/LC89510.h"\r
#include "cd/gfx_cd.h"\r
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struct mcd_misc\r
{\r
	unsigned short hint_vector;\r
	unsigned char  busreq;\r
	unsigned char  pad0;\r
\r
};\r
\r
typedef struct\r
{\r
	unsigned char bios[0x20000];			// 128K\r
	union {\r
		unsigned char prg_ram[0x80000];		// 512K\r
		unsigned char prg_ram_b[4][0x20000];\r
	};\r
	unsigned char word_ram[0x40000];		// 256K\r
	unsigned char bram[0x2000];			// 8K\r
	unsigned char s68k_regs[0x200];\r
	CDD  cdd;\r
	CDC  cdc;\r
	_scd scd;\r
	Rot_Comp rot_comp;\r
	struct mcd_misc m;\r
} mcd_state;\r
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#define Pico_mcd ((mcd_state *)Pico.rom)\r
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// Draw.c\r
int PicoLine(int scan);\r
void PicoFrameStart();\r
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// Draw2.c\r
void PicoFrameFull();\r
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// Memory.c\r
int PicoInitPc(unsigned int pc);\r
unsigned int CPU_CALL PicoRead32(unsigned int a);\r
void PicoMemSetup();\r
void PicoMemReset();\r
//void PicoDasm(int start,int len);\r
unsigned char z80_read(unsigned short a);\r
unsigned short z80_read16(unsigned short a);\r
void z80_write(unsigned char data, unsigned short a);\r
void z80_write16(unsigned short data, unsigned short a);\r
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// cd/Memory.c\r
void PicoMemSetupCD();\r
unsigned char  PicoReadCD8 (unsigned int a);\r
unsigned short PicoReadCD16(unsigned int a);\r
unsigned int   PicoReadCD32(unsigned int a);\r
void PicoWriteCD8 (unsigned int a, unsigned char d);\r
void PicoWriteCD16(unsigned int a, unsigned short d);\r
void PicoWriteCD32(unsigned int a, unsigned int d);\r
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// Pico.c\r
extern struct Pico Pico;\r
extern struct PicoSRAM SRam;\r
extern int emustatus;\r
int CheckDMA(void);\r
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// cd/Pico.c\r
int  PicoInitMCD(void);\r
void PicoExitMCD(void);\r
int  PicoResetMCD(int hard);\r
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// Sek.c\r
int SekInit(void);\r
int SekReset(void);\r
int SekInterrupt(int irq);\r
void SekState(unsigned char *data);\r
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// cd/Sek.c\r
int SekInitS68k(void);\r
int SekResetS68k(void);\r
int SekInterruptS68k(int irq);\r
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// VideoPort.c\r
void PicoVideoWrite(unsigned int a,unsigned short d);\r
unsigned int PicoVideoRead(unsigned int a);\r
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// Misc.c\r
void SRAMWriteEEPROM(unsigned int d);\r
unsigned int SRAMReadEEPROM();\r
void SRAMUpdPending(unsigned int a, unsigned int d);\r
\r
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#ifdef __cplusplus\r
} // End of extern "C"\r
#endif\r