psp port runs, bad colors
[picodrive.git] / Pico / Sek.c
CommitLineData
cc68a136 1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
4// (c) Copyright 2006 notaz, All rights reserved.\r
5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
10#include "PicoInt.h"\r
11\r
12\r
13int SekCycleCnt=0; // cycles done in this frame\r
14int SekCycleAim=0; // cycle aim\r
15unsigned int SekCycleCntT=0;\r
16\r
17#ifdef EMU_C68K\r
18// ---------------------- Cyclone 68000 ----------------------\r
19struct Cyclone PicoCpu;\r
20#endif\r
21\r
22#ifdef EMU_M68K\r
23// ---------------------- MUSASHI 68000 ----------------------\r
24m68ki_cpu_core PicoM68kCPU; // MD's CPU\r
25#endif\r
26\r
27#ifdef EMU_A68K\r
28// ---------------------- A68K ----------------------\r
29\r
30void __cdecl M68000_RESET();\r
31int m68k_ICount=0;\r
32unsigned int mem_amask=0xffffff; // 24-bit bus\r
33unsigned int mame_debug=0,cur_mrhard=0,m68k_illegal_opcode=0,illegal_op=0,illegal_pc=0,opcode_entry=0; // filler\r
34\r
35static int IrqCallback(int i) { i; return -1; }\r
36static int DoReset() { return 0; }\r
37static int (*ResetCallback)()=DoReset;\r
38\r
39#pragma warning (disable:4152)\r
40#endif\r
41\r
42\r
43\r
cc68a136 44#ifdef EMU_C68K\r
b837b69b 45// interrupt acknowledgment\r
0af33fe0 46static int SekIntAck(int level)\r
cc68a136 47{\r
48 // try to emulate VDP's reaction to 68000 int ack\r
69996cb7 49 if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
50 else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
cc68a136 51 PicoCpu.irq = 0;\r
0af33fe0 52 return CYCLONE_INT_ACK_AUTOVECTOR;\r
cc68a136 53}\r
54\r
69996cb7 55static void SekResetAck(void)\r
cc68a136 56{\r
69996cb7 57 elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
cc68a136 58}\r
59\r
60static int SekUnrecognizedOpcode()\r
61{\r
62 unsigned int pc, op;\r
63 pc = SekPc;\r
64 op = PicoCpu.read16(pc);\r
69996cb7 65 elprintf(EL_ANOMALY, "Unrecognized Opcode %04x @ %06x", op, pc);\r
cc68a136 66 // see if we are not executing trash\r
67 if (pc < 0x200 || (pc > Pico.romsize+4 && (pc&0xe00000)!=0xe00000)) {\r
68 PicoCpu.cycles = 0;\r
0af33fe0 69 PicoCpu.state_flags |= 1;\r
cc68a136 70 return 1;\r
71 }\r
2d0b15bb 72#ifdef EMU_M68K // debugging cyclone\r
73 {\r
74 extern int have_illegal;\r
75 have_illegal = 1;\r
76 }\r
77#endif\r
cc68a136 78 //exit(1);\r
79 return 0;\r
80}\r
81#endif\r
82\r
83\r
84#ifdef EMU_M68K\r
85static int SekIntAckM68K(int level)\r
86{\r
69996cb7 87 if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
88 else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
cc68a136 89 CPU_INT_LEVEL = 0;\r
90 return M68K_INT_ACK_AUTOVECTOR;\r
91}\r
0af33fe0 92\r
93static int SekTasCallback(void)\r
94{\r
95 return 0; // no writeback\r
96}\r
cc68a136 97#endif\r
98\r
99\r
100\r
eff55556 101PICO_INTERNAL int SekInit()\r
cc68a136 102{\r
103#ifdef EMU_C68K\r
104 CycloneInit();\r
105 memset(&PicoCpu,0,sizeof(PicoCpu));\r
106 PicoCpu.IrqCallback=SekIntAck;\r
107 PicoCpu.ResetCallback=SekResetAck;\r
108 PicoCpu.UnrecognizedCallback=SekUnrecognizedOpcode;\r
109#endif\r
110#ifdef EMU_A68K\r
111 memset(&M68000_regs,0,sizeof(M68000_regs));\r
112 M68000_regs.IrqCallback=IrqCallback;\r
113 M68000_regs.pResetCallback=ResetCallback;\r
114 M68000_RESET(); // Init cpu emulator\r
115#endif\r
116#ifdef EMU_M68K\r
117 {\r
118 void *oldcontext = m68ki_cpu_p;\r
119 m68k_set_context(&PicoM68kCPU);\r
120 m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
121 m68k_init();\r
122 m68k_set_int_ack_callback(SekIntAckM68K);\r
0af33fe0 123 m68k_set_tas_instr_callback(SekTasCallback);\r
cc68a136 124 m68k_pulse_reset(); // Init cpu emulator\r
125 m68k_set_context(oldcontext);\r
126 }\r
127#endif\r
128\r
129 return 0;\r
130}\r
131\r
132// Reset the 68000:\r
eff55556 133PICO_INTERNAL int SekReset()\r
cc68a136 134{\r
135 if (Pico.rom==NULL) return 1;\r
136\r
137#ifdef EMU_C68K\r
0af33fe0 138 PicoCpu.state_flags=0;\r
cc68a136 139 PicoCpu.osp=0;\r
140 PicoCpu.srh =0x27; // Supervisor mode\r
141 PicoCpu.flags=4; // Z set\r
142 PicoCpu.irq=0;\r
143 PicoCpu.a[7]=PicoCpu.read32(0); // Stack Pointer\r
144 PicoCpu.membase=0;\r
145 PicoCpu.pc=PicoCpu.checkpc(PicoCpu.read32(4)); // Program Counter\r
146#endif\r
147#ifdef EMU_A68K\r
148 // Reset CPU: fetch SP and PC\r
149 M68000_regs.srh=0x27; // Supervisor mode\r
150 M68000_regs.a[7]=PicoRead32(0);\r
151 M68000_regs.pc =PicoRead32(4);\r
152 PicoInitPc(M68000_regs.pc);\r
153#endif\r
154#ifdef EMU_M68K\r
b837b69b 155 m68k_set_context(&PicoM68kCPU); // if we ever reset m68k, we always need it's context to be set\r
2d0b15bb 156 m68ki_cpu.sp[0]=0;\r
157 m68k_set_irq(0);\r
b837b69b 158 m68k_pulse_reset();\r
cc68a136 159#endif\r
160\r
161 return 0;\r
162}\r
163\r
164\r
eff55556 165PICO_INTERNAL int SekInterrupt(int irq)\r
cc68a136 166{\r
0af33fe0 167#if defined(EMU_C68K) && defined(EMU_M68K)\r
168 {\r
169 extern unsigned int dbg_irq_level;\r
170 dbg_irq_level=irq;\r
171 return 0;\r
172 }\r
173#endif\r
cc68a136 174#ifdef EMU_C68K\r
175 PicoCpu.irq=irq;\r
176#endif\r
177#ifdef EMU_A68K\r
178 M68000_regs.irq=irq; // raise irq (gets lowered after taken)\r
179#endif\r
180#ifdef EMU_M68K\r
181 {\r
182 void *oldcontext = m68ki_cpu_p;\r
183 m68k_set_context(&PicoM68kCPU);\r
184 m68k_set_irq(irq); // raise irq (gets lowered after taken or must be done in ack)\r
185 m68k_set_context(oldcontext);\r
186 }\r
187#endif\r
188 return 0;\r
189}\r
190\r
191//int SekPc() { return PicoCpu.pc-PicoCpu.membase; }\r
192//int SekPc() { return M68000_regs.pc; }\r
193//int SekPc() { return m68k_get_reg(NULL, M68K_REG_PC); }\r
194\r
eff55556 195PICO_INTERNAL void SekState(unsigned char *data)\r
cc68a136 196{\r
197#ifdef EMU_C68K\r
198 memcpy(data,PicoCpu.d,0x44);\r
199#elif defined(EMU_A68K)\r
200 memcpy(data, M68000_regs.d, 0x40);\r
201 memcpy(data+0x40,&M68000_regs.pc,0x04);\r
202#elif defined(EMU_M68K)\r
203 memcpy(data, PicoM68kCPU.dar,0x40);\r
204 memcpy(data+0x40,&PicoM68kCPU.pc, 0x04);\r
205#endif\r
206}\r
2433f409 207\r
eff55556 208PICO_INTERNAL void SekSetRealTAS(int use_real)\r
2433f409 209{\r
210#ifdef EMU_C68K\r
211 CycloneSetRealTAS(use_real);\r
212#endif\r
213}\r
214\r