bugfix, fd leak
[picodrive.git] / Pico / cd / Pico.c
CommitLineData
cc68a136 1// This is part of Pico Library
2
3// (c) Copyright 2004 Dave, All rights reserved.
672ad671 4// (c) Copyright 2007 notaz, All rights reserved.
cc68a136 5// Free for non-commercial use.
6
7// For commercial use, separate licencing terms must be obtained.
8
9
10#include "../PicoInt.h"
11#include "../sound/sound.h"
12
13
76276b0b 14extern unsigned char formatted_bram[4*0x10];
89fa852d 15extern unsigned int s68k_poll_adclk;
16
721cd396 17void (*PicoMCDopenTray)(void) = NULL;
18int (*PicoMCDcloseTray)(void) = NULL;
89fa852d 19
20#define dump_ram(ram,fname) \
21{ \
22 int i, d; \
23 FILE *f; \
24\
25 for (i = 0; i < sizeof(ram); i+=2) { \
26 d = (ram[i]<<8) | ram[i+1]; \
27 *(unsigned short *)(ram+i) = d; \
28 } \
29 f = fopen(fname, "wb"); \
30 if (f) { \
31 fwrite(ram, 1, sizeof(ram), f); \
32 fclose(f); \
33 } \
34 for (i = 0; i < sizeof(ram); i+=2) { \
35 d = (ram[i]<<8) | ram[i+1]; \
36 *(unsigned short *)(ram+i) = d; \
37 } \
38}
cc68a136 39
40
41int PicoInitMCD(void)
42{
43 SekInitS68k();
44 Init_CD_Driver();
45
46 return 0;
47}
48
49
50void PicoExitMCD(void)
51{
52 End_CD_Driver();
89fa852d 53
54 //dump_ram(Pico_mcd->prg_ram, "prg.bin");
55 //dump_ram(Pico.ram, "ram.bin");
cc68a136 56}
57
58int PicoResetMCD(int hard)
59{
51a902ae 60 if (hard) {
a4030801 61 int fmt_size = sizeof(formatted_bram);
62 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
63 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
64 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
65 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
66 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size);
51a902ae 67 }
68 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
4f265db7 69 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
5c69a605 70 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
51a902ae 71
d1df8786 72 *(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6)
c008977e 73 Pico_mcd->m.state_flags |= 1; // s68k reset pending
672ad671 74 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset
cc68a136 75
cc68a136 76 Reset_CD();
5c69a605 77 LC89510_Reset();
51a902ae 78 gfx_cd_reset();
4ff2d527 79#ifdef _ASM_CD_MEMORY_C
80 PicoMemResetCD(1);
00bd648e 81 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
4ff2d527 82#endif
cc68a136 83
84 return 0;
85}
86
87static __inline void SekRun(int cyc)
88{
89 int cyc_do;
90 SekCycleAim+=cyc;
91 if((cyc_do=SekCycleAim-SekCycleCnt) < 0) return;
b837b69b 92#if defined(EMU_C68K)
93 PicoCpu.cycles=cyc_do;
94 CycloneRun(&PicoCpu);
95 SekCycleCnt+=cyc_do-PicoCpu.cycles;
96#elif defined(EMU_M68K)
cc68a136 97 m68k_set_context(&PicoM68kCPU);
98 SekCycleCnt+=m68k_execute(cyc_do);
99#endif
100}
101
102static __inline void SekRunS68k(int cyc)
103{
104 int cyc_do;
105 SekCycleAimS68k+=cyc;
106 if((cyc_do=SekCycleAimS68k-SekCycleCntS68k) < 0) return;
b837b69b 107#if defined(EMU_C68K)
108 PicoCpuS68k.cycles=cyc_do;
109 CycloneRun(&PicoCpuS68k);
110 SekCycleCntS68k+=cyc_do-PicoCpuS68k.cycles;
111#elif defined(EMU_M68K)
cc68a136 112 m68k_set_context(&PicoS68kCPU);
113 SekCycleCntS68k+=m68k_execute(cyc_do);
114#endif
115}
116
7336a99a 117#define PS_STEP_M68K ((488<<16)/20) // ~24
118//#define PS_STEP_S68K 13
68cba51e 119
a4030801 120#ifdef _ASM_CD_PICO_C
121void SekRunPS(int cyc_m68k, int cyc_s68k);
122#else
68cba51e 123static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
124{
7336a99a 125 int cycn, cycn_s68k, cyc_do;
126 int d_cm = 0, d_cs = 0, ex;
68cba51e 127 SekCycleAim+=cyc_m68k;
128 SekCycleAimS68k+=cyc_s68k;
7336a99a 129
130// fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k,
131// SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline);
132
133 /* loop 488 downto 0 in steps of PS_STEP */
134 for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K)
135 {
136 ex = 0;
137 cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16;
138//fprintf(stderr, "%3i/%3i: ", cycn>>16, cycn_s68k);
139 if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) {
68cba51e 140#if defined(EMU_C68K)
7336a99a 141 PicoCpu.cycles = cyc_do;
68cba51e 142 CycloneRun(&PicoCpu);
7336a99a 143 SekCycleCnt += cyc_do - PicoCpu.cycles;
68cba51e 144#elif defined(EMU_M68K)
145 m68k_set_context(&PicoM68kCPU);
7336a99a 146 SekCycleCnt += (ex = m68k_execute(cyc_do));
68cba51e 147#endif
7336a99a 148 }
149//fprintf(stderr, "%3i ", ex); d_cm += ex; ex = 0;
150 if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) {
68cba51e 151#if defined(EMU_C68K)
7336a99a 152 PicoCpuS68k.cycles = cyc_do;
68cba51e 153 CycloneRun(&PicoCpuS68k);
7336a99a 154 SekCycleCntS68k += cyc_do - PicoCpuS68k.cycles;
68cba51e 155#elif defined(EMU_M68K)
156 m68k_set_context(&PicoS68kCPU);
7336a99a 157 SekCycleCntS68k += (ex = m68k_execute(cyc_do));
68cba51e 158#endif
7336a99a 159 }
160//fprintf(stderr, "%3i\n", ex); d_cs += ex;
68cba51e 161 }
7336a99a 162
163//fprintf(stderr, "== end %3i/%3i ==\n", d_cm, d_cs);
68cba51e 164}
7336a99a 165#endif
68cba51e 166
167
bf098bc5 168static __inline void check_cd_dma(void)
169{
170 int ddx;
171
c459aefd 172 if (!(Pico_mcd->scd.Status_CDC & 0x08)) return;
bf098bc5 173
174 ddx = Pico_mcd->s68k_regs[4] & 7;
175 if (ddx < 2) return; // invalid
c459aefd 176 if (ddx < 4) {
177 Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
178 return;
179 }
bf098bc5 180 if (ddx == 6) return; // invalid
181
182 Update_CDC_TRansfer(ddx); // now go and do the actual transfer
183}
184
4f265db7 185static __inline void update_chips(void)
186{
187 int counter_timer, int3_set;
188 int counter75hz_lim = Pico.m.pal ? 2080 : 2096;
189
190 // 75Hz CDC update
191 if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) {
192 Pico_mcd->m.counter75hz -= counter75hz_lim;
193 Check_CD_Command();
194 }
195
196 // update timers
197 counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708;
198 Pico_mcd->m.timer_stopwatch += counter_timer;
199 if ((int3_set = Pico_mcd->s68k_regs[0x31])) {
200 Pico_mcd->m.timer_int3 -= counter_timer;
201 if (Pico_mcd->m.timer_int3 < 0) {
202 if (Pico_mcd->s68k_regs[0x33] & (1<<3)) {
203 dprintf("s68k: timer irq 3");
204 SekInterruptS68k(3);
205 Pico_mcd->m.timer_int3 += int3_set << 16;
206 }
207 // is this really what happens if irq3 is masked out?
208 Pico_mcd->m.timer_int3 &= 0xffffff;
209 }
210 }
211
212 // update gfx chip
213 if (Pico_mcd->rot_comp.Reg_58 & 0x8000)
214 gfx_cd_update();
89fa852d 215
216 // delayed setting of DMNA bit (needed for Silpheed)
217 if (Pico_mcd->m.state_flags & 2) {
218 Pico_mcd->m.state_flags &= ~2;
46969540 219 if (!(Pico_mcd->s68k_regs[3] & 4)) {
220 Pico_mcd->s68k_regs[3] |= 2;
221 Pico_mcd->s68k_regs[3] &= ~1;
89fa852d 222#ifdef USE_POLL_DETECT
46969540 223 if ((s68k_poll_adclk&0xfe) == 2) {
224 SekSetStopS68k(0); s68k_poll_adclk = 0;
225 }
89fa852d 226#endif
46969540 227 }
89fa852d 228 }
4f265db7 229}
230
b837b69b 231
cc68a136 232static int PicoFrameHintsMCD(void)
233{
234 struct PicoVideo *pv=&Pico.video;
4f265db7 235 int total_z80=0,lines,y,lines_vis = 224,z80CycleAim = 0,line_sample;
cc68a136 236 const int cycles_68k=488,cycles_z80=228,cycles_s68k=795; // both PAL and NTSC compile to same values
237 int skip=PicoSkipFrame || (PicoOpt&0x10);
238 int hint; // Hint counter
239
240 if(Pico.m.pal) { //
241 //cycles_68k = (int) ((double) OSC_PAL / 7 / 50 / 312 + 0.4); // should compile to a constant (488)
242 //cycles_z80 = (int) ((double) OSC_PAL / 15 / 50 / 312 + 0.4); // 228
243 lines = 312; // Steve Snake says there are 313 lines, but this seems to also work well
244 line_sample = 68;
245 if(pv->reg[1]&8) lines_vis = 240;
246 } else {
247 //cycles_68k = (int) ((double) OSC_NTSC / 7 / 60 / 262 + 0.4); // 488
248 //cycles_z80 = (int) ((double) OSC_NTSC / 15 / 60 / 262 + 0.4); // 228
249 lines = 262;
250 line_sample = 93;
251 }
252
253 SekCyclesReset();
254 SekCyclesResetS68k();
255 //z80ExtraCycles = 0;
256
257 if(PicoOpt&4)
258 z80CycleAim = 0;
259// z80_resetCycles();
260
261 pv->status&=~0x88; // clear V-Int, come out of vblank
262
263 hint=pv->reg[10]; // Load H-Int counter
264 //dprintf("-hint: %i", hint);
265
266 for (y=0;y<lines;y++)
267 {
268 Pico.m.scanline=(short)y;
269
270 // pad delay (for 6 button pads)
271 if(PicoOpt&0x20) {
272 if(Pico.m.padDelay[0]++ > 25) Pico.m.padTHPhase[0]=0;
273 if(Pico.m.padDelay[1]++ > 25) Pico.m.padTHPhase[1]=0;
274 }
275
bf098bc5 276 check_cd_dma();
277
cc68a136 278 // H-Interrupts:
279 if(y <= lines_vis && --hint < 0) // y <= lines_vis: Comix Zone, Golden Axe
280 {
281 //dprintf("rhint:old @ %06x", SekPc);
282 hint=pv->reg[10]; // Reload H-Int counter
283 pv->pending_ints|=0x10;
284 if (pv->reg[0]&0x10) SekInterrupt(4);
285 //dprintf("rhint: %i @ %06x [%i|%i]", hint, SekPc, y, SekCycleCnt);
286 //dprintf("hint_routine: %x", (*(unsigned short*)(Pico.ram+0x0B84)<<16)|*(unsigned short*)(Pico.ram+0x0B86));
287 }
288
289 // V-Interrupt:
290 if (y == lines_vis)
291 {
292 //dprintf("vint: @ %06x [%i|%i]", SekPc, y, SekCycleCnt);
293 pv->status|=0x88; // V-Int happened, go into vblank
294 SekRun(128); SekCycleAim-=128; // there must be a gap between H and V ints, also after vblank bit set (Mazin Saga, Bram Stoker's Dracula)
295 /*if(Pico.m.z80Run && (PicoOpt&4)) {
296 z80CycleAim+=cycles_z80/2;
297 total_z80+=z80_run(z80CycleAim-total_z80);
298 z80CycleAim-=cycles_z80/2;
299 }*/
300 pv->pending_ints|=0x20;
301 if(pv->reg[1]&0x20) SekInterrupt(6);
302 if(Pico.m.z80Run && (PicoOpt&4)) // ?
303 z80_int();
304 //dprintf("zint: [%i|%i] zPC=%04x", Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0));
305 }
306
307 // decide if we draw this line
308#if CAN_HANDLE_240_LINES
309 if(!skip && ((!(pv->reg[1]&8) && y<224) || ((pv->reg[1]&8) && y<240)) )
310#else
311 if(!skip && y<224)
312#endif
313 PicoLine(y);
314
315 if(PicoOpt&1)
316 sound_timers_and_dac(y);
317
318 // get samples from sound chips
7a93adeb 319 if (y == 224 && PsndOut) {
320 int len = sound_render(0, PsndLen);
321 if (PicoWriteSound) PicoWriteSound(len);
322 // clear sound buffer
323 sound_clear();
324 }
cc68a136 325
326 // Run scanline:
327 //dprintf("m68k starting exec @ %06x", SekPc);
89fa852d 328 if (Pico.m.dma_bytes) SekCycleCnt+=CheckDMA();
329 if ((PicoOpt & 0x2000) && (Pico_mcd->m.busreq&3) == 1) {
7336a99a 330 SekRunPS(cycles_68k, cycles_s68k); // "better/perfect sync"
68cba51e 331 } else {
332 SekRun(cycles_68k);
333 if ((Pico_mcd->m.busreq&3) == 1) // no busreq/no reset
334 SekRunS68k(cycles_s68k);
cc68a136 335 }
336
89fa852d 337 if ((PicoOpt&4) && Pico.m.z80Run) {
d9153729 338 if (Pico.m.z80Run & 2) z80CycleAim+=cycles_z80;
339 else {
340 int cnt = SekCyclesDone() - z80startCycle;
341 cnt = (cnt>>1)-(cnt>>5);
342 //if (cnt > cycles_z80) printf("FIXME: z80 cycles: %i\n", cnt);
343 if (cnt > cycles_z80) cnt = cycles_z80;
344 Pico.m.z80Run |= 2;
345 z80CycleAim+=cnt;
346 }
cc68a136 347 total_z80+=z80_run(z80CycleAim-total_z80);
348 }
349
4f265db7 350 update_chips();
cc68a136 351 }
352
353 // draw a frame just after vblank in alternative render mode
89fa852d 354 if (!PicoSkipFrame && (PicoOpt&0x10))
cc68a136 355 PicoFrameFull();
356
357 return 0;
358}
359
360
361int PicoFrameMCD(void)
362{
363 if(!(PicoOpt&0x10))
364 PicoFrameStart();
365
366 PicoFrameHintsMCD();
367
368 return 0;
369}
370
371