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cc68a136 1;@ Reesy's Z80 Emulator Version 0.001\r
2\r
3;@ (c) Copyright 2004 Reesy, All rights reserved\r
4;@ DrZ80 is free for non-commercial use.\r
5\r
6;@ For commercial use, separate licencing terms must be obtained.\r
7\r
8 .data\r
9 .align 4\r
10\r
11 .global DrZ80Run\r
12 .global DrZ80Ver\r
13\r
e5f426aa 14 .equiv INTERRUPT_MODE, 0 ;@0 = Use internal int handler, 1 = Use Mames int handler\r
15 .equiv FAST_Z80SP, 1 ;@0 = Use mem functions for stack pointer, 1 = Use direct mem pointer\r
16 .equiv UPDATE_CONTEXT, 0\r
17 .equiv DRZ80_FOR_PICODRIVE, 1\r
cc68a136 18\r
19.if INTERRUPT_MODE\r
e5f426aa 20 .extern Interrupt\r
cc68a136 21.endif\r
22\r
23.if DRZ80_FOR_PICODRIVE\r
e5f426aa 24.include "port_config.s"\r
25 .extern YM2612Read_\r
26.if EXTERNAL_YM2612\r
27 .extern YM2612Read_940\r
28.endif\r
cc68a136 29 .extern PicoRead8\r
30 .extern Pico\r
31 .extern z80_write\r
32.endif\r
33\r
34DrZ80Ver: .long 0x0001\r
35\r
36;@ --------------------------- Defines ----------------------------\r
37;@ Make sure that regs/pointers for z80pc to z80sp match up!\r
38\r
39 opcodes .req r3\r
40 z80_icount .req r4\r
41 cpucontext .req r5\r
42 z80pc .req r6\r
43 z80a .req r7\r
44 z80f .req r8\r
45 z80bc .req r9\r
46 z80de .req r10\r
47 z80hl .req r11\r
48 z80sp .req r12 \r
49 z80xx .req lr\r
50\r
51 .equ z80pc_pointer, 0 ;@ 0\r
52 .equ z80a_pointer, z80pc_pointer+4 ;@ 4\r
53 .equ z80f_pointer, z80a_pointer+4 ;@ 8\r
54 .equ z80bc_pointer, z80f_pointer+4 ;@ \r
55 .equ z80de_pointer, z80bc_pointer+4\r
56 .equ z80hl_pointer, z80de_pointer+4\r
57 .equ z80sp_pointer, z80hl_pointer+4\r
58 .equ z80pc_base, z80sp_pointer+4\r
59 .equ z80sp_base, z80pc_base+4\r
60 .equ z80ix, z80sp_base+4\r
61 .equ z80iy, z80ix+4\r
62 .equ z80i, z80iy+4\r
63 .equ z80a2, z80i+4\r
64 .equ z80f2, z80a2+4\r
65 .equ z80bc2, z80f2+4\r
66 .equ z80de2, z80bc2+4\r
67 .equ z80hl2, z80de2+4\r
68 .equ cycles_pointer, z80hl2+4 \r
69 .equ previouspc, cycles_pointer+4 \r
70 .equ z80irq, previouspc+4\r
71 .equ z80if, z80irq+1\r
72 .equ z80im, z80if+1\r
73 .equ z80r, z80im+1\r
74 .equ z80irqvector, z80r+1\r
75 .equ z80irqcallback, z80irqvector+4\r
76 .equ z80_write8, z80irqcallback+4\r
77 .equ z80_write16, z80_write8+4\r
78 .equ z80_in, z80_write16+4\r
79 .equ z80_out, z80_in+4\r
80 .equ z80_read8, z80_out+4\r
81 .equ z80_read16, z80_read8+4\r
82 .equ z80_rebaseSP, z80_read16+4\r
83 .equ z80_rebasePC, z80_rebaseSP+4\r
84\r
85 .equ VFlag, 0\r
86 .equ CFlag, 1\r
87 .equ ZFlag, 2\r
88 .equ SFlag, 3\r
89 .equ HFlag, 4\r
90 .equ NFlag, 5\r
91 .equ Flag3, 6\r
92 .equ Flag5, 7\r
93\r
94 .equ Z80_CFlag, 0\r
95 .equ Z80_NFlag, 1\r
96 .equ Z80_VFlag, 2\r
97 .equ Z80_Flag3, 3\r
98 .equ Z80_HFlag, 4\r
99 .equ Z80_Flag5, 5\r
100 .equ Z80_ZFlag, 6\r
101 .equ Z80_SFlag, 7\r
102\r
103 .equ Z80_IF1, 1<<0\r
104 .equ Z80_IF2, 1<<1\r
105 .equ Z80_HALT, 1<<2\r
106\r
107;@---------------------------------------\r
108\r
109.text\r
110\r
111.if DRZ80_FOR_PICODRIVE\r
cc68a136 112\r
113.macro YM2612Read_and_ret8\r
114 stmfd sp!,{r3,r12,lr}\r
115.if EXTERNAL_YM2612\r
116 ldr r1,=PicoOpt\r
117 ldr r1,[r1]\r
118 tst r1,#0x200\r
119 bne 10f\r
120 bl YM2612Read_\r
121 ldmfd sp!,{r3,r12,pc}\r
12210:\r
123 bl YM2612Read_940\r
124.else\r
125 bl YM2612Read_\r
126.endif\r
127 ldmfd sp!,{r3,r12,pc}\r
128.endm\r
129\r
130.macro YM2612Read_and_ret16\r
131 stmfd sp!,{r3,r12,lr}\r
132.if EXTERNAL_YM2612\r
133 ldr r0,=PicoOpt\r
134 ldr r0,[r0]\r
135 tst r0,#0x200\r
136 bne 10f\r
137 bl YM2612Read_\r
138 orr r0,r0,r0,lsl #8\r
139 ldmfd sp!,{r3,r12,pc}\r
14010:\r
141 bl YM2612Read_940\r
142 orr r0,r0,r0,lsl #8\r
143.else\r
144 bl YM2612Read_\r
145 orr r0,r0,r0,lsl #8\r
146.endif\r
147 ldmfd sp!,{r3,r12,pc}\r
148.endm\r
149\r
150pico_z80_read8: @ addr\r
151 cmp r0,#0x2000 @ Z80 RAM\r
152 ldrlt r1,[cpucontext,#z80sp_base]\r
153 ldrltb r0,[r1,r0]\r
154 bxlt lr\r
155\r
156 cmp r0,#0x8000 @ 68k bank\r
157 blt 1f\r
158 ldr r2,=(Pico+0x22212)\r
159 ldrh r1,[r2]\r
160 bic r0,r0,#0x3f8000\r
161 orr r0,r0,r1,lsl #15\r
162 ldr r1,[r2,#-0xe] @ ROM size\r
163 cmp r0,r1\r
164 ldrlt r1,[r2,#-0x12] @ ROM\r
165 eorlt r0,r0,#1 @ our ROM is byteswapped\r
166 ldrltb r0,[r1,r0]\r
167 bxlt lr\r
168 stmfd sp!,{r3,r12,lr}\r
169 bl PicoRead8\r
170 ldmfd sp!,{r3,r12,pc}\r
1711:\r
172 mov r1,r0,lsr #13\r
173 cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
174 bne 0f\r
175 and r0,r0,#3\r
176 YM2612Read_and_ret8\r
1770:\r
178 cmp r0,#0x4000\r
179 movge r0,#0xff\r
180 bxge lr\r
181 ldr r1,[cpucontext,#z80sp_base]\r
182 bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
183 ldrb r0,[r1,r0]\r
184 bx lr\r
185\r
186pico_z80_read16: @ addr\r
187 cmp r0,#0x2000 @ Z80 RAM\r
188 bge 2f\r
189 ldr r1,[cpucontext,#z80sp_base]\r
190 ldrb r0,[r1,r0]!\r
191 ldrb r1,[r1,#1]\r
192 orr r0,r0,r1,lsl #8\r
193 bx lr\r
194\r
1952:\r
196 cmp r0,#0x8000 @ 68k bank\r
197 blt 1f\r
198 ldr r2,=(Pico+0x22212)\r
199 ldrh r1,[r2]\r
200 bic r0,r0,#0x1f8000\r
201 orr r0,r0,r1,lsl #15\r
202 ldr r1,[r2,#-0xe] @ ROM size\r
203 cmp r0,r1\r
204 ldr r1,[r2,#-0x12] @ ROM\r
205 tst r0,#1\r
206 eor r0,r0,#1\r
207 ldrb r0,[r1,r0]!\r
208 ldreqb r1,[r1,#-1]\r
209 ldrneb r1,[r1,#3] @ this is due to byteswapped ROM\r
210 orr r0,r0,r1,lsl #8\r
211 bx lr\r
2123:\r
213 stmfd sp!,{r3-r5,r12,lr}\r
214 mov r4,r0\r
215 bl PicoRead8\r
216 mov r5,r0\r
217 add r0,r4,#1\r
218 bl PicoRead8\r
219 orr r0,r5,r0,lsl #8\r
220 ldmfd sp!,{r3-r5,r12,pc}\r
2211:\r
222 mov r1,r0,lsr #13\r
223 cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
224 bne 0f\r
225 and r0,r0,#3\r
226 YM2612Read_and_ret16\r
2270:\r
228 cmp r0,#0x4000\r
229 movge r0,#0xff\r
230 bxge lr\r
231 ldr r1,[cpucontext,#z80sp_base]\r
232 bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
233 ldrb r0,[r1,r0]!\r
234 ldrb r1,[r1,#1]\r
235 orr r0,r0,r1,lsl #8\r
236 bx lr\r
237\r
238pico_z80_write8: @ data, addr\r
239 cmp r1,#0x4000\r
240 bge 1f\r
241 ldr r2,[cpucontext,#z80sp_base]\r
242 bic r1,r1,#0x0fe000 @ Z80 RAM\r
243 strb r0,[r2,r1]\r
244 bx lr\r
2451:\r
246 stmfd sp!,{r3,r12,lr}\r
247 bl z80_write\r
248 ldmfd sp!,{r3,r12,pc}\r
249\r
250pico_z80_write16: @ data, addr\r
251 cmp r1,#0x4000\r
252 bge 1f\r
253 ldr r2,[cpucontext,#z80sp_base]\r
254 bic r1,r1,#0x0fe000 @ Z80 RAM\r
255 strb r0,[r2,r1]!\r
256 mov r0,r0,lsr #8\r
257 strb r0,[r2,#1]\r
258 bx lr\r
2591:\r
260 stmfd sp!,{r3-r5,r12,lr}\r
261 mov r4,r0\r
262 mov r5,r1\r
263 bl z80_write\r
264 mov r0,r4,lsr #8\r
265 add r1,r5,#1\r
266 bl z80_write\r
267 ldmfd sp!,{r3-r5,r12,pc}\r
268\r
269 .pool\r
270.endif\r
271\r
272.macro fetch cycs\r
273 subs z80_icount,z80_icount,#\cycs\r
274.if UPDATE_CONTEXT\r
275 str z80pc,[cpucontext,#z80pc_pointer]\r
276 str z80_icount,[cpucontext,#cycles_pointer]\r
277 ldr r1,[cpucontext,#z80pc_base]\r
278 sub r2,z80pc,r1\r
279 str r2,[cpucontext,#previouspc]\r
280.endif\r
281 ldrplb r0,[z80pc],#1\r
282 ldrpl pc,[opcodes,r0, lsl #2]\r
283 bmi z80_execute_end\r
284.endm\r
285\r
286.macro eatcycles cycs\r
287 sub z80_icount,z80_icount,#\cycs\r
288.if UPDATE_CONTEXT\r
289 str z80_icount,[cpucontext,#cycles_pointer]\r
290.endif\r
291.endm\r
292\r
293.macro readmem8\r
294.if UPDATE_CONTEXT\r
295 str z80pc,[cpucontext,#z80pc_pointer]\r
296.endif\r
297.if DRZ80_FOR_PICODRIVE\r
298 bl pico_z80_read8\r
299.else\r
300 stmfd sp!,{r3,r12}\r
301 mov lr,pc\r
302 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
303 ldmfd sp!,{r3,r12}\r
304.endif\r
305.endm\r
306\r
307.macro readmem8HL\r
308 mov r0,z80hl, lsr #16\r
309 readmem8\r
310.endm\r
311\r
312.macro readmem16\r
313.if UPDATE_CONTEXT\r
314 str z80pc,[cpucontext,#z80pc_pointer]\r
315.endif\r
316.if DRZ80_FOR_PICODRIVE\r
317 bl pico_z80_read16\r
318.else\r
319 stmfd sp!,{r3,r12}\r
320 mov lr,pc\r
321 ldr pc,[cpucontext,#z80_read16]\r
322 ldmfd sp!,{r3,r12}\r
323.endif\r
324.endm\r
325\r
326.macro writemem8\r
327.if UPDATE_CONTEXT\r
328 str z80pc,[cpucontext,#z80pc_pointer]\r
329.endif\r
330.if DRZ80_FOR_PICODRIVE\r
331 bl pico_z80_write8\r
332.else\r
333 stmfd sp!,{r3,r12}\r
334 mov lr,pc\r
335 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
336 ldmfd sp!,{r3,r12}\r
337.endif\r
338.endm\r
339\r
340.macro writemem8DE\r
341 mov r1,z80de, lsr #16\r
342 writemem8\r
343.endm\r
344\r
345.macro writemem8HL\r
346 mov r1,z80hl, lsr #16\r
347 writemem8\r
348.endm\r
349\r
350.macro writemem16\r
351.if UPDATE_CONTEXT\r
352 str z80pc,[cpucontext,#z80pc_pointer]\r
353.endif\r
354.if DRZ80_FOR_PICODRIVE\r
355 bl pico_z80_write16\r
356.else\r
357 stmfd sp!,{r3,r12}\r
358 mov lr,pc\r
359 ldr pc,[cpucontext,#z80_write16] ;@ r0=data r1=addr\r
360 ldmfd sp!,{r3,r12}\r
361.endif\r
362.endm\r
363\r
364.macro copymem8HL_DE\r
365.if UPDATE_CONTEXT\r
366 str z80pc,[cpucontext,#z80pc_pointer]\r
367.endif\r
368 mov r0,z80hl, lsr #16\r
369.if DRZ80_FOR_PICODRIVE\r
370 bl pico_z80_read8\r
371.else\r
372 stmfd sp!,{r3,r12}\r
373 mov lr,pc\r
374 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
375.endif\r
376.if UPDATE_CONTEXT\r
377 str z80pc,[cpucontext,#z80pc_pointer]\r
378.endif\r
379 mov r1,z80de, lsr #16\r
380.if DRZ80_FOR_PICODRIVE\r
381 bl pico_z80_write8\r
382.else\r
383 mov lr,pc\r
384 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
385 ldmfd sp!,{r3,r12}\r
386.endif\r
387.endm\r
388;@---------------------------------------\r
389\r
390.macro rebasepc\r
391.if UPDATE_CONTEXT\r
392 str z80pc,[cpucontext,#z80pc_pointer]\r
393.endif\r
394.if DRZ80_FOR_PICODRIVE\r
395 bic r0,r0,#0xfe000\r
396 ldr r1,[cpucontext,#z80pc_base]\r
397 add z80pc,r1,r0\r
398.else\r
399 stmfd sp!,{r3,r12}\r
400 mov lr,pc\r
401 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
402 ldmfd sp!,{r3,r12}\r
403 mov z80pc,r0\r
404.endif\r
405.endm\r
406\r
407.macro rebasesp\r
408.if UPDATE_CONTEXT\r
409 str z80pc,[cpucontext,#z80pc_pointer]\r
410.endif\r
411.if DRZ80_FOR_PICODRIVE\r
412 bic r0,r0,#0xfe000\r
413 ldr r1,[cpucontext,#z80sp_base]\r
414 add r0,r1,r0\r
415.else\r
416 stmfd sp!,{r3,r12}\r
417 mov lr,pc\r
418 ldr pc,[cpucontext,#z80_rebaseSP] ;@ external function must rebase sp\r
419 ldmfd sp!,{r3,r12}\r
420.endif\r
421.endm\r
422;@----------------------------------------------------------------------------\r
423\r
424.macro opADC\r
425 movs z80f,z80f,lsr#2 ;@ get C\r
426 subcs r0,r0,#0x100\r
427 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of half carry\r
428 adcs z80a,z80a,r0,ror#8\r
429 mrs r0,cpsr ;@ S,Z,V&C\r
430 eor z80f,z80f,z80a,lsr#24\r
431 and z80f,z80f,#1<<HFlag ;@ H, correct\r
432 orr z80f,z80f,r0,lsr#28\r
433.endm\r
434\r
435.macro opADCA\r
436 movs z80f,z80f,lsr#2 ;@ get C\r
437 orrcs z80a,z80a,#0x00800000\r
438 adds z80a,z80a,z80a\r
439 mrs z80f,cpsr ;@ S,Z,V&C\r
440 mov z80f,z80f,lsr#28\r
441 tst z80a,#0x10000000 ;@ H, correct\r
442 orrne z80f,z80f,#1<<HFlag\r
443 fetch 4\r
444.endm\r
445\r
446.macro opADCH reg\r
447 mov r0,\reg,lsr#24\r
448 opADC\r
449 fetch 4\r
450.endm\r
451\r
452.macro opADCL reg\r
453 movs z80f,z80f,lsr#2 ;@ get C\r
454 adc r0,\reg,\reg,lsr#15\r
455 orrcs z80a,z80a,#0x00800000\r
456 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
457 adds z80a,z80a,r0,lsl#23\r
458 mrs z80f,cpsr ;@ S,Z,V&C\r
459 mov z80f,z80f,lsr#28\r
460 cmn r1,r0,lsl#27\r
461 orrcs z80f,z80f,#1<<HFlag ;@ H, correct\r
462 fetch 4\r
463.endm\r
464\r
465.macro opADCb\r
466 opADC\r
467.endm\r
468;@---------------------------------------\r
469\r
470.macro opADD reg shift\r
471 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
472 adds z80a,z80a,\reg,lsl#\shift\r
473 mrs z80f,cpsr ;@ S,Z,V&C\r
474 mov z80f,z80f,lsr#28\r
475 cmn r1,\reg,lsl#\shift+4\r
476 orrcs z80f,z80f,#1<<HFlag\r
477.endm\r
478\r
479.macro opADDA\r
480 adds z80a,z80a,z80a\r
481 mrs z80f,cpsr ;@ S,Z,V&C\r
482 mov z80f,z80f,lsr#28\r
483 tst z80a,#0x10000000 ;@ H, correct\r
484 orrne z80f,z80f,#1<<HFlag\r
485 fetch 4\r
486.endm\r
487\r
488.macro opADDH reg\r
489 and r0,\reg,#0xFF000000\r
490 opADD r0 0\r
491 fetch 4\r
492.endm\r
493\r
494.macro opADDL reg\r
495 opADD \reg 8\r
496 fetch 4\r
497.endm\r
498\r
499.macro opADDb \r
500 opADD r0 24\r
501.endm\r
502;@---------------------------------------\r
503\r
504.macro opADC16 reg\r
505 movs z80f,z80f,lsr#2 ;@ get C\r
506 adc r0,z80a,\reg,lsr#15\r
507 orrcs z80hl,z80hl,#0x00008000\r
508 mov r1,z80hl,lsl#4\r
509 adds z80hl,z80hl,r0,lsl#15\r
510 mrs z80f,cpsr ;@ S, Z, V & C\r
511 mov z80f,z80f,lsr#28\r
512 cmn r1,r0,lsl#19\r
513 orrcs z80f,z80f,#1<<HFlag\r
514 fetch 15\r
515.endm\r
516\r
517.macro opADC16HL\r
518 movs z80f,z80f,lsr#2 ;@ get C\r
519 orrcs z80hl,z80hl,#0x00008000\r
520 adds z80hl,z80hl,z80hl\r
521 mrs z80f,cpsr ;@ S, Z, V & C\r
522 mov z80f,z80f,lsr#28\r
523 tst z80hl,#0x10000000 ;@ H, correct.\r
524 orrne z80f,z80f,#1<<HFlag\r
525 fetch 15\r
526.endm\r
527\r
528.macro opADD16 reg1 reg2\r
529 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
530 adds \reg1,\reg1,\reg2\r
531 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
532 orrcs z80f,z80f,#1<<CFlag\r
533 cmn r1,\reg2,lsl#4\r
534 orrcs z80f,z80f,#1<<HFlag\r
535.endm\r
536\r
537.macro opADD16s reg1 reg2 shift\r
538 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
539 adds \reg1,\reg1,\reg2,lsl#\shift\r
540 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
541 orrcs z80f,z80f,#1<<CFlag\r
542 cmn r1,\reg2,lsl#4+\shift\r
543 orrcs z80f,z80f,#1<<HFlag\r
544.endm\r
545\r
546.macro opADD16_2 reg\r
547 adds \reg,\reg,\reg\r
548 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
549 orrcs z80f,z80f,#1<<CFlag\r
550 tst \reg,#0x10000000 ;@ H, correct.\r
551 orrne z80f,z80f,#1<<HFlag\r
552.endm\r
553;@---------------------------------------\r
554\r
555.macro opAND reg shift\r
556 and z80a,z80a,\reg,lsl#\shift\r
557 sub r0,opcodes,#0x100\r
558 ldrb z80f,[r0,z80a, lsr #24]\r
559 orr z80f,z80f,#1<<HFlag\r
560.endm\r
561\r
562.macro opANDA\r
563 sub r0,opcodes,#0x100\r
564 ldrb z80f,[r0,z80a, lsr #24]\r
565 orr z80f,z80f,#1<<HFlag\r
566 fetch 4\r
567.endm\r
568\r
569.macro opANDH reg\r
570 opAND \reg 0\r
571 fetch 4\r
572.endm\r
573\r
574.macro opANDL reg\r
575 opAND \reg 8\r
576 fetch 4\r
577.endm\r
578\r
579.macro opANDb\r
580 opAND r0 24\r
581.endm\r
582;@---------------------------------------\r
583\r
584.macro opBITH reg bit\r
585 and z80f,z80f,#1<<CFlag\r
586 tst \reg,#1<<(24+\bit)\r
587 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
588 orrne z80f,z80f,#(1<<HFlag)\r
589 fetch 8\r
590.endm\r
591\r
592.macro opBIT7H reg\r
593 and z80f,z80f,#1<<CFlag\r
594 tst \reg,#1<<(24+7)\r
595 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
596 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
597 fetch 8\r
598.endm\r
599\r
600.macro opBITL reg bit\r
601 and z80f,z80f,#1<<CFlag\r
602 tst \reg,#1<<(16+\bit)\r
603 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
604 orrne z80f,z80f,#(1<<HFlag)\r
605 fetch 8\r
606.endm\r
607\r
608.macro opBIT7L reg\r
609 and z80f,z80f,#1<<CFlag\r
610 tst \reg,#1<<(16+7)\r
611 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
612 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
613 fetch 8\r
614.endm\r
615\r
616.macro opBITb bit\r
617 and z80f,z80f,#1<<CFlag\r
618 tst r0,#1<<\bit\r
619 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
620 orrne z80f,z80f,#(1<<HFlag)\r
621.endm\r
622\r
623.macro opBIT7b\r
624 and z80f,z80f,#1<<CFlag\r
625 tst r0,#1<<7\r
626 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
627 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
628.endm\r
629;@---------------------------------------\r
630\r
631.macro opCP reg shift\r
632 mov r1,z80a,lsl#4 ;@ prepare for check of half carry\r
633 cmp z80a,\reg,lsl#\shift\r
634 mrs z80f,cpsr\r
635 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
636 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
637 cmp r1,\reg,lsl#\shift+4\r
638 orrcc z80f,z80f,#1<<HFlag\r
639.endm\r
640\r
641.macro opCPA\r
642 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
643 fetch 4\r
644.endm\r
645\r
646.macro opCPH reg\r
647 and r0,\reg,#0xFF000000\r
648 opCP r0 0\r
649 fetch 4\r
650.endm\r
651\r
652.macro opCPL reg\r
653 opCP \reg 8\r
654 fetch 4\r
655.endm\r
656\r
657.macro opCPb\r
658 opCP r0 24\r
659.endm\r
660;@---------------------------------------\r
661\r
662.macro opDEC8 reg ;@for A and memory\r
663 and z80f,z80f,#1<<CFlag ;@save carry\r
664 orr z80f,z80f,#1<<NFlag ;@set n\r
665 tst \reg,#0x0f000000\r
666 orreq z80f,z80f,#1<<HFlag\r
667 subs \reg,\reg,#0x01000000\r
668 orrmi z80f,z80f,#1<<SFlag\r
669 orrvs z80f,z80f,#1<<VFlag\r
670 orreq z80f,z80f,#1<<ZFlag\r
671.endm\r
672\r
673.macro opDEC8H reg ;@for B, D & H\r
674 and z80f,z80f,#1<<CFlag ;@save carry\r
675 orr z80f,z80f,#1<<NFlag ;@set n\r
676 tst \reg,#0x0f000000\r
677 orreq z80f,z80f,#1<<HFlag\r
678 subs \reg,\reg,#0x01000000\r
679 orrmi z80f,z80f,#1<<SFlag\r
680 orrvs z80f,z80f,#1<<VFlag\r
681 tst \reg,#0xff000000 ;@Z\r
682 orreq z80f,z80f,#1<<ZFlag\r
683.endm\r
684\r
685.macro opDEC8L reg ;@for C, E & L\r
686 mov \reg,\reg,ror#24\r
687 opDEC8H \reg\r
688 mov \reg,\reg,ror#8\r
689.endm\r
690\r
691.macro opDEC8b ;@for memory\r
692 mov r0,r0,lsl#24\r
693 opDEC8 r0\r
694 mov r0,r0,lsr#24\r
695.endm\r
696;@---------------------------------------\r
697\r
698.macro opIN\r
699 stmfd sp!,{r3,r12}\r
700 mov lr,pc\r
701 ldr pc,[cpucontext,#z80_in] ;@ r0=port - data returned in r0\r
702 ldmfd sp!,{r3,r12}\r
703.endm\r
704\r
705.macro opIN_C\r
706 mov r0,z80bc, lsr #16\r
707 opIN\r
708.endm\r
709;@---------------------------------------\r
710\r
711.macro opINC8 reg ;@for A and memory\r
712 and z80f,z80f,#1<<CFlag ;@save carry, clear n\r
713 adds \reg,\reg,#0x01000000\r
714 orrmi z80f,z80f,#1<<SFlag\r
715 orrvs z80f,z80f,#1<<VFlag\r
716 orrcs z80f,z80f,#1<<ZFlag ;@cs when going from 0xFF to 0x00\r
717 tst \reg,#0x0f000000\r
718 orreq z80f,z80f,#1<<HFlag\r
719.endm\r
720\r
721.macro opINC8H reg ;@for B, D & H\r
722 opINC8 \reg\r
723.endm\r
724\r
725.macro opINC8L reg ;@for C, E & L\r
726 mov \reg,\reg,ror#24\r
727 opINC8 \reg\r
728 mov \reg,\reg,ror#8\r
729.endm\r
730\r
731.macro opINC8b ;@for memory\r
732 mov r0,r0,lsl#24\r
733 opINC8 r0\r
734 mov r0,r0,lsr#24\r
735.endm\r
736;@---------------------------------------\r
737\r
738.macro opOR reg shift\r
739 orr z80a,z80a,\reg,lsl#\shift\r
740 sub r0,opcodes,#0x100\r
741 ldrb z80f,[r0,z80a, lsr #24]\r
742.endm\r
743\r
744.macro opORA\r
745 sub r0,opcodes,#0x100\r
746 ldrb z80f,[r0,z80a, lsr #24]\r
747 fetch 4\r
748.endm\r
749\r
750.macro opORH reg\r
751 and r0,\reg,#0xFF000000\r
752 opOR r0 0\r
753 fetch 4\r
754.endm\r
755\r
756.macro opORL reg\r
757 opOR \reg 8\r
758 fetch 4\r
759.endm\r
760\r
761.macro opORb\r
762 opOR r0 24\r
763.endm\r
764;@---------------------------------------\r
765\r
766.macro opOUT\r
767 stmfd sp!,{r3,r12}\r
768 mov lr,pc\r
769 ldr pc,[cpucontext,#z80_out] ;@ r0=port r1=data\r
770 ldmfd sp!,{r3,r12}\r
771.endm\r
772\r
773.macro opOUT_C\r
774 mov r0,z80bc, lsr #16\r
775 opOUT\r
776.endm\r
777;@---------------------------------------\r
778\r
779.macro opPOP\r
780.if FAST_Z80SP\r
781.if DRZ80_FOR_PICODRIVE\r
782 @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
783 ldr r2,[cpucontext,#z80sp_base]\r
784 ldrb r0,[z80sp],#1\r
785 add r2,r2,#0x2000\r
786 cmp z80sp,r2\r
787@ subge z80sp,z80sp,#0x2000 @ unstable?\r
788 ldrb r1,[z80sp],#1\r
789 cmp z80sp,r2\r
790@ subge z80sp,z80sp,#0x2000\r
791 orr r0,r0,r1, lsl #8\r
792.else\r
793 ldrb r0,[z80sp],#1\r
794 ldrb r1,[z80sp],#1\r
795 orr r0,r0,r1, lsl #8\r
796.endif\r
797.else\r
798 mov r0,z80sp\r
799 readmem16\r
800 add z80sp,z80sp,#2\r
801.endif\r
802.endm\r
803\r
804.macro opPOPreg reg\r
805 opPOP\r
806 mov \reg,r0, lsl #16\r
807 fetch 10\r
808.endm\r
809;@---------------------------------------\r
810\r
811.macro opPUSHareg reg @ reg > r1\r
812.if FAST_Z80SP\r
813.if DRZ80_FOR_PICODRIVE\r
814 @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
815 ldr r0,[cpucontext,#z80sp_base]\r
816 cmp z80sp,r0\r
817 addle z80sp,z80sp,#0x2000\r
818 mov r1,\reg, lsr #8\r
819 strb r1,[z80sp,#-1]!\r
820 cmp z80sp,r0\r
821 addle z80sp,z80sp,#0x2000\r
822 strb \reg,[z80sp,#-1]!\r
823.else\r
824 mov r1,\reg, lsr #8\r
825 strb r1,[z80sp,#-1]!\r
826 strb \reg,[z80sp,#-1]!\r
827.endif\r
828.else\r
829 mov r0,\reg\r
830 sub z80sp,z80sp,#2\r
831 mov r1,z80sp\r
832 writemem16\r
833.endif\r
834.endm\r
835\r
836.macro opPUSHreg reg\r
837.if FAST_Z80SP\r
838.if DRZ80_FOR_PICODRIVE\r
839 ldr r0,[cpucontext,#z80sp_base]\r
840 cmp z80sp,r0\r
841 addle z80sp,z80sp,#0x2000\r
842 mov r1,\reg, lsr #24\r
843 strb r1,[z80sp,#-1]!\r
844 cmp z80sp,r0\r
845 addle z80sp,z80sp,#0x2000\r
846 mov r1,\reg, lsr #16\r
847 strb r1,[z80sp,#-1]!\r
848.else\r
849 mov r1,\reg, lsr #24\r
850 strb r1,[z80sp,#-1]!\r
851 mov r1,\reg, lsr #16\r
852 strb r1,[z80sp,#-1]!\r
853.endif\r
854.else\r
855 mov r0,\reg,lsr #16\r
856 sub z80sp,z80sp,#2\r
857 mov r1,z80sp\r
858 writemem16\r
859.endif\r
860.endm\r
861;@---------------------------------------\r
862\r
863.macro opRESmemHL bit\r
864.if DRZ80_FOR_PICODRIVE\r
865 mov r0,z80hl, lsr #16\r
866 bl pico_z80_read8\r
867 bic r0,r0,#1<<\bit\r
868 mov r1,z80hl, lsr #16\r
869 bl pico_z80_write8\r
870.else\r
871 mov r0,z80hl, lsr #16\r
872 stmfd sp!,{r3,r12}\r
873 mov lr,pc\r
874 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
875 bic r0,r0,#1<<\bit\r
876 mov r1,z80hl, lsr #16\r
877 mov lr,pc\r
878 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
879 ldmfd sp!,{r3,r12}\r
880.endif\r
881 fetch 15\r
882.endm\r
883;@---------------------------------------\r
884\r
885.macro opRESmem bit\r
886.if DRZ80_FOR_PICODRIVE\r
887 stmfd sp!,{r0} ;@ save addr as well\r
888 bl pico_z80_read8\r
889 bic r0,r0,#1<<\bit\r
890 ldmfd sp!,{r1} ;@ restore addr into r1\r
891 bl pico_z80_write8\r
892.else\r
893 stmfd sp!,{r3,r12}\r
894 stmfd sp!,{r0} ;@ save addr as well\r
895 mov lr,pc\r
896 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
897 bic r0,r0,#1<<\bit\r
898 ldmfd sp!,{r1} ;@ restore addr into r1\r
899 mov lr,pc\r
900 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
901 ldmfd sp!,{r3,r12}\r
902.endif\r
903 fetch 23\r
904.endm\r
905;@---------------------------------------\r
906\r
907.macro opRL reg1 reg2 shift\r
908 movs \reg1,\reg2,lsl \shift\r
909 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
910 orrne \reg1,\reg1,#0x01000000\r
911;@ and r2,z80f,#1<<CFlag\r
912;@ orr $x,$x,r2,lsl#23\r
913 sub r1,opcodes,#0x100\r
914 ldrb z80f,[r1,\reg1,lsr#24] ;@get PZS\r
915 orrcs z80f,z80f,#1<<CFlag\r
916.endm\r
917\r
918.macro opRLA\r
919 opRL z80a, z80a, #1\r
920 fetch 8\r
921.endm\r
922\r
923.macro opRLH reg\r
924 and r0,\reg,#0xFF000000 ;@mask high to r0\r
925 adds \reg,\reg,r0\r
926 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
927 orrne \reg,\reg,#0x01000000\r
928 sub r1,opcodes,#0x100\r
929 ldrb z80f,[r1,\reg,lsr#24] ;@get PZS\r
930 orrcs z80f,z80f,#1<<CFlag\r
931 fetch 8\r
932.endm\r
933\r
934.macro opRLL reg\r
935 opRL r0, \reg, #9\r
936 and \reg,\reg,#0xFF000000 ;@mask out high\r
937 orr \reg,\reg,r0,lsr#8\r
938 fetch 8\r
939.endm\r
940\r
941.macro opRLb\r
942 opRL r0, r0, #25\r
943 mov r0,r0,lsr#24\r
944.endm\r
945;@---------------------------------------\r
946\r
947.macro opRLC reg1 reg2 shift\r
948 movs \reg1,\reg2,lsl#\shift\r
949 orrcs \reg1,\reg1,#0x01000000\r
950 sub r1,opcodes,#0x100\r
951 ldrb z80f,[r1,\reg1,lsr#24]\r
952 orrcs z80f,z80f,#1<<CFlag\r
953.endm\r
954\r
955.macro opRLCA\r
956 opRLC z80a, z80a, 1\r
957 fetch 8\r
958.endm\r
959\r
960.macro opRLCH reg\r
961 and r0,\reg,#0xFF000000 ;@mask high to r0\r
962 adds \reg,\reg,r0\r
963 orrcs \reg,\reg,#0x01000000\r
964 sub r1,opcodes,#0x100\r
965 ldrb z80f,[r1,\reg,lsr#24]\r
966 orrcs z80f,z80f,#1<<CFlag\r
967 fetch 8\r
968.endm\r
969\r
970.macro opRLCL reg\r
971 opRLC r0, \reg, 9\r
972 and \reg,\reg,#0xFF000000 ;@mask out high\r
973 orr \reg,\reg,r0,lsr#8\r
974 fetch 8\r
975.endm\r
976\r
977.macro opRLCb\r
978 opRLC r0, r0, 25\r
979 mov r0,r0,lsr#24\r
980.endm\r
981;@---------------------------------------\r
982\r
983.macro opRR reg1 reg2 shift\r
984 movs \reg1,\reg2,lsr#\shift\r
985 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
986 orrne \reg1,\reg1,#0x00000080\r
987;@ and r2,z80_f,#PSR_C\r
988;@ orr \reg1,\reg1,r2,lsl#6\r
989 sub r1,opcodes,#0x100\r
990 ldrb z80f,[r1,\reg1]\r
991 orrcs z80f,z80f,#1<<CFlag\r
992.endm\r
993\r
994.macro opRRA\r
995 orr z80a,z80a,z80f,lsr#1 ;@get C\r
996 movs z80a,z80a,ror#25\r
997 mov z80a,z80a,lsl#24\r
998 sub r1,opcodes,#0x100\r
999 ldrb z80f,[r1,z80a,lsr#24]\r
1000 orrcs z80f,z80f,#1<<CFlag\r
1001 fetch 8\r
1002.endm\r
1003\r
1004.macro opRRH reg\r
1005 orr r0,\reg,z80f,lsr#1 ;@get C\r
1006 movs r0,r0,ror#25\r
1007 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1008 orr \reg,\reg,r0,lsl#24\r
1009 sub r1,opcodes,#0x100\r
1010 ldrb z80f,[r1,\reg,lsr#24]\r
1011 orrcs z80f,z80f,#1<<CFlag\r
1012 fetch 8\r
1013.endm\r
1014\r
1015.macro opRRL reg\r
1016 and r0,\reg,#0x00FF0000 ;@mask out low to r0\r
1017 opRR r0 r0 17\r
1018 and \reg,\reg,#0xFF000000 ;@mask out high\r
1019 orr \reg,\reg,r0,lsl#16\r
1020 fetch 8\r
1021.endm\r
1022\r
1023.macro opRRb\r
1024 opRR r0 r0 1\r
1025.endm\r
1026;@---------------------------------------\r
1027\r
1028.macro opRRC reg1 reg2 shift\r
1029 movs \reg1,\reg2,lsr#\shift\r
1030 orrcs \reg1,\reg1,#0x00000080\r
1031 sub r1,opcodes,#0x100\r
1032 ldrb z80f,[r1,\reg1]\r
1033 orrcs z80f,z80f,#1<<CFlag\r
1034.endm\r
1035\r
1036.macro opRRCA\r
1037 opRRC z80a, z80a, 25\r
1038 mov z80a,z80a,lsl#24\r
1039 fetch 8\r
1040.endm\r
1041\r
1042.macro opRRCH reg\r
1043 opRRC r0, \reg, 25\r
1044 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1045 orr \reg,\reg,r0,lsl#24\r
1046 fetch 8\r
1047.endm\r
1048\r
1049.macro opRRCL reg\r
1050 and r0,\reg,#0x00FF0000 ;@mask low to r0\r
1051 opRRC r0, r0, 17\r
1052 and \reg,\reg,#0xFF000000 ;@mask out high\r
1053 orr \reg,\reg,r0,lsl#16\r
1054 fetch 8\r
1055.endm\r
1056\r
1057.macro opRRCb\r
1058 opRRC r0, r0, 1\r
1059.endm\r
1060;@---------------------------------------\r
1061\r
1062.macro opRST addr\r
1063 ldr r0,[cpucontext,#z80pc_base]\r
1064 sub r2,z80pc,r0\r
1065 opPUSHareg r2\r
1066 mov r0,#\addr\r
1067 rebasepc\r
1068 fetch 11\r
1069.endm\r
1070;@---------------------------------------\r
1071\r
1072.macro opSBC\r
1073 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1074 movs z80f,z80f,lsr#2 ;@ get C\r
1075 subcc r0,r0,#0x100\r
1076 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of H\r
1077 sbcs z80a,z80a,r0,ror#8\r
1078 mrs r0,cpsr\r
1079 eor z80f,z80f,z80a,lsr#24\r
1080 and z80f,z80f,#1<<HFlag ;@ H, correct\r
1081 orr z80f,z80f,r0,lsr#28 ;@ S,Z,V&C\r
1082 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1083.endm\r
1084\r
1085.macro opSBCA\r
1086 movs z80f,z80f,lsr#2 ;@ get C\r
1087 movcc z80a,#0x00000000\r
1088 movcs z80a,#0xFF000000\r
1089 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1090 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1091 fetch 4\r
1092.endm\r
1093\r
1094.macro opSBCH reg\r
1095 mov r0,\reg,lsr#24\r
1096 opSBC\r
1097 fetch 4\r
1098.endm\r
1099\r
1100.macro opSBCL reg\r
1101 mov r0,\reg,lsl#8\r
1102 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1103 movs z80f,z80f,lsr#2 ;@ get C\r
1104 sbccc r0,r0,#0xFF000000\r
1105 mov r1,z80a,lsl#4 ;@ prepare for check of H\r
1106 sbcs z80a,z80a,r0\r
1107 mrs z80f,cpsr\r
1108 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1109 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1110 cmp r1,r0,lsl#4\r
1111 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1112 fetch 4\r
1113.endm\r
1114\r
1115.macro opSBCb\r
1116 opSBC\r
1117.endm\r
1118;@---------------------------------------\r
1119\r
1120.macro opSBC16 reg\r
1121 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1122 movs z80f,z80f,lsr#2 ;@ get C\r
1123 sbc r1,r1,r1 ;@ set r1 to -1 or 0.\r
1124 orr r0,\reg,r1,lsr#16\r
1125 mov r1,z80hl,lsl#4 ;@ prepare for check of H\r
1126 sbcs z80hl,z80hl,r0\r
1127 mrs z80f,cpsr\r
1128 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1129 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1130 cmp r1,r0,lsl#4\r
1131 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1132 fetch 15\r
1133.endm\r
1134\r
1135.macro opSBC16HL\r
1136 movs z80f,z80f,lsr#2 ;@ get C\r
1137 mov z80hl,#0x00000000\r
1138 subcs z80hl,z80hl,#0x00010000\r
1139 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1140 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1141 fetch 15\r
1142.endm\r
1143;@---------------------------------------\r
1144\r
1145.macro opSETmemHL bit\r
1146.if DRZ80_FOR_PICODRIVE\r
1147 mov r0,z80hl, lsr #16\r
1148 bl pico_z80_read8\r
1149 orr r0,r0,#1<<\bit\r
1150 mov r1,z80hl, lsr #16\r
1151 bl pico_z80_write8\r
1152.else\r
1153 mov r0,z80hl, lsr #16\r
1154 stmfd sp!,{r3,r12}\r
1155 mov lr,pc\r
1156 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
1157 orr r0,r0,#1<<\bit\r
1158 mov r1,z80hl, lsr #16\r
1159 mov lr,pc\r
1160 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1161 ldmfd sp!,{r3,r12}\r
1162.endif\r
1163 fetch 15\r
1164.endm\r
1165;@---------------------------------------\r
1166\r
1167.macro opSETmem bit\r
1168.if DRZ80_FOR_PICODRIVE\r
1169 stmfd sp!,{r0} ;@ save addr as well\r
1170 bl pico_z80_read8\r
1171 orr r0,r0,#1<<\bit\r
1172 ldmfd sp!,{r1} ;@ restore addr into r1\r
1173 bl pico_z80_write8\r
1174.else\r
1175 stmfd sp!,{r3,r12}\r
1176 stmfd sp!,{r0} ;@ save addr as well\r
1177 mov lr,pc\r
1178 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
1179 orr r0,r0,#1<<\bit\r
1180 ldmfd sp!,{r1} ;@ restore addr into r1\r
1181 mov lr,pc\r
1182 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1183 ldmfd sp!,{r3,r12}\r
1184.endif\r
1185 fetch 23\r
1186.endm\r
1187;@---------------------------------------\r
1188\r
1189.macro opSLA reg1 reg2 shift\r
1190 movs \reg1,\reg2,lsl#\shift\r
1191 sub r1,opcodes,#0x100\r
1192 ldrb z80f,[r1,\reg1,lsr#24]\r
1193 orrcs z80f,z80f,#1<<CFlag\r
1194.endm\r
1195\r
1196.macro opSLAA\r
1197 opSLA z80a, z80a, 1\r
1198 fetch 8\r
1199.endm\r
1200\r
1201.macro opSLAH reg\r
1202 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1203 adds \reg,\reg,r0\r
1204 sub r1,opcodes,#0x100\r
1205 ldrb z80f,[r1,\reg,lsr#24]\r
1206 orrcs z80f,z80f,#1<<CFlag\r
1207 fetch 8\r
1208.endm\r
1209\r
1210.macro opSLAL reg\r
1211 opSLA r0, \reg, 9\r
1212 and \reg,\reg,#0xFF000000 ;@mask out high\r
1213 orr \reg,\reg,r0,lsr#8\r
1214 fetch 8\r
1215.endm\r
1216\r
1217.macro opSLAb\r
1218 opSLA r0, r0, 25\r
1219 mov r0,r0,lsr#24\r
1220.endm\r
1221;@---------------------------------------\r
1222\r
1223.macro opSLL reg1 reg2 shift\r
1224 movs \reg1,\reg2,lsl#\shift\r
1225 orr \reg1,\reg1,#0x01000000\r
1226 sub r1,opcodes,#0x100\r
1227 ldrb z80f,[r1,\reg1,lsr#24]\r
1228 orrcs z80f,z80f,#1<<CFlag\r
1229.endm\r
1230\r
1231.macro opSLLA\r
1232 opSLL z80a, z80a, 1\r
1233 fetch 8\r
1234.endm\r
1235\r
1236.macro opSLLH reg\r
1237 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1238 adds \reg,\reg,r0\r
1239 orr \reg,\reg,#0x01000000\r
1240 sub r1,opcodes,#0x100\r
1241 ldrb z80f,[r1,\reg,lsr#24]\r
1242 orrcs z80f,z80f,#1<<CFlag\r
1243 fetch 8\r
1244.endm\r
1245\r
1246.macro opSLLL reg\r
1247 opSLL r0, \reg, 9\r
1248 and \reg,\reg,#0xFF000000 ;@mask out high\r
1249 orr \reg,\reg,r0,lsr#8\r
1250 fetch 8\r
1251.endm\r
1252\r
1253.macro opSLLb\r
1254 opSLL r0, r0, 25\r
1255 mov r0,r0,lsr#24\r
1256.endm\r
1257;@---------------------------------------\r
1258\r
1259.macro opSRA reg1 reg2\r
1260 movs \reg1,\reg2,asr#25\r
1261 and \reg1,\reg1,#0xFF\r
1262 sub r1,opcodes,#0x100\r
1263 ldrb z80f,[r1,\reg1]\r
1264 orrcs z80f,z80f,#1<<CFlag\r
1265.endm\r
1266\r
1267.macro opSRAA\r
1268 movs r0,z80a,asr#25\r
1269 mov z80a,r0,lsl#24\r
1270 sub r1,opcodes,#0x100\r
1271 ldrb z80f,[r1,z80a,lsr#24]\r
1272 orrcs z80f,z80f,#1<<CFlag\r
1273 fetch 8\r
1274.endm\r
1275\r
1276.macro opSRAH reg\r
1277 movs r0,\reg,asr#25\r
1278 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1279 orr \reg,\reg,r0,lsl#24\r
1280 sub r1,opcodes,#0x100\r
1281 ldrb z80f,[r1,\reg,lsr#24]\r
1282 orrcs z80f,z80f,#1<<CFlag\r
1283 fetch 8\r
1284.endm\r
1285\r
1286.macro opSRAL reg\r
1287 mov r0,\reg,lsl#8\r
1288 opSRA r0, r0\r
1289 and \reg,\reg,#0xFF000000 ;@mask out high\r
1290 orr \reg,\reg,r0,lsl#16\r
1291 fetch 8\r
1292.endm\r
1293\r
1294.macro opSRAb\r
1295 mov r0,r0,lsl#24\r
1296 opSRA r0, r0\r
1297.endm\r
1298;@---------------------------------------\r
1299\r
1300.macro opSRL reg1 reg2 shift\r
1301 movs \reg1,\reg2,lsr#\shift\r
1302 sub r1,opcodes,#0x100\r
1303 ldrb z80f,[r1,\reg1]\r
1304 orrcs z80f,z80f,#1<<CFlag\r
1305.endm\r
1306\r
1307.macro opSRLA\r
1308 opSRL z80a, z80a, 25\r
1309 mov z80a,z80a,lsl#24\r
1310 fetch 8\r
1311.endm\r
1312\r
1313.macro opSRLH reg\r
1314 opSRL r0, \reg, 25\r
1315 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1316 orr \reg,\reg,r0,lsl#24\r
1317 fetch 8\r
1318.endm\r
1319\r
1320.macro opSRLL reg\r
1321 mov r0,\reg,lsl#8\r
1322 opSRL r0, r0, 25\r
1323 and \reg,\reg,#0xFF000000 ;@mask out high\r
1324 orr \reg,\reg,r0,lsl#16\r
1325 fetch 8\r
1326.endm\r
1327\r
1328.macro opSRLb\r
1329 opSRL r0, r0, 1\r
1330.endm\r
1331;@---------------------------------------\r
1332\r
1333.macro opSUB reg shift\r
1334 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
1335 subs z80a,z80a,\reg,lsl#\shift\r
1336 mrs z80f,cpsr\r
1337 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1338 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
1339 cmp r1,\reg,lsl#\shift+4\r
1340 orrcc z80f,z80f,#1<<HFlag\r
1341.endm\r
1342\r
1343.macro opSUBA\r
1344 mov z80a,#0\r
1345 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
1346 fetch 4\r
1347.endm\r
1348\r
1349.macro opSUBH reg\r
1350 and r0,\reg,#0xFF000000\r
1351 opSUB r0, 0\r
1352 fetch 4\r
1353.endm\r
1354\r
1355.macro opSUBL reg\r
1356 opSUB \reg, 8\r
1357 fetch 4\r
1358.endm\r
1359\r
1360.macro opSUBb\r
1361 opSUB r0, 24\r
1362.endm\r
1363;@---------------------------------------\r
1364\r
1365.macro opXOR reg shift\r
1366 eor z80a,z80a,\reg,lsl#\shift\r
1367 sub r0,opcodes,#0x100\r
1368 ldrb z80f,[r0,z80a, lsr #24]\r
1369.endm\r
1370\r
1371.macro opXORA\r
1372 mov z80a,#0\r
1373 mov z80f,#(1<<ZFlag)|(1<<VFlag)\r
1374 fetch 4\r
1375.endm\r
1376\r
1377.macro opXORH reg\r
1378 and r0,\reg,#0xFF000000\r
1379 opXOR r0, 0\r
1380 fetch 4\r
1381.endm\r
1382\r
1383.macro opXORL reg\r
1384 opXOR \reg, 8\r
1385 fetch 4\r
1386.endm\r
1387\r
1388.macro opXORb\r
1389 opXOR r0, 24\r
1390.endm\r
1391;@---------------------------------------\r
1392\r
1393\r
1394;@ --------------------------- Framework --------------------------\r
1395 \r
1396.text\r
1397\r
1398DrZ80Run:\r
1399 ;@ r0 = pointer to cpu context\r
1400 ;@ r1 = ISTATES to execute \r
1401 ;@######################################### \r
1402 stmdb sp!,{r4-r12,lr} ;@ save registers on stack\r
1403 mov cpucontext,r0 ;@ setup main memory pointer\r
1404 mov z80_icount,r1 ;@ setup number of Tstates to execute\r
1405\r
1406.if INTERRUPT_MODE == 0\r
1407 ldrh r0,[cpucontext,#z80irq] @ 0x4C\r
1408.endif\r
1409 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1410\r
1411.if INTERRUPT_MODE == 0\r
1412 ;@ check ints\r
1413 tst r0,#1\r
1414 movnes r0,r0,lsr #8\r
1415 blne DoInterrupt\r
1416.endif\r
1417\r
1418 ldrb r0,[z80pc],#1 ;@ get first op code\r
1419 ldr opcodes,MAIN_opcodes_POINTER2\r
1420 ldr pc,[opcodes,r0, lsl #2] ;@ execute op code\r
1421\r
1422MAIN_opcodes_POINTER2: .word MAIN_opcodes\r
1423\r
1424\r
1425z80_execute_end:\r
1426 ;@ save registers in CPU context\r
1427 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1428 mov r0,z80_icount\r
1429 ldmia sp!,{r4-r12,pc} ;@ restore registers from stack and return to C code\r
1430\r
1431.if INTERRUPT_MODE\r
1432Interrupt_local: .word Interrupt\r
1433.endif\r
1434\r
1435DoInterrupt:\r
1436.if INTERRUPT_MODE\r
1437 ;@ Don't do own int handler, call mames instead\r
1438\r
1439 ;@ save everything back into DrZ80 context\r
1440 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1441 stmfd sp!,{r3,r4,r5,lr} ;@ save rest of regs on stack\r
1442 mov lr,pc\r
1443 ldr pc,Interrupt_local\r
1444 ldmfd sp!,{r3,r4,r5,lr} ;@ load regs from stack\r
1445 ;@ reload regs from DrZ80 context\r
1446 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1447 mov pc,lr ;@ return\r
1448.else\r
1449 stmfd sp!,{lr}\r
1450\r
1451 tst r0,#4 ;@ check halt\r
1452 addne z80pc,z80pc,#1\r
1453\r
1454 ldrb r1,[cpucontext,#z80im]\r
1455\r
1456 ;@ clear halt and int flags\r
1457 eor r0,r0,r0\r
1458 strb r0,[cpucontext,#z80if]\r
1459\r
1460 ;@ now check int mode\r
1461 tst r1,#1\r
1462 bne DoInterrupt_mode1\r
1463 tst r1,#2\r
1464 bne DoInterrupt_mode2\r
1465 b DoInterrupt_mode0\r
1466\r
1467DoInterrupt_mode0:\r
1468 ;@ get 3 byte vector\r
1469 ldr r2,[cpucontext, #z80irqvector]\r
1470 and r1,r2,#0xFF0000\r
1471 cmp r1,#0xCD0000 ;@ call\r
1472 bne 1f\r
1473 ;@ ########\r
1474 ;@ # call\r
1475 ;@ ########\r
1476 ;@ save current pc on stack\r
1477 ldr r0,[cpucontext,#z80pc_base]\r
1478 sub r0,z80pc,r0\r
1479.if FAST_Z80SP\r
1480 mov r1,r0, lsr #8\r
1481 strb r1,[z80sp,#-1]!\r
1482 strb r0,[z80sp,#-1]!\r
1483.else\r
1484 sub z80sp,z80sp,#2\r
1485 mov r1,z80sp\r
1486 writemem16\r
1487 ldr r2,[cpucontext, #z80irqvector]\r
1488.endif\r
1489 ;@ jump to vector\r
1490 mov r2,r2,lsl#16\r
1491 mov r0,r2,lsr#16\r
1492 ;@ rebase new pc\r
1493 rebasepc\r
1494\r
1495 b DoInterrupt_end\r
1496\r
14971:\r
1498 cmp r1,#0xC30000 ;@ jump\r
1499 bne DoInterrupt_mode1 ;@ rst\r
1500 ;@ #######\r
1501 ;@ # jump\r
1502 ;@ #######\r
1503 ;@ jump to vector\r
1504 mov r2,r2,lsl#16\r
1505 mov r0,r2,lsr#16\r
1506 ;@ rebase new pc\r
1507 rebasepc\r
1508\r
1509 b DoInterrupt_end\r
1510\r
1511DoInterrupt_mode1:\r
1512 ldr r0,[cpucontext,#z80pc_base]\r
1513 sub r2,z80pc,r0\r
1514 opPUSHareg r2\r
1515 mov r0,#0x38\r
1516 rebasepc\r
1517\r
1518 b DoInterrupt_end\r
1519\r
1520DoInterrupt_mode2:\r
1521 ;@ push pc on stack\r
1522 ldr r0,[cpucontext,#z80pc_base]\r
1523 sub r2,z80pc,r0\r
1524 opPUSHareg r2\r
1525\r
1526 ;@ get 1 byte vector address\r
1527 ldrb r0,[cpucontext, #z80irqvector]\r
1528 ldr r1,[cpucontext, #z80i]\r
1529 orr r0,r0,r1,lsr#16\r
1530\r
1531 ;@ read new pc from vector address\r
1532.if DRZ80_FOR_PICODRIVE\r
1533 bl pico_z80_read16\r
1534 bic r0,r0,#0xfe000\r
1535 ldr r1,[cpucontext,#z80pc_base]\r
1536 add z80pc,r1,r0\r
1537.if UPDATE_CONTEXT\r
1538 str z80pc,[cpucontext,#z80pc_pointer]\r
1539.endif\r
1540.else\r
1541 stmfd sp!,{r3,r12}\r
1542 mov lr,pc\r
1543 ldr pc,[cpucontext,#z80_read16]\r
1544\r
1545 ;@ rebase new pc\r
1546.if UPDATE_CONTEXT\r
1547 str z80pc,[cpucontext,#z80pc_pointer]\r
1548.endif\r
1549 mov lr,pc\r
1550 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
1551 ldmfd sp!,{r3,r12}\r
1552 mov z80pc,r0 \r
1553.endif\r
1554\r
1555DoInterrupt_end:\r
1556 ;@ interupt accepted so callback irq interface\r
1557 ldr r0,[cpucontext, #z80irqcallback]\r
1558 tst r0,r0\r
1559 ldmeqfd sp!,{pc}\r
1560 stmfd sp!,{r3,r12}\r
1561 mov lr,pc\r
1562 mov pc,r0 ;@ call callback function\r
1563 ldmfd sp!,{r3,r12}\r
1564 ldmfd sp!,{pc} ;@ return\r
1565\r
1566.endif\r
1567\r
1568.data\r
1569.align 4\r
1570\r
1571DAATable: .hword (0x00<<8)|(1<<ZFlag)|(1<<VFlag)\r
1572 .hword (0x01<<8) \r
1573 .hword (0x02<<8) \r
1574 .hword (0x03<<8) |(1<<VFlag)\r
1575 .hword (0x04<<8) \r
1576 .hword (0x05<<8) |(1<<VFlag)\r
1577 .hword (0x06<<8) |(1<<VFlag)\r
1578 .hword (0x07<<8) \r
1579 .hword (0x08<<8) \r
1580 .hword (0x09<<8) |(1<<VFlag)\r
1581 .hword (0x10<<8) |(1<<HFlag) \r
1582 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
1583 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
1584 .hword (0x13<<8) |(1<<HFlag) \r
1585 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
1586 .hword (0x15<<8) |(1<<HFlag) \r
1587 .hword (0x10<<8) \r
1588 .hword (0x11<<8) |(1<<VFlag)\r
1589 .hword (0x12<<8) |(1<<VFlag)\r
1590 .hword (0x13<<8) \r
1591 .hword (0x14<<8) |(1<<VFlag)\r
1592 .hword (0x15<<8) \r
1593 .hword (0x16<<8) \r
1594 .hword (0x17<<8) |(1<<VFlag)\r
1595 .hword (0x18<<8) |(1<<VFlag)\r
1596 .hword (0x19<<8) \r
1597 .hword (0x20<<8) |(1<<HFlag) \r
1598 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
1599 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
1600 .hword (0x23<<8) |(1<<HFlag) \r
1601 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
1602 .hword (0x25<<8) |(1<<HFlag) \r
1603 .hword (0x20<<8) \r
1604 .hword (0x21<<8) |(1<<VFlag)\r
1605 .hword (0x22<<8) |(1<<VFlag)\r
1606 .hword (0x23<<8) \r
1607 .hword (0x24<<8) |(1<<VFlag)\r
1608 .hword (0x25<<8) \r
1609 .hword (0x26<<8) \r
1610 .hword (0x27<<8) |(1<<VFlag)\r
1611 .hword (0x28<<8) |(1<<VFlag)\r
1612 .hword (0x29<<8) \r
1613 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
1614 .hword (0x31<<8) |(1<<HFlag) \r
1615 .hword (0x32<<8) |(1<<HFlag) \r
1616 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
1617 .hword (0x34<<8) |(1<<HFlag) \r
1618 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
1619 .hword (0x30<<8) |(1<<VFlag)\r
1620 .hword (0x31<<8) \r
1621 .hword (0x32<<8) \r
1622 .hword (0x33<<8) |(1<<VFlag)\r
1623 .hword (0x34<<8) \r
1624 .hword (0x35<<8) |(1<<VFlag)\r
1625 .hword (0x36<<8) |(1<<VFlag)\r
1626 .hword (0x37<<8) \r
1627 .hword (0x38<<8) \r
1628 .hword (0x39<<8) |(1<<VFlag)\r
1629 .hword (0x40<<8) |(1<<HFlag) \r
1630 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
1631 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
1632 .hword (0x43<<8) |(1<<HFlag) \r
1633 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
1634 .hword (0x45<<8) |(1<<HFlag) \r
1635 .hword (0x40<<8) \r
1636 .hword (0x41<<8) |(1<<VFlag)\r
1637 .hword (0x42<<8) |(1<<VFlag)\r
1638 .hword (0x43<<8) \r
1639 .hword (0x44<<8) |(1<<VFlag)\r
1640 .hword (0x45<<8) \r
1641 .hword (0x46<<8) \r
1642 .hword (0x47<<8) |(1<<VFlag)\r
1643 .hword (0x48<<8) |(1<<VFlag)\r
1644 .hword (0x49<<8) \r
1645 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
1646 .hword (0x51<<8) |(1<<HFlag) \r
1647 .hword (0x52<<8) |(1<<HFlag) \r
1648 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
1649 .hword (0x54<<8) |(1<<HFlag) \r
1650 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
1651 .hword (0x50<<8) |(1<<VFlag)\r
1652 .hword (0x51<<8) \r
1653 .hword (0x52<<8) \r
1654 .hword (0x53<<8) |(1<<VFlag)\r
1655 .hword (0x54<<8) \r
1656 .hword (0x55<<8) |(1<<VFlag)\r
1657 .hword (0x56<<8) |(1<<VFlag)\r
1658 .hword (0x57<<8) \r
1659 .hword (0x58<<8) \r
1660 .hword (0x59<<8) |(1<<VFlag)\r
1661 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
1662 .hword (0x61<<8) |(1<<HFlag) \r
1663 .hword (0x62<<8) |(1<<HFlag) \r
1664 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
1665 .hword (0x64<<8) |(1<<HFlag) \r
1666 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
1667 .hword (0x60<<8) |(1<<VFlag)\r
1668 .hword (0x61<<8) \r
1669 .hword (0x62<<8) \r
1670 .hword (0x63<<8) |(1<<VFlag)\r
1671 .hword (0x64<<8) \r
1672 .hword (0x65<<8) |(1<<VFlag)\r
1673 .hword (0x66<<8) |(1<<VFlag)\r
1674 .hword (0x67<<8) \r
1675 .hword (0x68<<8) \r
1676 .hword (0x69<<8) |(1<<VFlag)\r
1677 .hword (0x70<<8) |(1<<HFlag) \r
1678 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
1679 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
1680 .hword (0x73<<8) |(1<<HFlag) \r
1681 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
1682 .hword (0x75<<8) |(1<<HFlag) \r
1683 .hword (0x70<<8) \r
1684 .hword (0x71<<8) |(1<<VFlag)\r
1685 .hword (0x72<<8) |(1<<VFlag)\r
1686 .hword (0x73<<8) \r
1687 .hword (0x74<<8) |(1<<VFlag)\r
1688 .hword (0x75<<8) \r
1689 .hword (0x76<<8) \r
1690 .hword (0x77<<8) |(1<<VFlag)\r
1691 .hword (0x78<<8) |(1<<VFlag)\r
1692 .hword (0x79<<8) \r
1693 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
1694 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1695 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1696 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
1697 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1698 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
1699 .hword (0x80<<8)|(1<<SFlag) \r
1700 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)\r
1701 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)\r
1702 .hword (0x83<<8)|(1<<SFlag) \r
1703 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)\r
1704 .hword (0x85<<8)|(1<<SFlag) \r
1705 .hword (0x86<<8)|(1<<SFlag) \r
1706 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
1707 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
1708 .hword (0x89<<8)|(1<<SFlag) \r
1709 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1710 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
1711 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
1712 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1713 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
1714 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1715 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)\r
1716 .hword (0x91<<8)|(1<<SFlag) \r
1717 .hword (0x92<<8)|(1<<SFlag) \r
1718 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)\r
1719 .hword (0x94<<8)|(1<<SFlag) \r
1720 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)\r
1721 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
1722 .hword (0x97<<8)|(1<<SFlag) \r
1723 .hword (0x98<<8)|(1<<SFlag) \r
1724 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
1725 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1726 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1727 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1728 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1729 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1730 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1731 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1732 .hword (0x01<<8) |(1<<CFlag)\r
1733 .hword (0x02<<8) |(1<<CFlag)\r
1734 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1735 .hword (0x04<<8) |(1<<CFlag)\r
1736 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1737 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1738 .hword (0x07<<8) |(1<<CFlag)\r
1739 .hword (0x08<<8) |(1<<CFlag)\r
1740 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1741 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1742 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1743 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1744 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1745 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1746 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
1747 .hword (0x10<<8) |(1<<CFlag)\r
1748 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
1749 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
1750 .hword (0x13<<8) |(1<<CFlag)\r
1751 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
1752 .hword (0x15<<8) |(1<<CFlag)\r
1753 .hword (0x16<<8) |(1<<CFlag)\r
1754 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
1755 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
1756 .hword (0x19<<8) |(1<<CFlag)\r
1757 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
1758 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1759 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1760 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
1761 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1762 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
1763 .hword (0x20<<8) |(1<<CFlag)\r
1764 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
1765 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
1766 .hword (0x23<<8) |(1<<CFlag)\r
1767 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
1768 .hword (0x25<<8) |(1<<CFlag)\r
1769 .hword (0x26<<8) |(1<<CFlag)\r
1770 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
1771 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
1772 .hword (0x29<<8) |(1<<CFlag)\r
1773 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1774 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
1775 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
1776 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1777 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
1778 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1779 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
1780 .hword (0x31<<8) |(1<<CFlag)\r
1781 .hword (0x32<<8) |(1<<CFlag)\r
1782 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
1783 .hword (0x34<<8) |(1<<CFlag)\r
1784 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
1785 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
1786 .hword (0x37<<8) |(1<<CFlag)\r
1787 .hword (0x38<<8) |(1<<CFlag)\r
1788 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
1789 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
1790 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1791 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1792 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
1793 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1794 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
1795 .hword (0x40<<8) |(1<<CFlag)\r
1796 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
1797 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
1798 .hword (0x43<<8) |(1<<CFlag)\r
1799 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
1800 .hword (0x45<<8) |(1<<CFlag)\r
1801 .hword (0x46<<8) |(1<<CFlag)\r
1802 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
1803 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
1804 .hword (0x49<<8) |(1<<CFlag)\r
1805 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1806 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
1807 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
1808 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1809 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
1810 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1811 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
1812 .hword (0x51<<8) |(1<<CFlag)\r
1813 .hword (0x52<<8) |(1<<CFlag)\r
1814 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
1815 .hword (0x54<<8) |(1<<CFlag)\r
1816 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
1817 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
1818 .hword (0x57<<8) |(1<<CFlag)\r
1819 .hword (0x58<<8) |(1<<CFlag)\r
1820 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
1821 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1822 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
1823 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
1824 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1825 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
1826 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1827 .hword (0x60<<8) |(1<<VFlag) |(1<<CFlag)\r
1828 .hword (0x61<<8) |(1<<CFlag)\r
1829 .hword (0x62<<8) |(1<<CFlag)\r
1830 .hword (0x63<<8) |(1<<VFlag) |(1<<CFlag)\r
1831 .hword (0x64<<8) |(1<<CFlag)\r
1832 .hword (0x65<<8) |(1<<VFlag) |(1<<CFlag)\r
1833 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
1834 .hword (0x67<<8) |(1<<CFlag)\r
1835 .hword (0x68<<8) |(1<<CFlag)\r
1836 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
1837 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
1838 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1839 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1840 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
1841 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1842 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
1843 .hword (0x70<<8) |(1<<CFlag)\r
1844 .hword (0x71<<8) |(1<<VFlag) |(1<<CFlag)\r
1845 .hword (0x72<<8) |(1<<VFlag) |(1<<CFlag)\r
1846 .hword (0x73<<8) |(1<<CFlag)\r
1847 .hword (0x74<<8) |(1<<VFlag) |(1<<CFlag)\r
1848 .hword (0x75<<8) |(1<<CFlag)\r
1849 .hword (0x76<<8) |(1<<CFlag)\r
1850 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
1851 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
1852 .hword (0x79<<8) |(1<<CFlag)\r
1853 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1854 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1855 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1856 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1857 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1858 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1859 .hword (0x80<<8)|(1<<SFlag) |(1<<CFlag)\r
1860 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1861 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1862 .hword (0x83<<8)|(1<<SFlag) |(1<<CFlag)\r
1863 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1864 .hword (0x85<<8)|(1<<SFlag) |(1<<CFlag)\r
1865 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
1866 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1867 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1868 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
1869 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1870 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1871 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1872 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1873 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1874 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1875 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1876 .hword (0x91<<8)|(1<<SFlag) |(1<<CFlag)\r
1877 .hword (0x92<<8)|(1<<SFlag) |(1<<CFlag)\r
1878 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1879 .hword (0x94<<8)|(1<<SFlag) |(1<<CFlag)\r
1880 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1881 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1882 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
1883 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
1884 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1885 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1886 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1887 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1888 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1889 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1890 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1891 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1892 .hword (0xA1<<8)|(1<<SFlag) |(1<<CFlag)\r
1893 .hword (0xA2<<8)|(1<<SFlag) |(1<<CFlag)\r
1894 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1895 .hword (0xA4<<8)|(1<<SFlag) |(1<<CFlag)\r
1896 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1897 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1898 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
1899 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
1900 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1901 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1902 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1903 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1904 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1905 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1906 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1907 .hword (0xB0<<8)|(1<<SFlag) |(1<<CFlag)\r
1908 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1909 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1910 .hword (0xB3<<8)|(1<<SFlag) |(1<<CFlag)\r
1911 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1912 .hword (0xB5<<8)|(1<<SFlag) |(1<<CFlag)\r
1913 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
1914 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1915 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1916 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
1917 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1918 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1919 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1920 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1921 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1922 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1923 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1924 .hword (0xC1<<8)|(1<<SFlag) |(1<<CFlag)\r
1925 .hword (0xC2<<8)|(1<<SFlag) |(1<<CFlag)\r
1926 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1927 .hword (0xC4<<8)|(1<<SFlag) |(1<<CFlag)\r
1928 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1929 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1930 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
1931 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
1932 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1933 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1934 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1935 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1936 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1937 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1938 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1939 .hword (0xD0<<8)|(1<<SFlag) |(1<<CFlag)\r
1940 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1941 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1942 .hword (0xD3<<8)|(1<<SFlag) |(1<<CFlag)\r
1943 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1944 .hword (0xD5<<8)|(1<<SFlag) |(1<<CFlag)\r
1945 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
1946 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1947 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1948 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
1949 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1950 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1951 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1952 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1953 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1954 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1955 .hword (0xE0<<8)|(1<<SFlag) |(1<<CFlag)\r
1956 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1957 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1958 .hword (0xE3<<8)|(1<<SFlag) |(1<<CFlag)\r
1959 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1960 .hword (0xE5<<8)|(1<<SFlag) |(1<<CFlag)\r
1961 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
1962 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1963 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1964 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
1965 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1966 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1967 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1968 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1969 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1970 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1971 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1972 .hword (0xF1<<8)|(1<<SFlag) |(1<<CFlag)\r
1973 .hword (0xF2<<8)|(1<<SFlag) |(1<<CFlag)\r
1974 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1975 .hword (0xF4<<8)|(1<<SFlag) |(1<<CFlag)\r
1976 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1977 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1978 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
1979 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
1980 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1981 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1982 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1983 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1984 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1985 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1986 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1987 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1988 .hword (0x01<<8) |(1<<CFlag)\r
1989 .hword (0x02<<8) |(1<<CFlag)\r
1990 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1991 .hword (0x04<<8) |(1<<CFlag)\r
1992 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1993 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1994 .hword (0x07<<8) |(1<<CFlag)\r
1995 .hword (0x08<<8) |(1<<CFlag)\r
1996 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1997 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1998 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1999 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2000 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2001 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2002 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2003 .hword (0x10<<8) |(1<<CFlag)\r
2004 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
2005 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
2006 .hword (0x13<<8) |(1<<CFlag)\r
2007 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
2008 .hword (0x15<<8) |(1<<CFlag)\r
2009 .hword (0x16<<8) |(1<<CFlag)\r
2010 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2011 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2012 .hword (0x19<<8) |(1<<CFlag)\r
2013 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2014 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2015 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2016 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2017 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2018 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2019 .hword (0x20<<8) |(1<<CFlag)\r
2020 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
2021 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
2022 .hword (0x23<<8) |(1<<CFlag)\r
2023 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
2024 .hword (0x25<<8) |(1<<CFlag)\r
2025 .hword (0x26<<8) |(1<<CFlag)\r
2026 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2027 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2028 .hword (0x29<<8) |(1<<CFlag)\r
2029 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2030 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2031 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2032 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2033 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2034 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2035 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
2036 .hword (0x31<<8) |(1<<CFlag)\r
2037 .hword (0x32<<8) |(1<<CFlag)\r
2038 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
2039 .hword (0x34<<8) |(1<<CFlag)\r
2040 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
2041 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2042 .hword (0x37<<8) |(1<<CFlag)\r
2043 .hword (0x38<<8) |(1<<CFlag)\r
2044 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2045 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2046 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2047 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2048 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2049 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2050 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2051 .hword (0x40<<8) |(1<<CFlag)\r
2052 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
2053 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
2054 .hword (0x43<<8) |(1<<CFlag)\r
2055 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
2056 .hword (0x45<<8) |(1<<CFlag)\r
2057 .hword (0x46<<8) |(1<<CFlag)\r
2058 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2059 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2060 .hword (0x49<<8) |(1<<CFlag)\r
2061 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2062 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2063 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2064 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2065 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2066 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2067 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
2068 .hword (0x51<<8) |(1<<CFlag)\r
2069 .hword (0x52<<8) |(1<<CFlag)\r
2070 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
2071 .hword (0x54<<8) |(1<<CFlag)\r
2072 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
2073 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2074 .hword (0x57<<8) |(1<<CFlag)\r
2075 .hword (0x58<<8) |(1<<CFlag)\r
2076 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2077 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2078 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2079 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2080 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2081 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2082 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2083 .hword (0x06<<8) |(1<<VFlag)\r
2084 .hword (0x07<<8) \r
2085 .hword (0x08<<8) \r
2086 .hword (0x09<<8) |(1<<VFlag)\r
2087 .hword (0x0A<<8) |(1<<VFlag)\r
2088 .hword (0x0B<<8) \r
2089 .hword (0x0C<<8) |(1<<VFlag)\r
2090 .hword (0x0D<<8) \r
2091 .hword (0x0E<<8) \r
2092 .hword (0x0F<<8) |(1<<VFlag)\r
2093 .hword (0x10<<8) |(1<<HFlag) \r
2094 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
2095 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
2096 .hword (0x13<<8) |(1<<HFlag) \r
2097 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
2098 .hword (0x15<<8) |(1<<HFlag) \r
2099 .hword (0x16<<8) \r
2100 .hword (0x17<<8) |(1<<VFlag)\r
2101 .hword (0x18<<8) |(1<<VFlag)\r
2102 .hword (0x19<<8) \r
2103 .hword (0x1A<<8) \r
2104 .hword (0x1B<<8) |(1<<VFlag)\r
2105 .hword (0x1C<<8) \r
2106 .hword (0x1D<<8) |(1<<VFlag)\r
2107 .hword (0x1E<<8) |(1<<VFlag)\r
2108 .hword (0x1F<<8) \r
2109 .hword (0x20<<8) |(1<<HFlag) \r
2110 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
2111 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
2112 .hword (0x23<<8) |(1<<HFlag) \r
2113 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
2114 .hword (0x25<<8) |(1<<HFlag) \r
2115 .hword (0x26<<8) \r
2116 .hword (0x27<<8) |(1<<VFlag)\r
2117 .hword (0x28<<8) |(1<<VFlag)\r
2118 .hword (0x29<<8) \r
2119 .hword (0x2A<<8) \r
2120 .hword (0x2B<<8) |(1<<VFlag)\r
2121 .hword (0x2C<<8) \r
2122 .hword (0x2D<<8) |(1<<VFlag)\r
2123 .hword (0x2E<<8) |(1<<VFlag)\r
2124 .hword (0x2F<<8) \r
2125 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
2126 .hword (0x31<<8) |(1<<HFlag) \r
2127 .hword (0x32<<8) |(1<<HFlag) \r
2128 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
2129 .hword (0x34<<8) |(1<<HFlag) \r
2130 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
2131 .hword (0x36<<8) |(1<<VFlag)\r
2132 .hword (0x37<<8) \r
2133 .hword (0x38<<8) \r
2134 .hword (0x39<<8) |(1<<VFlag)\r
2135 .hword (0x3A<<8) |(1<<VFlag)\r
2136 .hword (0x3B<<8) \r
2137 .hword (0x3C<<8) |(1<<VFlag)\r
2138 .hword (0x3D<<8) \r
2139 .hword (0x3E<<8) \r
2140 .hword (0x3F<<8) |(1<<VFlag)\r
2141 .hword (0x40<<8) |(1<<HFlag) \r
2142 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
2143 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
2144 .hword (0x43<<8) |(1<<HFlag) \r
2145 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
2146 .hword (0x45<<8) |(1<<HFlag) \r
2147 .hword (0x46<<8) \r
2148 .hword (0x47<<8) |(1<<VFlag)\r
2149 .hword (0x48<<8) |(1<<VFlag)\r
2150 .hword (0x49<<8) \r
2151 .hword (0x4A<<8) \r
2152 .hword (0x4B<<8) |(1<<VFlag)\r
2153 .hword (0x4C<<8) \r
2154 .hword (0x4D<<8) |(1<<VFlag)\r
2155 .hword (0x4E<<8) |(1<<VFlag)\r
2156 .hword (0x4F<<8) \r
2157 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
2158 .hword (0x51<<8) |(1<<HFlag) \r
2159 .hword (0x52<<8) |(1<<HFlag) \r
2160 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
2161 .hword (0x54<<8) |(1<<HFlag) \r
2162 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
2163 .hword (0x56<<8) |(1<<VFlag)\r
2164 .hword (0x57<<8) \r
2165 .hword (0x58<<8) \r
2166 .hword (0x59<<8) |(1<<VFlag)\r
2167 .hword (0x5A<<8) |(1<<VFlag)\r
2168 .hword (0x5B<<8) \r
2169 .hword (0x5C<<8) |(1<<VFlag)\r
2170 .hword (0x5D<<8) \r
2171 .hword (0x5E<<8) \r
2172 .hword (0x5F<<8) |(1<<VFlag)\r
2173 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
2174 .hword (0x61<<8) |(1<<HFlag) \r
2175 .hword (0x62<<8) |(1<<HFlag) \r
2176 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
2177 .hword (0x64<<8) |(1<<HFlag) \r
2178 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
2179 .hword (0x66<<8) |(1<<VFlag)\r
2180 .hword (0x67<<8) \r
2181 .hword (0x68<<8) \r
2182 .hword (0x69<<8) |(1<<VFlag)\r
2183 .hword (0x6A<<8) |(1<<VFlag)\r
2184 .hword (0x6B<<8) \r
2185 .hword (0x6C<<8) |(1<<VFlag)\r
2186 .hword (0x6D<<8) \r
2187 .hword (0x6E<<8) \r
2188 .hword (0x6F<<8) |(1<<VFlag)\r
2189 .hword (0x70<<8) |(1<<HFlag) \r
2190 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
2191 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
2192 .hword (0x73<<8) |(1<<HFlag) \r
2193 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
2194 .hword (0x75<<8) |(1<<HFlag) \r
2195 .hword (0x76<<8) \r
2196 .hword (0x77<<8) |(1<<VFlag)\r
2197 .hword (0x78<<8) |(1<<VFlag)\r
2198 .hword (0x79<<8) \r
2199 .hword (0x7A<<8) \r
2200 .hword (0x7B<<8) |(1<<VFlag)\r
2201 .hword (0x7C<<8) \r
2202 .hword (0x7D<<8) |(1<<VFlag)\r
2203 .hword (0x7E<<8) |(1<<VFlag)\r
2204 .hword (0x7F<<8) \r
2205 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
2206 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2207 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2208 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
2209 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2210 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
2211 .hword (0x86<<8)|(1<<SFlag) \r
2212 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
2213 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
2214 .hword (0x89<<8)|(1<<SFlag) \r
2215 .hword (0x8A<<8)|(1<<SFlag) \r
2216 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag)\r
2217 .hword (0x8C<<8)|(1<<SFlag) \r
2218 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag)\r
2219 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag)\r
2220 .hword (0x8F<<8)|(1<<SFlag) \r
2221 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2222 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
2223 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
2224 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2225 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
2226 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2227 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
2228 .hword (0x97<<8)|(1<<SFlag) \r
2229 .hword (0x98<<8)|(1<<SFlag) \r
2230 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
2231 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag)\r
2232 .hword (0x9B<<8)|(1<<SFlag) \r
2233 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag)\r
2234 .hword (0x9D<<8)|(1<<SFlag) \r
2235 .hword (0x9E<<8)|(1<<SFlag) \r
2236 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag)\r
2237 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2238 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2239 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2240 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2241 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2242 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2243 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2244 .hword (0x07<<8) |(1<<CFlag)\r
2245 .hword (0x08<<8) |(1<<CFlag)\r
2246 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2247 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2248 .hword (0x0B<<8) |(1<<CFlag)\r
2249 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2250 .hword (0x0D<<8) |(1<<CFlag)\r
2251 .hword (0x0E<<8) |(1<<CFlag)\r
2252 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2253 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2254 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2255 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2256 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2257 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2258 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2259 .hword (0x16<<8) |(1<<CFlag)\r
2260 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2261 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2262 .hword (0x19<<8) |(1<<CFlag)\r
2263 .hword (0x1A<<8) |(1<<CFlag)\r
2264 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2265 .hword (0x1C<<8) |(1<<CFlag)\r
2266 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2267 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2268 .hword (0x1F<<8) |(1<<CFlag)\r
2269 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2270 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2271 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2272 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2273 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2274 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2275 .hword (0x26<<8) |(1<<CFlag)\r
2276 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2277 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2278 .hword (0x29<<8) |(1<<CFlag)\r
2279 .hword (0x2A<<8) |(1<<CFlag)\r
2280 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2281 .hword (0x2C<<8) |(1<<CFlag)\r
2282 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2283 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2284 .hword (0x2F<<8) |(1<<CFlag)\r
2285 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2286 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2287 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2288 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2289 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2290 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2291 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2292 .hword (0x37<<8) |(1<<CFlag)\r
2293 .hword (0x38<<8) |(1<<CFlag)\r
2294 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2295 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2296 .hword (0x3B<<8) |(1<<CFlag)\r
2297 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2298 .hword (0x3D<<8) |(1<<CFlag)\r
2299 .hword (0x3E<<8) |(1<<CFlag)\r
2300 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2301 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2302 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2303 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2304 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2305 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2306 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2307 .hword (0x46<<8) |(1<<CFlag)\r
2308 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2309 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2310 .hword (0x49<<8) |(1<<CFlag)\r
2311 .hword (0x4A<<8) |(1<<CFlag)\r
2312 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2313 .hword (0x4C<<8) |(1<<CFlag)\r
2314 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2315 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2316 .hword (0x4F<<8) |(1<<CFlag)\r
2317 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2318 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2319 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2320 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2321 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2322 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2323 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2324 .hword (0x57<<8) |(1<<CFlag)\r
2325 .hword (0x58<<8) |(1<<CFlag)\r
2326 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2327 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2328 .hword (0x5B<<8) |(1<<CFlag)\r
2329 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2330 .hword (0x5D<<8) |(1<<CFlag)\r
2331 .hword (0x5E<<8) |(1<<CFlag)\r
2332 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2333 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2334 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2335 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2336 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2337 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2338 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2339 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
2340 .hword (0x67<<8) |(1<<CFlag)\r
2341 .hword (0x68<<8) |(1<<CFlag)\r
2342 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
2343 .hword (0x6A<<8) |(1<<VFlag) |(1<<CFlag)\r
2344 .hword (0x6B<<8) |(1<<CFlag)\r
2345 .hword (0x6C<<8) |(1<<VFlag) |(1<<CFlag)\r
2346 .hword (0x6D<<8) |(1<<CFlag)\r
2347 .hword (0x6E<<8) |(1<<CFlag)\r
2348 .hword (0x6F<<8) |(1<<VFlag) |(1<<CFlag)\r
2349 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
2350 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2351 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2352 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
2353 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2354 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
2355 .hword (0x76<<8) |(1<<CFlag)\r
2356 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
2357 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
2358 .hword (0x79<<8) |(1<<CFlag)\r
2359 .hword (0x7A<<8) |(1<<CFlag)\r
2360 .hword (0x7B<<8) |(1<<VFlag) |(1<<CFlag)\r
2361 .hword (0x7C<<8) |(1<<CFlag)\r
2362 .hword (0x7D<<8) |(1<<VFlag) |(1<<CFlag)\r
2363 .hword (0x7E<<8) |(1<<VFlag) |(1<<CFlag)\r
2364 .hword (0x7F<<8) |(1<<CFlag)\r
2365 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2366 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2367 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2368 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2369 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2370 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2371 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
2372 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2373 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2374 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
2375 .hword (0x8A<<8)|(1<<SFlag) |(1<<CFlag)\r
2376 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2377 .hword (0x8C<<8)|(1<<SFlag) |(1<<CFlag)\r
2378 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2379 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2380 .hword (0x8F<<8)|(1<<SFlag) |(1<<CFlag)\r
2381 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2382 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2383 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2384 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2385 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2386 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2387 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2388 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
2389 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
2390 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2391 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2392 .hword (0x9B<<8)|(1<<SFlag) |(1<<CFlag)\r
2393 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2394 .hword (0x9D<<8)|(1<<SFlag) |(1<<CFlag)\r
2395 .hword (0x9E<<8)|(1<<SFlag) |(1<<CFlag)\r
2396 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2397 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2398 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2399 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2400 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2401 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2402 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2403 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2404 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
2405 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
2406 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2407 .hword (0xAA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2408 .hword (0xAB<<8)|(1<<SFlag) |(1<<CFlag)\r
2409 .hword (0xAC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2410 .hword (0xAD<<8)|(1<<SFlag) |(1<<CFlag)\r
2411 .hword (0xAE<<8)|(1<<SFlag) |(1<<CFlag)\r
2412 .hword (0xAF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2413 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2414 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2415 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2416 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2417 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2418 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2419 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
2420 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2421 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2422 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
2423 .hword (0xBA<<8)|(1<<SFlag) |(1<<CFlag)\r
2424 .hword (0xBB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2425 .hword (0xBC<<8)|(1<<SFlag) |(1<<CFlag)\r
2426 .hword (0xBD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2427 .hword (0xBE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2428 .hword (0xBF<<8)|(1<<SFlag) |(1<<CFlag)\r
2429 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2430 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2431 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2432 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2433 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2434 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2435 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2436 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
2437 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
2438 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2439 .hword (0xCA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2440 .hword (0xCB<<8)|(1<<SFlag) |(1<<CFlag)\r
2441 .hword (0xCC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2442 .hword (0xCD<<8)|(1<<SFlag) |(1<<CFlag)\r
2443 .hword (0xCE<<8)|(1<<SFlag) |(1<<CFlag)\r
2444 .hword (0xCF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2445 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2446 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2447 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2448 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2449 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2450 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2451 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
2452 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2453 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2454 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
2455 .hword (0xDA<<8)|(1<<SFlag) |(1<<CFlag)\r
2456 .hword (0xDB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2457 .hword (0xDC<<8)|(1<<SFlag) |(1<<CFlag)\r
2458 .hword (0xDD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2459 .hword (0xDE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2460 .hword (0xDF<<8)|(1<<SFlag) |(1<<CFlag)\r
2461 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2462 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2463 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2464 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2465 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2466 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2467 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
2468 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2469 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2470 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
2471 .hword (0xEA<<8)|(1<<SFlag) |(1<<CFlag)\r
2472 .hword (0xEB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2473 .hword (0xEC<<8)|(1<<SFlag) |(1<<CFlag)\r
2474 .hword (0xED<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2475 .hword (0xEE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2476 .hword (0xEF<<8)|(1<<SFlag) |(1<<CFlag)\r
2477 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2478 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2479 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2480 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2481 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2482 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2483 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2484 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
2485 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
2486 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2487 .hword (0xFA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2488 .hword (0xFB<<8)|(1<<SFlag) |(1<<CFlag)\r
2489 .hword (0xFC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2490 .hword (0xFD<<8)|(1<<SFlag) |(1<<CFlag)\r
2491 .hword (0xFE<<8)|(1<<SFlag) |(1<<CFlag)\r
2492 .hword (0xFF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2493 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2494 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2495 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2496 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2497 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2498 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2499 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2500 .hword (0x07<<8) |(1<<CFlag)\r
2501 .hword (0x08<<8) |(1<<CFlag)\r
2502 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2503 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2504 .hword (0x0B<<8) |(1<<CFlag)\r
2505 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2506 .hword (0x0D<<8) |(1<<CFlag)\r
2507 .hword (0x0E<<8) |(1<<CFlag)\r
2508 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2509 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2510 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2511 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2512 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2513 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2514 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2515 .hword (0x16<<8) |(1<<CFlag)\r
2516 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2517 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2518 .hword (0x19<<8) |(1<<CFlag)\r
2519 .hword (0x1A<<8) |(1<<CFlag)\r
2520 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2521 .hword (0x1C<<8) |(1<<CFlag)\r
2522 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2523 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2524 .hword (0x1F<<8) |(1<<CFlag)\r
2525 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2526 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2527 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2528 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2529 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2530 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2531 .hword (0x26<<8) |(1<<CFlag)\r
2532 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2533 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2534 .hword (0x29<<8) |(1<<CFlag)\r
2535 .hword (0x2A<<8) |(1<<CFlag)\r
2536 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2537 .hword (0x2C<<8) |(1<<CFlag)\r
2538 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2539 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2540 .hword (0x2F<<8) |(1<<CFlag)\r
2541 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2542 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2543 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2544 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2545 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2546 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2547 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2548 .hword (0x37<<8) |(1<<CFlag)\r
2549 .hword (0x38<<8) |(1<<CFlag)\r
2550 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2551 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2552 .hword (0x3B<<8) |(1<<CFlag)\r
2553 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2554 .hword (0x3D<<8) |(1<<CFlag)\r
2555 .hword (0x3E<<8) |(1<<CFlag)\r
2556 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2557 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2558 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2559 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2560 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2561 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2562 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2563 .hword (0x46<<8) |(1<<CFlag)\r
2564 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2565 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2566 .hword (0x49<<8) |(1<<CFlag)\r
2567 .hword (0x4A<<8) |(1<<CFlag)\r
2568 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2569 .hword (0x4C<<8) |(1<<CFlag)\r
2570 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2571 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2572 .hword (0x4F<<8) |(1<<CFlag)\r
2573 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2574 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2575 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2576 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2577 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2578 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2579 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2580 .hword (0x57<<8) |(1<<CFlag)\r
2581 .hword (0x58<<8) |(1<<CFlag)\r
2582 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2583 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2584 .hword (0x5B<<8) |(1<<CFlag)\r
2585 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2586 .hword (0x5D<<8) |(1<<CFlag)\r
2587 .hword (0x5E<<8) |(1<<CFlag)\r
2588 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2589 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2590 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2591 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2592 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2593 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2594 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2595 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
2596 .hword (0x01<<8) |(1<<NFlag) \r
2597 .hword (0x02<<8) |(1<<NFlag) \r
2598 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
2599 .hword (0x04<<8) |(1<<NFlag) \r
2600 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2601 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2602 .hword (0x07<<8) |(1<<NFlag) \r
2603 .hword (0x08<<8) |(1<<NFlag) \r
2604 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2605 .hword (0x04<<8) |(1<<NFlag) \r
2606 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2607 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2608 .hword (0x07<<8) |(1<<NFlag) \r
2609 .hword (0x08<<8) |(1<<NFlag) \r
2610 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2611 .hword (0x10<<8) |(1<<NFlag) \r
2612 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
2613 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
2614 .hword (0x13<<8) |(1<<NFlag) \r
2615 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2616 .hword (0x15<<8) |(1<<NFlag) \r
2617 .hword (0x16<<8) |(1<<NFlag) \r
2618 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2619 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2620 .hword (0x19<<8) |(1<<NFlag) \r
2621 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2622 .hword (0x15<<8) |(1<<NFlag) \r
2623 .hword (0x16<<8) |(1<<NFlag) \r
2624 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2625 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2626 .hword (0x19<<8) |(1<<NFlag) \r
2627 .hword (0x20<<8) |(1<<NFlag) \r
2628 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
2629 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
2630 .hword (0x23<<8) |(1<<NFlag) \r
2631 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2632 .hword (0x25<<8) |(1<<NFlag) \r
2633 .hword (0x26<<8) |(1<<NFlag) \r
2634 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2635 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2636 .hword (0x29<<8) |(1<<NFlag) \r
2637 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2638 .hword (0x25<<8) |(1<<NFlag) \r
2639 .hword (0x26<<8) |(1<<NFlag) \r
2640 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2641 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2642 .hword (0x29<<8) |(1<<NFlag) \r
2643 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
2644 .hword (0x31<<8) |(1<<NFlag) \r
2645 .hword (0x32<<8) |(1<<NFlag) \r
2646 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
2647 .hword (0x34<<8) |(1<<NFlag) \r
2648 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2649 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2650 .hword (0x37<<8) |(1<<NFlag) \r
2651 .hword (0x38<<8) |(1<<NFlag) \r
2652 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2653 .hword (0x34<<8) |(1<<NFlag) \r
2654 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2655 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2656 .hword (0x37<<8) |(1<<NFlag) \r
2657 .hword (0x38<<8) |(1<<NFlag) \r
2658 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2659 .hword (0x40<<8) |(1<<NFlag) \r
2660 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
2661 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
2662 .hword (0x43<<8) |(1<<NFlag) \r
2663 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2664 .hword (0x45<<8) |(1<<NFlag) \r
2665 .hword (0x46<<8) |(1<<NFlag) \r
2666 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2667 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2668 .hword (0x49<<8) |(1<<NFlag) \r
2669 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2670 .hword (0x45<<8) |(1<<NFlag) \r
2671 .hword (0x46<<8) |(1<<NFlag) \r
2672 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2673 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2674 .hword (0x49<<8) |(1<<NFlag) \r
2675 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
2676 .hword (0x51<<8) |(1<<NFlag) \r
2677 .hword (0x52<<8) |(1<<NFlag) \r
2678 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
2679 .hword (0x54<<8) |(1<<NFlag) \r
2680 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2681 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2682 .hword (0x57<<8) |(1<<NFlag) \r
2683 .hword (0x58<<8) |(1<<NFlag) \r
2684 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2685 .hword (0x54<<8) |(1<<NFlag) \r
2686 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2687 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2688 .hword (0x57<<8) |(1<<NFlag) \r
2689 .hword (0x58<<8) |(1<<NFlag) \r
2690 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2691 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
2692 .hword (0x61<<8) |(1<<NFlag) \r
2693 .hword (0x62<<8) |(1<<NFlag) \r
2694 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
2695 .hword (0x64<<8) |(1<<NFlag) \r
2696 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2697 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2698 .hword (0x67<<8) |(1<<NFlag) \r
2699 .hword (0x68<<8) |(1<<NFlag) \r
2700 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2701 .hword (0x64<<8) |(1<<NFlag) \r
2702 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2703 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2704 .hword (0x67<<8) |(1<<NFlag) \r
2705 .hword (0x68<<8) |(1<<NFlag) \r
2706 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2707 .hword (0x70<<8) |(1<<NFlag) \r
2708 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
2709 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
2710 .hword (0x73<<8) |(1<<NFlag) \r
2711 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2712 .hword (0x75<<8) |(1<<NFlag) \r
2713 .hword (0x76<<8) |(1<<NFlag) \r
2714 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2715 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2716 .hword (0x79<<8) |(1<<NFlag) \r
2717 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2718 .hword (0x75<<8) |(1<<NFlag) \r
2719 .hword (0x76<<8) |(1<<NFlag) \r
2720 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2721 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2722 .hword (0x79<<8) |(1<<NFlag) \r
2723 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
2724 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2725 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2726 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
2727 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2728 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2729 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2730 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2731 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2732 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2733 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2734 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2735 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2736 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2737 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2738 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2739 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2740 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
2741 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
2742 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2743 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag) \r
2744 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2745 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2746 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag) \r
2747 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag) \r
2748 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2749 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2750 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2751 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2752 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2753 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2754 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2755 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
2756 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2757 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2758 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
2759 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2760 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2761 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2762 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2763 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2764 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2765 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2766 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2767 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2768 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2769 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2770 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2771 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2772 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
2773 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
2774 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2775 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2776 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2777 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2778 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2779 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2780 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2781 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2782 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2783 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2784 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2785 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2786 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2787 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2788 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
2789 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
2790 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2791 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2792 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2793 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2794 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2795 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2796 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2797 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2798 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2799 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2800 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2801 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2802 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2803 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
2804 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2805 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2806 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
2807 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2808 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2809 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2810 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2811 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2812 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2813 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2814 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2815 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2816 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2817 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2818 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2819 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2820 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2821 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2822 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2823 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2824 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2825 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2826 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2827 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2828 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2829 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2830 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2831 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2832 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2833 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2834 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2835 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2836 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2837 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2838 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2839 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2840 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2841 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2842 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2843 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2844 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2845 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2846 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2847 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2848 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2849 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2850 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2851 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2852 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2853 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2854 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2855 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2856 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2857 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2858 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2859 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2860 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2861 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2862 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2863 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2864 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2865 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2866 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2867 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2868 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2869 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2870 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2871 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2872 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2873 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2874 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2875 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2876 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2877 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2878 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2879 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2880 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2881 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2882 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2883 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2884 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2885 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2886 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2887 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2888 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2889 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2890 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2891 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2892 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2893 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2894 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2895 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2896 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2897 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2898 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2899 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2900 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2901 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2902 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2903 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2904 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2905 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2906 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2907 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2908 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2909 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2910 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2911 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2912 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2913 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2914 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2915 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2916 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2917 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2918 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2919 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2920 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2921 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2922 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2923 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2924 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2925 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2926 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2927 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2928 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2929 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2930 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2931 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2932 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2933 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2934 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2935 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2936 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2937 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2938 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2939 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2940 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2941 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2942 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2943 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2944 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2945 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2946 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2947 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2948 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
2949 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
2950 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2951 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2952 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2953 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2954 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2955 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2956 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2957 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2958 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2959 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2960 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2961 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2962 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2963 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
2964 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2965 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2966 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
2967 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2968 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2969 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2970 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2971 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2972 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2973 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2974 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2975 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2976 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2977 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2978 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2979 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
2980 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2981 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2982 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
2983 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2984 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2985 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2986 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2987 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2988 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2989 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2990 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2991 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2992 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2993 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2994 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2995 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2996 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
2997 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
2998 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2999 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3000 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3001 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3002 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3003 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3004 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3005 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3006 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3007 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3008 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3009 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3010 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3011 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3012 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3013 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3014 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3015 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3016 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3017 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3018 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3019 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3020 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3021 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3022 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3023 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3024 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3025 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3026 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3027 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3028 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3029 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3030 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3031 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3032 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3033 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3034 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3035 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3036 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3037 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3038 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3039 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3040 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3041 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3042 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3043 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3044 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3045 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3046 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3047 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3048 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3049 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3050 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3051 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3052 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3053 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3054 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3055 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3056 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3057 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3058 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3059 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3060 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3061 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3062 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3063 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3064 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3065 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3066 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3067 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3068 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3069 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3070 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3071 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3072 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3073 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3074 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3075 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3076 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3077 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3078 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3079 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3080 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3081 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3082 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3083 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3084 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3085 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3086 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3087 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3088 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3089 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3090 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3091 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3092 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3093 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3094 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3095 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3096 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3097 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3098 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3099 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3100 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3101 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3102 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3103 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3104 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3105 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3106 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3107 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3108 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3109 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3110 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3111 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3112 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3113 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
3114 .hword (0x01<<8) |(1<<NFlag) \r
3115 .hword (0x02<<8) |(1<<NFlag) \r
3116 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
3117 .hword (0x04<<8) |(1<<NFlag) \r
3118 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
3119 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
3120 .hword (0x07<<8) |(1<<NFlag) \r
3121 .hword (0x08<<8) |(1<<NFlag) \r
3122 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
3123 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3124 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag) \r
3125 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3126 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag) \r
3127 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag) \r
3128 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3129 .hword (0x10<<8) |(1<<NFlag) \r
3130 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
3131 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
3132 .hword (0x13<<8) |(1<<NFlag) \r
3133 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
3134 .hword (0x15<<8) |(1<<NFlag) \r
3135 .hword (0x16<<8) |(1<<NFlag) \r
3136 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
3137 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
3138 .hword (0x19<<8) |(1<<NFlag) \r
3139 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag) \r
3140 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3141 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag) \r
3142 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3143 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3144 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag) \r
3145 .hword (0x20<<8) |(1<<NFlag) \r
3146 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
3147 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
3148 .hword (0x23<<8) |(1<<NFlag) \r
3149 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
3150 .hword (0x25<<8) |(1<<NFlag) \r
3151 .hword (0x26<<8) |(1<<NFlag) \r
3152 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
3153 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
3154 .hword (0x29<<8) |(1<<NFlag) \r
3155 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag) \r
3156 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3157 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag) \r
3158 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3159 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3160 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag) \r
3161 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
3162 .hword (0x31<<8) |(1<<NFlag) \r
3163 .hword (0x32<<8) |(1<<NFlag) \r
3164 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
3165 .hword (0x34<<8) |(1<<NFlag) \r
3166 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
3167 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
3168 .hword (0x37<<8) |(1<<NFlag) \r
3169 .hword (0x38<<8) |(1<<NFlag) \r
3170 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
3171 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3172 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag) \r
3173 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3174 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag) \r
3175 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag) \r
3176 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3177 .hword (0x40<<8) |(1<<NFlag) \r
3178 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
3179 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
3180 .hword (0x43<<8) |(1<<NFlag) \r
3181 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
3182 .hword (0x45<<8) |(1<<NFlag) \r
3183 .hword (0x46<<8) |(1<<NFlag) \r
3184 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
3185 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
3186 .hword (0x49<<8) |(1<<NFlag) \r
3187 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag) \r
3188 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3189 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag) \r
3190 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3191 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3192 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag) \r
3193 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
3194 .hword (0x51<<8) |(1<<NFlag) \r
3195 .hword (0x52<<8) |(1<<NFlag) \r
3196 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
3197 .hword (0x54<<8) |(1<<NFlag) \r
3198 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
3199 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
3200 .hword (0x57<<8) |(1<<NFlag) \r
3201 .hword (0x58<<8) |(1<<NFlag) \r
3202 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
3203 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3204 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag) \r
3205 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3206 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag) \r
3207 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag) \r
3208 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3209 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
3210 .hword (0x61<<8) |(1<<NFlag) \r
3211 .hword (0x62<<8) |(1<<NFlag) \r
3212 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
3213 .hword (0x64<<8) |(1<<NFlag) \r
3214 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
3215 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
3216 .hword (0x67<<8) |(1<<NFlag) \r
3217 .hword (0x68<<8) |(1<<NFlag) \r
3218 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
3219 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3220 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag) \r
3221 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3222 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag) \r
3223 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag) \r
3224 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3225 .hword (0x70<<8) |(1<<NFlag) \r
3226 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
3227 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
3228 .hword (0x73<<8) |(1<<NFlag) \r
3229 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
3230 .hword (0x75<<8) |(1<<NFlag) \r
3231 .hword (0x76<<8) |(1<<NFlag) \r
3232 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
3233 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
3234 .hword (0x79<<8) |(1<<NFlag) \r
3235 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag) \r
3236 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3237 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag) \r
3238 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3239 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3240 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag) \r
3241 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
3242 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3243 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3244 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
3245 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3246 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
3247 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
3248 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3249 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3250 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
3251 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3252 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3253 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3254 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3255 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3256 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3257 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3258 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
3259 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
3260 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3261 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3262 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3263 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3264 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3265 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3266 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3267 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3268 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3269 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3270 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3271 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3272 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3273 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3274 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3275 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3276 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3277 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3278 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3279 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3280 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3281 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3282 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3283 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3284 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3285 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3286 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3287 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3288 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3289 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3290 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3291 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3292 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3293 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3294 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3295 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3296 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3297 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3298 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3299 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3300 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3301 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3302 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3303 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3304 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3305 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3306 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3307 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3308 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3309 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3310 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3311 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3312 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3313 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3314 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3315 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3316 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3317 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3318 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3319 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3320 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3321 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3322 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3323 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3324 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3325 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3326 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3327 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3328 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3329 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3330 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3331 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3332 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3333 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3334 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3335 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3336 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3337 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3338 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3339 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3340 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3341 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3342 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3343 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3344 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3345 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3346 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3347 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3348 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3349 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3350 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3351 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3352 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3353 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3354 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3355 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3356 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3357 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3358 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3359 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3360 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3361 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3362 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3363 .hword (0x9A<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3364 .hword (0x9B<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3365 .hword (0x9C<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3366 .hword (0x9D<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3367 .hword (0x9E<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3368 .hword (0x9F<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3369 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3370 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3371 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3372 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3373 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3374 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3375 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3376 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3377 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3378 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3379 .hword (0xAA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3380 .hword (0xAB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3381 .hword (0xAC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3382 .hword (0xAD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3383 .hword (0xAE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3384 .hword (0xAF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3385 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3386 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3387 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3388 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3389 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3390 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3391 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3392 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3393 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3394 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3395 .hword (0xBA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3396 .hword (0xBB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3397 .hword (0xBC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3398 .hword (0xBD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3399 .hword (0xBE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3400 .hword (0xBF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3401 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3402 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3403 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3404 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3405 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3406 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3407 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3408 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3409 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3410 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3411 .hword (0xCA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3412 .hword (0xCB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3413 .hword (0xCC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3414 .hword (0xCD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3415 .hword (0xCE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3416 .hword (0xCF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3417 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3418 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3419 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3420 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3421 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3422 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3423 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3424 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3425 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3426 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3427 .hword (0xDA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3428 .hword (0xDB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3429 .hword (0xDC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3430 .hword (0xDD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3431 .hword (0xDE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3432 .hword (0xDF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3433 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3434 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3435 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3436 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3437 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3438 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3439 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3440 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3441 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3442 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3443 .hword (0xEA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3444 .hword (0xEB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3445 .hword (0xEC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3446 .hword (0xED<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3447 .hword (0xEE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3448 .hword (0xEF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3449 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3450 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3451 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3452 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3453 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3454 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3455 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3456 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3457 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3458 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3459 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3460 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3461 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3462 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3463 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3464 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3465 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3466 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
3467 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
3468 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3469 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
3470 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3471 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3472 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
3473 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
3474 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3475 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3476 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3477 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3478 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3479 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3480 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3481 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
3482 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3483 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3484 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
3485 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3486 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
3487 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
3488 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3489 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3490 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
3491 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3492 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3493 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3494 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3495 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3496 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3497 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
3498 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3499 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3500 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
3501 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3502 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
3503 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
3504 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3505 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3506 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
3507 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3508 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3509 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3510 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3511 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3512 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3513 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3514 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
3515 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
3516 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3517 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3518 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3519 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3520 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3521 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3522 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3523 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3524 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3525 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3526 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3527 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3528 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3529 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3530 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3531 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3532 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3533 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3534 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3535 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3536 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3537 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3538 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3539 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3540 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3541 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3542 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3543 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3544 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3545 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3546 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3547 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3548 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3549 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3550 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3551 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3552 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3553 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3554 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3555 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3556 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3557 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3558 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3559 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3560 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3561 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3562 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3563 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3564 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3565 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3566 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3567 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3568 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3569 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3570 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3571 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3572 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3573 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3574 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3575 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3576 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3577 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3578 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3579 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3580 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3581 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3582 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3583 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3584 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3585 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3586 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3587 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3588 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3589 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3590 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3591 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3592 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3593 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3594 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3595 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3596 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3597 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3598 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3599 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3600 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3601 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3602 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3603 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3604 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3605 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3606 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3607 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3608 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3609 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3610 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3611 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3612 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3613 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3614 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3615 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3616 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3617 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3618 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3619 \r
3620.align 4\r
3621\r
3622AF_Z80: .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 0\r
3623 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 1\r
3624 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 2\r
3625 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 3\r
3626 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 4\r
3627 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 5\r
3628 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 6\r
3629 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 7\r
3630 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 8\r
3631 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 9\r
3632 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 10\r
3633 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 11\r
3634 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 12\r
3635 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 13\r
3636 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 14\r
3637 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 15\r
3638 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 16\r
3639 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 17\r
3640 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 18\r
3641 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 19\r
3642 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 20\r
3643 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 21\r
3644 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 22\r
3645 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 23\r
3646 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 24\r
3647 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 25\r
3648 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 26\r
3649 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 27\r
3650 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 28\r
3651 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 29\r
3652 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 30\r
3653 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 31\r
3654 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 32\r
3655 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 33\r
3656 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 34\r
3657 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 35\r
3658 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 36\r
3659 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 37\r
3660 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 38\r
3661 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 39\r
3662 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 40\r
3663 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 41\r
3664 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 42\r
3665 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 43\r
3666 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 44\r
3667 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 45\r
3668 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 46\r
3669 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 47\r
3670 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 48\r
3671 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 49\r
3672 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 50\r
3673 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 51\r
3674 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 52\r
3675 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 53\r
3676 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 54\r
3677 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 55\r
3678 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 56\r
3679 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 57\r
3680 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 58\r
3681 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 59\r
3682 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 60\r
3683 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 61\r
3684 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 62\r
3685 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 63\r
3686 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 64\r
3687 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 65\r
3688 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 66\r
3689 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 67\r
3690 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 68\r
3691 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 69\r
3692 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 70\r
3693 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 71\r
3694 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 72\r
3695 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 73\r
3696 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 74\r
3697 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 75\r
3698 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 76\r
3699 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 77\r
3700 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 78\r
3701 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 79\r
3702 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 80\r
3703 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 81\r
3704 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 82\r
3705 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 83\r
3706 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 84\r
3707 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 85\r
3708 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 86\r
3709 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 87\r
3710 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 88\r
3711 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 89\r
3712 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 90\r
3713 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 91\r
3714 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 92\r
3715 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 93\r
3716 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 94\r
3717 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 95\r
3718 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 96\r
3719 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 97\r
3720 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 98\r
3721 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 99\r
3722 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 100\r
3723 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 101\r
3724 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 102\r
3725 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 103\r
3726 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 104\r
3727 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 105\r
3728 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 106\r
3729 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 107\r
3730 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 108\r
3731 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 109\r
3732 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 110\r
3733 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 111\r
3734 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 112\r
3735 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 113\r
3736 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 114\r
3737 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 115\r
3738 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 116\r
3739 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 117\r
3740 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 118\r
3741 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 119\r
3742 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 120\r
3743 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 121\r
3744 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 122\r
3745 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 123\r
3746 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 124\r
3747 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 125\r
3748 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 126\r
3749 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 127\r
3750 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 128\r
3751 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 129\r
3752 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 130\r
3753 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 131\r
3754 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 132\r
3755 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 133\r
3756 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 134\r
3757 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 135\r
3758 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 136\r
3759 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 137\r
3760 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 138\r
3761 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 139\r
3762 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 140\r
3763 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 141\r
3764 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 142\r
3765 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 143\r
3766 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 144\r
3767 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 145\r
3768 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 146\r
3769 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 147\r
3770 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 148\r
3771 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 149\r
3772 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 150\r
3773 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 151\r
3774 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 152\r
3775 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 153\r
3776 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 154\r
3777 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 155\r
3778 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 156\r
3779 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 157\r
3780 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 158\r
3781 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 159\r
3782 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 160\r
3783 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 161\r
3784 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 162\r
3785 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 163\r
3786 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 164\r
3787 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 165\r
3788 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 166\r
3789 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 167\r
3790 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 168\r
3791 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 169\r
3792 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 170\r
3793 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 171\r
3794 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 172\r
3795 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 173\r
3796 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 174\r
3797 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 175\r
3798 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 176\r
3799 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 177\r
3800 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 178\r
3801 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 179\r
3802 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 180\r
3803 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 181\r
3804 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 182\r
3805 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 183\r
3806 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 184\r
3807 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 185\r
3808 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 186\r
3809 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 187\r
3810 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 188\r
3811 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 189\r
3812 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 190\r
3813 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 191\r
3814 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 192\r
3815 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 193\r
3816 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 194\r
3817 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 195\r
3818 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 196\r
3819 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 197\r
3820 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 198\r
3821 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 199\r
3822 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 200\r
3823 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 201\r
3824 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 202\r
3825 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 203\r
3826 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 204\r
3827 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 205\r
3828 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 206\r
3829 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 207\r
3830 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 208\r
3831 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 209\r
3832 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 210\r
3833 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 211\r
3834 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 212\r
3835 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 213\r
3836 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 214\r
3837 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 215\r
3838 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 216\r
3839 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 217\r
3840 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 218\r
3841 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 219\r
3842 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 220\r
3843 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 221\r
3844 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 222\r
3845 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 223\r
3846 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 224\r
3847 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 225\r
3848 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 226\r
3849 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 227\r
3850 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 228\r
3851 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 229\r
3852 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 230\r
3853 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 231\r
3854 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 232\r
3855 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 233\r
3856 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 234\r
3857 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 235\r
3858 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 236\r
3859 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 237\r
3860 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 238\r
3861 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 239\r
3862 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 240\r
3863 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 241\r
3864 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 242\r
3865 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 243\r
3866 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 244\r
3867 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 245\r
3868 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 246\r
3869 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 247\r
3870 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 248\r
3871 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 249\r
3872 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 250\r
3873 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 251\r
3874 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 252\r
3875 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 253\r
3876 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 254\r
3877 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 255\r
3878\r
3879.align 4\r
3880\r
3881AF_ARM: .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 0\r
3882 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 1\r
3883 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 2\r
3884 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 3\r
3885 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 4\r
3886 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 5\r
3887 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 6\r
3888 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 7\r
3889 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 8\r
3890 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 9\r
3891 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 10\r
3892 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 11\r
3893 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 12\r
3894 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 13\r
3895 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 14\r
3896 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 15\r
3897 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 16\r
3898 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 17\r
3899 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 18\r
3900 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 19\r
3901 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 20\r
3902 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 21\r
3903 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 22\r
3904 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 23\r
3905 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 24\r
3906 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 25\r
3907 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 26\r
3908 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 27\r
3909 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 28\r
3910 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 29\r
3911 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 30\r
3912 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 31\r
3913 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 32\r
3914 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 33\r
3915 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 34\r
3916 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 35\r
3917 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 36\r
3918 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 37\r
3919 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 38\r
3920 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 39\r
3921 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 40\r
3922 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 41\r
3923 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 42\r
3924 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 43\r
3925 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 44\r
3926 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 45\r
3927 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 46\r
3928 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 47\r
3929 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 48\r
3930 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 49\r
3931 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 50\r
3932 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 51\r
3933 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 52\r
3934 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 53\r
3935 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 54\r
3936 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 55\r
3937 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 56\r
3938 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 57\r
3939 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 58\r
3940 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 59\r
3941 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 60\r
3942 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 61\r
3943 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 62\r
3944 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 63\r
3945 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 64\r
3946 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 65\r
3947 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 66\r
3948 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 67\r
3949 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 68\r
3950 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 69\r
3951 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 70\r
3952 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 71\r
3953 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 72\r
3954 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 73\r
3955 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 74\r
3956 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 75\r
3957 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 76\r
3958 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 77\r
3959 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 78\r
3960 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 79\r
3961 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 80\r
3962 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 81\r
3963 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 82\r
3964 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 83\r
3965 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 84\r
3966 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 85\r
3967 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 86\r
3968 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 87\r
3969 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 88\r
3970 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 89\r
3971 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 90\r
3972 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 91\r
3973 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 92\r
3974 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 93\r
3975 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 94\r
3976 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 95\r
3977 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 96\r
3978 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 97\r
3979 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 98\r
3980 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 99\r
3981 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 100\r
3982 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 101\r
3983 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 102\r
3984 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 103\r
3985 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 104\r
3986 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 105\r
3987 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 106\r
3988 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 107\r
3989 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 108\r
3990 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 109\r
3991 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 110\r
3992 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 111\r
3993 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 112\r
3994 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 113\r
3995 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 114\r
3996 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 115\r
3997 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 116\r
3998 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 117\r
3999 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 118\r
4000 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 119\r
4001 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 120\r
4002 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 121\r
4003 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 122\r
4004 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 123\r
4005 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 124\r
4006 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 125\r
4007 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 126\r
4008 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 127\r
4009 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 128\r
4010 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 129\r
4011 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 130\r
4012 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 131\r
4013 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 132\r
4014 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 133\r
4015 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 134\r
4016 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 135\r
4017 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 136\r
4018 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 137\r
4019 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 138\r
4020 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 139\r
4021 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 140\r
4022 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 141\r
4023 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 142\r
4024 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 143\r
4025 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 144\r
4026 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 145\r
4027 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 146\r
4028 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 147\r
4029 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 148\r
4030 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 149\r
4031 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 150\r
4032 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 151\r
4033 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 152\r
4034 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 153\r
4035 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 154\r
4036 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 155\r
4037 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 156\r
4038 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 157\r
4039 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 158\r
4040 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 159\r
4041 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 160\r
4042 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 161\r
4043 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 162\r
4044 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 163\r
4045 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 164\r
4046 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 165\r
4047 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 166\r
4048 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 167\r
4049 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 168\r
4050 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 169\r
4051 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 170\r
4052 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 171\r
4053 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 172\r
4054 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 173\r
4055 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 174\r
4056 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 175\r
4057 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 176\r
4058 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 177\r
4059 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 178\r
4060 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 179\r
4061 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 180\r
4062 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 181\r
4063 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 182\r
4064 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 183\r
4065 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 184\r
4066 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 185\r
4067 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 186\r
4068 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 187\r
4069 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 188\r
4070 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 189\r
4071 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 190\r
4072 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 191\r
4073 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 192\r
4074 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 193\r
4075 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 194\r
4076 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 195\r
4077 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 196\r
4078 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 197\r
4079 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 198\r
4080 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 199\r
4081 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 200\r
4082 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 201\r
4083 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 202\r
4084 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 203\r
4085 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 204\r
4086 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 205\r
4087 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 206\r
4088 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 207\r
4089 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 208\r
4090 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 209\r
4091 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 210\r
4092 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 211\r
4093 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 212\r
4094 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 213\r
4095 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 214\r
4096 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 215\r
4097 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 216\r
4098 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 217\r
4099 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 218\r
4100 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 219\r
4101 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 220\r
4102 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 221\r
4103 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 222\r
4104 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 223\r
4105 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 224\r
4106 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 225\r
4107 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 226\r
4108 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 227\r
4109 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 228\r
4110 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 229\r
4111 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 230\r
4112 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 231\r
4113 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 232\r
4114 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 233\r
4115 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 234\r
4116 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 235\r
4117 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 236\r
4118 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 237\r
4119 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 238\r
4120 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 239\r
4121 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 240\r
4122 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 241\r
4123 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 242\r
4124 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 243\r
4125 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 244\r
4126 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 245\r
4127 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 246\r
4128 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 247\r
4129 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 248\r
4130 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 249\r
4131 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 250\r
4132 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 251\r
4133 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 252\r
4134 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 253\r
4135 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 254\r
4136 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 255\r
4137\r
4138.align 4\r
4139\r
4140PZSTable_data: .byte (1<<ZFlag)|(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4141 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4142 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4143 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4144 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4145 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4146 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4147 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4148 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4149 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4150 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4151 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4152 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4153 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4154 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4155 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4156 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4157 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4158 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4159 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4160 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4161 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4162 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4163 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4164 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4165 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4166 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4167 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4168 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4169 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4170 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4171 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4172 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4173 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4174 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4175 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4176 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4177 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4178 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4179 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4180 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag) \r
4181\r
4182.align 4\r
4183\r
4184MAIN_opcodes: \r
4185 .word opcode_0_0,opcode_0_1,opcode_0_2,opcode_0_3,opcode_0_4,opcode_0_5,opcode_0_6,opcode_0_7\r
4186 .word opcode_0_8,opcode_0_9,opcode_0_A,opcode_0_B,opcode_0_C,opcode_0_D,opcode_0_E,opcode_0_F\r
4187 .word opcode_1_0,opcode_1_1,opcode_1_2,opcode_1_3,opcode_1_4,opcode_1_5,opcode_1_6,opcode_1_7\r
4188 .word opcode_1_8,opcode_1_9,opcode_1_A,opcode_1_B,opcode_1_C,opcode_1_D,opcode_1_E,opcode_1_F\r
4189 .word opcode_2_0,opcode_2_1,opcode_2_2,opcode_2_3,opcode_2_4,opcode_2_5,opcode_2_6,opcode_2_7\r
4190 .word opcode_2_8,opcode_2_9,opcode_2_A,opcode_2_B,opcode_2_C,opcode_2_D,opcode_2_E,opcode_2_F\r
4191 .word opcode_3_0,opcode_3_1,opcode_3_2,opcode_3_3,opcode_3_4,opcode_3_5,opcode_3_6,opcode_3_7\r
4192 .word opcode_3_8,opcode_3_9,opcode_3_A,opcode_3_B,opcode_3_C,opcode_3_D,opcode_3_E,opcode_3_F\r
4193 .word opcode_4_0,opcode_4_1,opcode_4_2,opcode_4_3,opcode_4_4,opcode_4_5,opcode_4_6,opcode_4_7\r
4194 .word opcode_4_8,opcode_4_9,opcode_4_A,opcode_4_B,opcode_4_C,opcode_4_D,opcode_4_E,opcode_4_F\r
4195 .word opcode_5_0,opcode_5_1,opcode_5_2,opcode_5_3,opcode_5_4,opcode_5_5,opcode_5_6,opcode_5_7\r
4196 .word opcode_5_8,opcode_5_9,opcode_5_A,opcode_5_B,opcode_5_C,opcode_5_D,opcode_5_E,opcode_5_F\r
4197 .word opcode_6_0,opcode_6_1,opcode_6_2,opcode_6_3,opcode_6_4,opcode_6_5,opcode_6_6,opcode_6_7\r
4198 .word opcode_6_8,opcode_6_9,opcode_6_A,opcode_6_B,opcode_6_C,opcode_6_D,opcode_6_E,opcode_6_F\r
4199 .word opcode_7_0,opcode_7_1,opcode_7_2,opcode_7_3,opcode_7_4,opcode_7_5,opcode_7_6,opcode_7_7\r
4200 .word opcode_7_8,opcode_7_9,opcode_7_A,opcode_7_B,opcode_7_C,opcode_7_D,opcode_7_E,opcode_7_F\r
4201 .word opcode_8_0,opcode_8_1,opcode_8_2,opcode_8_3,opcode_8_4,opcode_8_5,opcode_8_6,opcode_8_7\r
4202 .word opcode_8_8,opcode_8_9,opcode_8_A,opcode_8_B,opcode_8_C,opcode_8_D,opcode_8_E,opcode_8_F\r
4203 .word opcode_9_0,opcode_9_1,opcode_9_2,opcode_9_3,opcode_9_4,opcode_9_5,opcode_9_6,opcode_9_7\r
4204 .word opcode_9_8,opcode_9_9,opcode_9_A,opcode_9_B,opcode_9_C,opcode_9_D,opcode_9_E,opcode_9_F\r
4205 .word opcode_A_0,opcode_A_1,opcode_A_2,opcode_A_3,opcode_A_4,opcode_A_5,opcode_A_6,opcode_A_7\r
4206 .word opcode_A_8,opcode_A_9,opcode_A_A,opcode_A_B,opcode_A_C,opcode_A_D,opcode_A_E,opcode_A_F\r
4207 .word opcode_B_0,opcode_B_1,opcode_B_2,opcode_B_3,opcode_B_4,opcode_B_5,opcode_B_6,opcode_B_7\r
4208 .word opcode_B_8,opcode_B_9,opcode_B_A,opcode_B_B,opcode_B_C,opcode_B_D,opcode_B_E,opcode_B_F\r
4209 .word opcode_C_0,opcode_C_1,opcode_C_2,opcode_C_3,opcode_C_4,opcode_C_5,opcode_C_6,opcode_C_7\r
4210 .word opcode_C_8,opcode_C_9,opcode_C_A,opcode_C_B,opcode_C_C,opcode_C_D,opcode_C_E,opcode_C_F\r
4211 .word opcode_D_0,opcode_D_1,opcode_D_2,opcode_D_3,opcode_D_4,opcode_D_5,opcode_D_6,opcode_D_7\r
4212 .word opcode_D_8,opcode_D_9,opcode_D_A,opcode_D_B,opcode_D_C,opcode_D_D,opcode_D_E,opcode_D_F\r
4213 .word opcode_E_0,opcode_E_1,opcode_E_2,opcode_E_3,opcode_E_4,opcode_E_5,opcode_E_6,opcode_E_7\r
4214 .word opcode_E_8,opcode_E_9,opcode_E_A,opcode_E_B,opcode_E_C,opcode_E_D,opcode_E_E,opcode_E_F\r
4215 .word opcode_F_0,opcode_F_1,opcode_F_2,opcode_F_3,opcode_F_4,opcode_F_5,opcode_F_6,opcode_F_7\r
4216 .word opcode_F_8,opcode_F_9,opcode_F_A,opcode_F_B,opcode_F_C,opcode_F_D,opcode_F_E,opcode_F_F\r
4217\r
4218.align 4\r
4219\r
4220EI_DUMMY_opcodes:\r
4221 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4222 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4223 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4224 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4225 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4226 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4227 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4228 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4229 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4230 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4231 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4232 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4233 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4234 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4235 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4236 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4237 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4238 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4239 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4240 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4241 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4242 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4243 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4244 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4245 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4246 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4247 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4248 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4249 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4250 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4251 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4252 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4253\r
4254.text\r
4255.align 4\r
4256\r
4257;@NOP\r
4258opcode_0_0:\r
4259;@LD B,B\r
4260opcode_4_0:\r
4261;@LD C,C\r
4262opcode_4_9:\r
4263;@LD D,D\r
4264opcode_5_2:\r
4265;@LD E,E\r
4266opcode_5_B:\r
4267;@LD H,H\r
4268opcode_6_4:\r
4269;@LD L,L\r
4270opcode_6_D:\r
4271;@LD A,A\r
4272opcode_7_F:\r
4273 fetch 4\r
4274;@LD BC,NN\r
4275opcode_0_1:\r
4276 ldrb r0,[z80pc],#1\r
4277 ldrb r1,[z80pc],#1\r
4278 orr r0,r0,r1, lsl #8\r
4279 mov z80bc,r0, lsl #16\r
4280 fetch 10\r
4281;@LD (BC),A\r
4282opcode_0_2:\r
4283 mov r0,z80a, lsr #24\r
4284 mov r1,z80bc, lsr #16\r
4285 writemem8\r
4286 fetch 7\r
4287;@INC BC\r
4288opcode_0_3:\r
4289 add z80bc,z80bc,#1<<16\r
4290 fetch 6\r
4291;@INC B\r
4292opcode_0_4:\r
4293 opINC8H z80bc\r
4294 fetch 4\r
4295;@DEC B\r
4296opcode_0_5:\r
4297 opDEC8H z80bc\r
4298 fetch 4\r
4299;@LD B,N\r
4300opcode_0_6:\r
4301 ldrb r1,[z80pc],#1\r
4302 and z80bc,z80bc,#0xFF<<16\r
4303 orr z80bc,z80bc,r1, lsl #24\r
4304 fetch 7\r
4305;@RLCA\r
4306opcode_0_7:\r
4307 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4308 movs z80a,z80a, lsl #1\r
4309 orrcs z80a,z80a,#1<<24\r
4310 orrcs z80f,z80f,#1<<CFlag\r
4311 fetch 4\r
4312;@EX AF,AF'\r
4313opcode_0_8:\r
4314 add r1,cpucontext,#z80a2\r
4315 swp z80a,z80a,[r1]\r
4316 add r1,cpucontext,#z80f2\r
4317 swp z80f,z80f,[r1]\r
4318 fetch 4\r
4319;@ADD HL,BC\r
4320opcode_0_9:\r
4321 opADD16 z80hl z80bc\r
4322 fetch 11\r
4323;@LD A,(BC)\r
4324opcode_0_A:\r
4325 mov r0,z80bc, lsr #16\r
4326 readmem8\r
4327 mov z80a,r0, lsl #24\r
4328 fetch 7\r
4329;@DEC BC\r
4330opcode_0_B:\r
4331 sub z80bc,z80bc,#1<<16\r
4332 fetch 6\r
4333;@INC C\r
4334opcode_0_C:\r
4335 opINC8L z80bc\r
4336 fetch 4\r
4337;@DEC C\r
4338opcode_0_D:\r
4339 opDEC8L z80bc\r
4340 fetch 4\r
4341;@LD C,N\r
4342opcode_0_E:\r
4343 ldrb r1,[z80pc],#1\r
4344 and z80bc,z80bc,#0xFF<<24\r
4345 orr z80bc,z80bc,r1, lsl #16\r
4346 fetch 7\r
4347;@RRCA\r
4348opcode_0_F:\r
4349 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4350 movs z80a,z80a, lsr #25\r
4351 orrcs z80a,z80a,#1<<7\r
4352 orrcs z80f,z80f,#1<<CFlag\r
4353 mov z80a,z80a, lsl #24\r
4354 fetch 4\r
4355;@DJNZ $+2\r
4356opcode_1_0:\r
4357 sub z80bc,z80bc,#1<<24\r
4358 tst z80bc,#0xFF<<24\r
4359 ldrsb r1,[z80pc],#1\r
4360 addne z80pc,z80pc,r1\r
4361 subne z80_icount,z80_icount,#5\r
4362 fetch 8\r
4363\r
4364;@LD DE,NN\r
4365opcode_1_1:\r
4366 ldrb r0,[z80pc],#1\r
4367 ldrb r1,[z80pc],#1\r
4368 orr r0,r0,r1, lsl #8\r
4369 mov z80de,r0, lsl #16\r
4370 fetch 10\r
4371;@LD (DE),A\r
4372opcode_1_2:\r
4373 mov r0,z80a, lsr #24\r
4374 writemem8DE\r
4375 fetch 7\r
4376;@INC DE\r
4377opcode_1_3:\r
4378 add z80de,z80de,#1<<16\r
4379 fetch 6\r
4380;@INC D\r
4381opcode_1_4:\r
4382 opINC8H z80de\r
4383 fetch 4\r
4384;@DEC D\r
4385opcode_1_5:\r
4386 opDEC8H z80de\r
4387 fetch 4\r
4388;@LD D,N\r
4389opcode_1_6:\r
4390 ldrb r1,[z80pc],#1\r
4391 and z80de,z80de,#0xFF<<16\r
4392 orr z80de,z80de,r1, lsl #24\r
4393 fetch 7\r
4394;@RLA\r
4395opcode_1_7:\r
4396 tst z80f,#1<<CFlag\r
4397 orrne z80a,z80a,#1<<23\r
4398 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4399 movs z80a,z80a, lsl #1\r
4400 orrcs z80f,z80f,#1<<CFlag\r
4401 fetch 4\r
4402;@JR $+2\r
4403opcode_1_8:\r
4404 ldrsb r1,[z80pc],#1\r
4405 add z80pc,z80pc,r1\r
4406 fetch 12\r
4407;@ADD HL,DE\r
4408opcode_1_9:\r
4409 opADD16 z80hl z80de\r
4410 fetch 11\r
4411;@LD A,(DE)\r
4412opcode_1_A:\r
4413 mov r0,z80de, lsr #16\r
4414 readmem8\r
4415 mov z80a,r0, lsl #24\r
4416 fetch 7\r
4417;@DEC DE\r
4418opcode_1_B:\r
4419 sub z80de,z80de,#1<<16\r
4420 fetch 6\r
4421;@INC E\r
4422opcode_1_C:\r
4423 opINC8L z80de\r
4424 fetch 4\r
4425;@DEC E\r
4426opcode_1_D:\r
4427 opDEC8L z80de\r
4428 fetch 4\r
4429;@LD E,N\r
4430opcode_1_E:\r
4431 ldrb r0,[z80pc],#1\r
4432 and z80de,z80de,#0xFF<<24\r
4433 orr z80de,z80de,r0, lsl #16\r
4434 fetch 7\r
4435;@RRA\r
4436opcode_1_F:\r
4437 orr z80a,z80a,z80f,lsr#1 ;@get C\r
4438 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4439 movs z80a,z80a,ror#25\r
4440 orrcs z80f,z80f,#1<<CFlag\r
4441 mov z80a,z80a,lsl#24\r
4442 fetch 4\r
4443;@JR NZ,$+2\r
4444opcode_2_0:\r
4445 tst z80f,#1<<ZFlag\r
4446 beq opcode_1_8\r
4447 add z80pc,z80pc,#1\r
4448 fetch 7\r
4449;@LD HL,NN\r
4450opcode_2_1:\r
4451 ldrb r0,[z80pc],#1\r
4452 ldrb r1,[z80pc],#1\r
4453 orr r0,r0,r1, lsl #8\r
4454 mov z80hl,r0, lsl #16\r
4455 fetch 10\r
4456;@LD (NN),HL\r
4457opcode_ED_63:\r
4458 eatcycles 4\r
4459;@LD (NN),HL\r
4460opcode_2_2:\r
4461 ldrb r0,[z80pc],#1\r
4462 ldrb r1,[z80pc],#1\r
4463 orr r1,r0,r1, lsl #8\r
4464 mov r0,z80hl, lsr #16\r
4465 writemem16\r
4466 fetch 16\r
4467;@INC HL\r
4468opcode_2_3:\r
4469 add z80hl,z80hl,#1<<16\r
4470 fetch 6\r
4471;@INC H\r
4472opcode_2_4:\r
4473 opINC8H z80hl\r
4474 fetch 4\r
4475;@DEC H\r
4476opcode_2_5:\r
4477 opDEC8H z80hl\r
4478 fetch 4\r
4479;@LD H,N\r
4480opcode_2_6:\r
4481 ldrb r1,[z80pc],#1\r
4482 and z80hl,z80hl,#0xFF<<16\r
4483 orr z80hl,z80hl,r1, lsl #24\r
4484 fetch 7\r
4485DAATABLE_LOCAL: .word DAATable\r
4486;@DAA\r
4487opcode_2_7:\r
4488 mov r1,z80a, lsr #24\r
4489 tst z80f,#1<<CFlag\r
4490 orrne r1,r1,#256\r
4491 tst z80f,#1<<HFlag\r
4492 orrne r1,r1,#512\r
4493 tst z80f,#1<<NFlag\r
4494 orrne r1,r1,#1024\r
4495 ldr r2,DAATABLE_LOCAL\r
4496 add r2,r2,r1, lsl #1\r
4497 ldrh r1,[r2]\r
4498 and z80f,r1,#0xFF\r
4499 and r2,r1,#0xFF<<8\r
4500 mov z80a,r2, lsl #16\r
4501 fetch 4\r
4502;@JR Z,$+2\r
4503opcode_2_8:\r
4504 tst z80f,#1<<ZFlag\r
4505 bne opcode_1_8\r
4506 add z80pc,z80pc,#1\r
4507 fetch 7\r
4508;@ADD HL,HL\r
4509opcode_2_9:\r
4510 opADD16_2 z80hl\r
4511 fetch 11\r
4512;@LD HL,(NN)\r
4513opcode_ED_6B:\r
4514 eatcycles 4\r
4515;@LD HL,(NN)\r
4516opcode_2_A:\r
4517 ldrb r0,[z80pc],#1\r
4518 ldrb r1,[z80pc],#1\r
4519 orr r0,r0,r1, lsl #8\r
4520 readmem16\r
4521 mov z80hl,r0, lsl #16\r
4522 fetch 16\r
4523;@DEC HL\r
4524opcode_2_B:\r
4525 sub z80hl,z80hl,#1<<16\r
4526 fetch 6\r
4527;@INC L\r
4528opcode_2_C:\r
4529 opINC8L z80hl\r
4530 fetch 4\r
4531;@DEC L\r
4532opcode_2_D:\r
4533 opDEC8L z80hl\r
4534 fetch 4\r
4535;@LD L,N\r
4536opcode_2_E:\r
4537 ldrb r0,[z80pc],#1\r
4538 and z80hl,z80hl,#0xFF<<24\r
4539 orr z80hl,z80hl,r0, lsl #16\r
4540 fetch 7\r
4541;@CPL\r
4542opcode_2_F:\r
4543 eor z80a,z80a,#0xFF<<24\r
4544 orr z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4545 fetch 4\r
4546;@JR NC,$+2\r
4547opcode_3_0:\r
4548 tst z80f,#1<<CFlag\r
4549 beq opcode_1_8\r
4550 add z80pc,z80pc,#1\r
4551 fetch 7\r
4552;@LD SP,NN\r
4553opcode_3_1:\r
4554 ldrb r0,[z80pc],#1\r
4555 ldrb r1,[z80pc],#1\r
4556\r
4557.if FAST_Z80SP\r
4558 orr r0,r0,r1, lsl #8\r
4559 rebasesp\r
4560 mov z80sp,r0\r
4561.else\r
4562 orr z80sp,r0,r1, lsl #8\r
4563.endif\r
4564 fetch 10\r
4565;@LD (NN),A\r
4566opcode_3_2:\r
4567 ldrb r0,[z80pc],#1\r
4568 ldrb r1,[z80pc],#1\r
4569 orr r1,r0,r1, lsl #8\r
4570 mov r0,z80a, lsr #24\r
4571 writemem8\r
4572 fetch 13\r
4573;@INC SP\r
4574opcode_3_3:\r
4575 add z80sp,z80sp,#1\r
4576 fetch 6\r
4577;@INC (HL)\r
4578opcode_3_4:\r
4579 readmem8HL\r
4580 opINC8b\r
4581 writemem8HL\r
4582 fetch 11\r
4583;@DEC (HL)\r
4584opcode_3_5:\r
4585 readmem8HL\r
4586 opDEC8b\r
4587 writemem8HL\r
4588 fetch 11\r
4589;@LD (HL),N\r
4590opcode_3_6:\r
4591 ldrb r0,[z80pc],#1\r
4592 writemem8HL\r
4593 fetch 10\r
4594;@SCF\r
4595opcode_3_7:\r
4596 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4597 orr z80f,z80f,#1<<CFlag\r
4598 fetch 4\r
4599;@JR C,$+2\r
4600opcode_3_8:\r
4601 tst z80f,#1<<CFlag\r
4602 bne opcode_1_8\r
4603 add z80pc,z80pc,#1\r
4604 fetch 8\r
4605;@ADD HL,SP\r
4606opcode_3_9:\r
4607.if FAST_Z80SP\r
4608 ldr r0,[cpucontext,#z80sp_base]\r
4609 sub r0,z80sp,r0\r
4610 opADD16s z80hl r0 16\r
4611.else\r
4612 opADD16s z80hl z80sp 16\r
4613.endif\r
4614 fetch 11\r
4615;@LD A,(NN)\r
4616opcode_3_A:\r
4617 ldrb r0,[z80pc],#1\r
4618 ldrb r1,[z80pc],#1\r
4619 orr r0,r0,r1, lsl #8\r
4620 readmem8\r
4621 mov z80a,r0, lsl #24\r
4622 fetch 11\r
4623;@DEC SP\r
4624opcode_3_B:\r
4625 sub z80sp,z80sp,#1\r
4626 fetch 6\r
4627;@INC A\r
4628opcode_3_C:\r
4629 opINC8 z80a\r
4630 fetch 4\r
4631;@DEC A\r
4632opcode_3_D:\r
4633 opDEC8 z80a\r
4634 fetch 4\r
4635;@LD A,N\r
4636opcode_3_E:\r
4637 ldrb r0,[z80pc],#1\r
4638 mov z80a,r0, lsl #24\r
4639 fetch 7\r
4640;@CCF\r
4641opcode_3_F:\r
4642 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4643 tst z80f,#1<<CFlag\r
4644 orrne z80f,z80f,#1<<HFlag\r
4645 eor z80f,z80f,#1<<CFlag\r
4646 fetch 4\r
4647\r
4648;@LD B,C\r
4649opcode_4_1:\r
4650 and z80bc,z80bc,#0xFF<<16\r
4651 orr z80bc,z80bc,z80bc, lsl #8\r
4652 fetch 4\r
4653;@LD B,D\r
4654opcode_4_2:\r
4655 and z80bc,z80bc,#0xFF<<16\r
4656 and r1,z80de,#0xFF<<24\r
4657 orr z80bc,z80bc,r1\r
4658 fetch 4\r
4659;@LD B,E\r
4660opcode_4_3:\r
4661 and z80bc,z80bc,#0xFF<<16\r
4662 and r1,z80de,#0xFF<<16\r
4663 orr z80bc,z80bc,r1, lsl #8\r
4664 fetch 4\r
4665;@LD B,H\r
4666opcode_4_4:\r
4667 and z80bc,z80bc,#0xFF<<16\r
4668 and r1,z80hl,#0xFF<<24\r
4669 orr z80bc,z80bc,r1\r
4670 fetch 4\r
4671;@LD B,L\r
4672opcode_4_5:\r
4673 and z80bc,z80bc,#0xFF<<16\r
4674 and r1,z80hl,#0xFF<<16\r
4675 orr z80bc,z80bc,r1, lsl #8\r
4676 fetch 4\r
4677;@LD B,(HL)\r
4678opcode_4_6:\r
4679 readmem8HL\r
4680 and z80bc,z80bc,#0xFF<<16\r
4681 orr z80bc,z80bc,r0, lsl #24\r
4682 fetch 7\r
4683;@LD B,A\r
4684opcode_4_7:\r
4685 and z80bc,z80bc,#0xFF<<16\r
4686 orr z80bc,z80bc,z80a\r
4687 fetch 4\r
4688;@LD C,B\r
4689opcode_4_8:\r
4690 and z80bc,z80bc,#0xFF<<24\r
4691 orr z80bc,z80bc,z80bc, lsr #8\r
4692 fetch 4\r
4693;@LD C,D\r
4694opcode_4_A:\r
4695 and z80bc,z80bc,#0xFF<<24\r
4696 and r1,z80de,#0xFF<<24\r
4697 orr z80bc,z80bc,r1, lsr #8\r
4698 fetch 4\r
4699;@LD C,E\r
4700opcode_4_B:\r
4701 and z80bc,z80bc,#0xFF<<24\r
4702 and r1,z80de,#0xFF<<16\r
4703 orr z80bc,z80bc,r1 \r
4704 fetch 4\r
4705;@LD C,H\r
4706opcode_4_C:\r
4707 and z80bc,z80bc,#0xFF<<24\r
4708 and r1,z80hl,#0xFF<<24\r
4709 orr z80bc,z80bc,r1, lsr #8\r
4710 fetch 4\r
4711;@LD C,L\r
4712opcode_4_D:\r
4713 and z80bc,z80bc,#0xFF<<24\r
4714 and r1,z80hl,#0xFF<<16\r
4715 orr z80bc,z80bc,r1 \r
4716 fetch 4\r
4717;@LD C,(HL)\r
4718opcode_4_E:\r
4719 readmem8HL\r
4720 and z80bc,z80bc,#0xFF<<24\r
4721 orr z80bc,z80bc,r0, lsl #16\r
4722 fetch 7\r
4723;@LD C,A\r
4724opcode_4_F:\r
4725 and z80bc,z80bc,#0xFF<<24\r
4726 orr z80bc,z80bc,z80a, lsr #8\r
4727 fetch 4\r
4728;@LD D,B\r
4729opcode_5_0:\r
4730 and z80de,z80de,#0xFF<<16\r
4731 and r1,z80bc,#0xFF<<24\r
4732 orr z80de,z80de,r1\r
4733 fetch 4\r
4734;@LD D,C\r
4735opcode_5_1:\r
4736 and z80de,z80de,#0xFF<<16\r
4737 orr z80de,z80de,z80bc, lsl #8\r
4738 fetch 4\r
4739;@LD D,E\r
4740opcode_5_3:\r
4741 and z80de,z80de,#0xFF<<16\r
4742 orr z80de,z80de,z80de, lsl #8\r
4743 fetch 4\r
4744;@LD D,H\r
4745opcode_5_4:\r
4746 and z80de,z80de,#0xFF<<16\r
4747 and r1,z80hl,#0xFF<<24\r
4748 orr z80de,z80de,r1\r
4749 fetch 4\r
4750;@LD D,L\r
4751opcode_5_5:\r
4752 and z80de,z80de,#0xFF<<16\r
4753 orr z80de,z80de,z80hl, lsl #8\r
4754 fetch 4\r
4755;@LD D,(HL)\r
4756opcode_5_6:\r
4757 readmem8HL\r
4758 and z80de,z80de,#0xFF<<16\r
4759 orr z80de,z80de,r0, lsl #24\r
4760 fetch 7\r
4761;@LD D,A\r
4762opcode_5_7:\r
4763 and z80de,z80de,#0xFF<<16\r
4764 orr z80de,z80de,z80a\r
4765 fetch 4\r
4766;@LD E,B\r
4767opcode_5_8:\r
4768 and z80de,z80de,#0xFF<<24\r
4769 and r1,z80bc,#0xFF<<24\r
4770 orr z80de,z80de,r1, lsr #8\r
4771 fetch 4\r
4772;@LD E,C\r
4773opcode_5_9:\r
4774 and z80de,z80de,#0xFF<<24\r
4775 and r1,z80bc,#0xFF<<16\r
4776 orr z80de,z80de,r1 \r
4777 fetch 4\r
4778;@LD E,D\r
4779opcode_5_A:\r
4780 and z80de,z80de,#0xFF<<24\r
4781 orr z80de,z80de,z80de, lsr #8\r
4782 fetch 4\r
4783;@LD E,H\r
4784opcode_5_C:\r
4785 and z80de,z80de,#0xFF<<24\r
4786 and r1,z80hl,#0xFF<<24\r
4787 orr z80de,z80de,r1, lsr #8\r
4788 fetch 4\r
4789;@LD E,L\r
4790opcode_5_D:\r
4791 and z80de,z80de,#0xFF<<24\r
4792 and r1,z80hl,#0xFF<<16\r
4793 orr z80de,z80de,r1 \r
4794 fetch 4\r
4795;@LD E,(HL)\r
4796opcode_5_E:\r
4797 readmem8HL\r
4798 and z80de,z80de,#0xFF<<24\r
4799 orr z80de,z80de,r0, lsl #16\r
4800 fetch 7\r
4801;@LD E,A\r
4802opcode_5_F:\r
4803 and z80de,z80de,#0xFF<<24\r
4804 orr z80de,z80de,z80a, lsr #8\r
4805 fetch 4\r
4806\r
4807;@LD H,B\r
4808opcode_6_0:\r
4809 and z80hl,z80hl,#0xFF<<16\r
4810 and r1,z80bc,#0xFF<<24\r
4811 orr z80hl,z80hl,r1\r
4812 fetch 4\r
4813;@LD H,C\r
4814opcode_6_1:\r
4815 and z80hl,z80hl,#0xFF<<16\r
4816 orr z80hl,z80hl,z80bc, lsl #8\r
4817 fetch 4\r
4818;@LD H,D\r
4819opcode_6_2:\r
4820 and z80hl,z80hl,#0xFF<<16\r
4821 and r1,z80de,#0xFF<<24\r
4822 orr z80hl,z80hl,r1\r
4823 fetch 4\r
4824;@LD H,E\r
4825opcode_6_3:\r
4826 and z80hl,z80hl,#0xFF<<16\r
4827 orr z80hl,z80hl,z80de, lsl #8\r
4828 fetch 4\r
4829;@LD H,L\r
4830opcode_6_5:\r
4831 and z80hl,z80hl,#0xFF<<16\r
4832 orr z80hl,z80hl,z80hl, lsl #8\r
4833 fetch 4\r
4834;@LD H,(HL)\r
4835opcode_6_6:\r
4836 readmem8HL\r
4837 and z80hl,z80hl,#0xFF<<16\r
4838 orr z80hl,z80hl,r0, lsl #24\r
4839 fetch 7\r
4840;@LD H,A\r
4841opcode_6_7:\r
4842 and z80hl,z80hl,#0xFF<<16\r
4843 orr z80hl,z80hl,z80a\r
4844 fetch 4\r
4845\r
4846;@LD L,B\r
4847opcode_6_8:\r
4848 and z80hl,z80hl,#0xFF<<24\r
4849 and r1,z80bc,#0xFF<<24\r
4850 orr z80hl,z80hl,r1, lsr #8\r
4851 fetch 4\r
4852;@LD L,C\r
4853opcode_6_9:\r
4854 and z80hl,z80hl,#0xFF<<24\r
4855 and r1,z80bc,#0xFF<<16\r
4856 orr z80hl,z80hl,r1\r
4857 fetch 4\r
4858;@LD L,D\r
4859opcode_6_A:\r
4860 and z80hl,z80hl,#0xFF<<24\r
4861 and r1,z80de,#0xFF<<24\r
4862 orr z80hl,z80hl,r1, lsr #8\r
4863 fetch 4\r
4864;@LD L,E\r
4865opcode_6_B:\r
4866 and z80hl,z80hl,#0xFF<<24\r
4867 and r1,z80de,#0xFF<<16\r
4868 orr z80hl,z80hl,r1\r
4869 fetch 4\r
4870;@LD L,H\r
4871opcode_6_C:\r
4872 and z80hl,z80hl,#0xFF<<24\r
4873 orr z80hl,z80hl,z80hl, lsr #8\r
4874 fetch 4\r
4875;@LD L,(HL)\r
4876opcode_6_E:\r
4877 readmem8HL\r
4878 and z80hl,z80hl,#0xFF<<24\r
4879 orr z80hl,z80hl,r0, lsl #16\r
4880 fetch 7\r
4881;@LD L,A\r
4882opcode_6_F:\r
4883 and z80hl,z80hl,#0xFF<<24\r
4884 orr z80hl,z80hl,z80a, lsr #8\r
4885 fetch 4\r
4886\r
4887;@LD (HL),B\r
4888opcode_7_0:\r
4889 mov r0,z80bc, lsr #24\r
4890 writemem8HL\r
4891 fetch 7\r
4892;@LD (HL),C\r
4893opcode_7_1:\r
4894 mov r0,z80bc, lsr #16\r
4895 and r0,r0,#0xFF\r
4896 writemem8HL\r
4897 fetch 7\r
4898;@LD (HL),D\r
4899opcode_7_2:\r
4900 mov r0,z80de, lsr #24\r
4901 writemem8HL\r
4902 fetch 7\r
4903;@LD (HL),E\r
4904opcode_7_3:\r
4905 mov r0,z80de, lsr #16\r
4906 and r0,r0,#0xFF\r
4907 writemem8HL\r
4908 fetch 7\r
4909;@LD (HL),H\r
4910opcode_7_4:\r
4911 mov r0,z80hl, lsr #24\r
4912 writemem8HL\r
4913 fetch 7\r
4914;@LD (HL),L\r
4915opcode_7_5:\r
4916 mov r1,z80hl, lsr #16\r
4917 and r0,r1,#0xFF\r
4918 writemem8\r
4919 fetch 7\r
4920;@HALT\r
4921opcode_7_6:\r
4922 sub z80pc,z80pc,#1\r
4923 ldrb r0,[cpucontext,#z80if]\r
4924 orr r0,r0,#Z80_HALT\r
4925 strb r0,[cpucontext,#z80if]\r
4926 b z80_execute_end\r
4927;@LD (HL),A\r
4928opcode_7_7:\r
4929 mov r0,z80a, lsr #24\r
4930 writemem8HL\r
4931 fetch 7\r
4932\r
4933;@LD A,B\r
4934opcode_7_8:\r
4935 and z80a,z80bc,#0xFF<<24\r
4936 fetch 4\r
4937;@LD A,C\r
4938opcode_7_9:\r
4939 mov z80a,z80bc, lsl #8\r
4940 fetch 4\r
4941;@LD A,D\r
4942opcode_7_A:\r
4943 and z80a,z80de,#0xFF<<24\r
4944 fetch 4\r
4945;@LD A,E\r
4946opcode_7_B:\r
4947 mov z80a,z80de, lsl #8\r
4948 fetch 4\r
4949;@LD A,H\r
4950opcode_7_C:\r
4951 and z80a,z80hl,#0xFF<<24\r
4952 fetch 4\r
4953;@LD A,L\r
4954opcode_7_D:\r
4955 mov z80a,z80hl, lsl #8\r
4956 fetch 4\r
4957;@LD A,(HL)\r
4958opcode_7_E:\r
4959 readmem8HL\r
4960 mov z80a,r0, lsl #24\r
4961 fetch 7\r
4962\r
4963;@ADD A,B\r
4964opcode_8_0:\r
4965 opADDH z80bc\r
4966;@ADD A,C\r
4967opcode_8_1:\r
4968 opADDL z80bc\r
4969;@ADD A,D\r
4970opcode_8_2:\r
4971 opADDH z80de\r
4972;@ADD A,E\r
4973opcode_8_3:\r
4974 opADDL z80de\r
4975;@ADD A,H\r
4976opcode_8_4:\r
4977 opADDH z80hl\r
4978;@ADD A,L\r
4979opcode_8_5:\r
4980 opADDL z80hl\r
4981;@ADD A,(HL)\r
4982opcode_8_6:\r
4983 readmem8HL\r
4984 opADDb\r
4985 fetch 7\r
4986;@ADD A,A\r
4987opcode_8_7:\r
4988 opADDA\r
4989\r
4990;@ADC A,B\r
4991opcode_8_8:\r
4992 opADCH z80bc\r
4993;@ADC A,C\r
4994opcode_8_9:\r
4995 opADCL z80bc\r
4996;@ADC A,D\r
4997opcode_8_A:\r
4998 opADCH z80de\r
4999;@ADC A,E\r
5000opcode_8_B:\r
5001 opADCL z80de\r
5002;@ADC A,H\r
5003opcode_8_C:\r
5004 opADCH z80hl\r
5005;@ADC A,L\r
5006opcode_8_D:\r
5007 opADCL z80hl\r
5008;@ADC A,(HL)\r
5009opcode_8_E:\r
5010 readmem8HL\r
5011 opADCb\r
5012 fetch 7\r
5013;@ADC A,A\r
5014opcode_8_F:\r
5015 opADCA\r
5016\r
5017;@SUB B\r
5018opcode_9_0:\r
5019 opSUBH z80bc\r
5020;@SUB C\r
5021opcode_9_1:\r
5022 opSUBL z80bc\r
5023;@SUB D\r
5024opcode_9_2:\r
5025 opSUBH z80de\r
5026;@SUB E\r
5027opcode_9_3:\r
5028 opSUBL z80de\r
5029;@SUB H\r
5030opcode_9_4:\r
5031 opSUBH z80hl\r
5032;@SUB L\r
5033opcode_9_5:\r
5034 opSUBL z80hl\r
5035;@SUB (HL)\r
5036opcode_9_6:\r
5037 readmem8HL\r
5038 opSUBb\r
5039 fetch 7\r
5040;@SUB A\r
5041opcode_9_7:\r
5042 opSUBA\r
5043\r
5044;@SBC B \r
5045opcode_9_8:\r
5046 opSBCH z80bc\r
5047;@SBC C\r
5048opcode_9_9:\r
5049 opSBCL z80bc\r
5050;@SBC D\r
5051opcode_9_A:\r
5052 opSBCH z80de\r
5053;@SBC E\r
5054opcode_9_B:\r
5055 opSBCL z80de\r
5056;@SBC H\r
5057opcode_9_C:\r
5058 opSBCH z80hl\r
5059;@SBC L\r
5060opcode_9_D:\r
5061 opSBCL z80hl\r
5062;@SBC (HL)\r
5063opcode_9_E:\r
5064 readmem8HL\r
5065 opSBCb\r
5066 fetch 7\r
5067;@SBC A\r
5068opcode_9_F:\r
5069 opSBCA\r
5070\r
5071;@AND B\r
5072opcode_A_0:\r
5073 opANDH z80bc\r
5074;@AND C\r
5075opcode_A_1:\r
5076 opANDL z80bc\r
5077;@AND D\r
5078opcode_A_2:\r
5079 opANDH z80de\r
5080;@AND E\r
5081opcode_A_3:\r
5082 opANDL z80de\r
5083;@AND H\r
5084opcode_A_4:\r
5085 opANDH z80hl\r
5086;@AND L\r
5087opcode_A_5:\r
5088 opANDL z80hl\r
5089;@AND (HL)\r
5090opcode_A_6:\r
5091 readmem8HL\r
5092 opANDb\r
5093 fetch 7\r
5094;@AND A\r
5095opcode_A_7:\r
5096 opANDA\r
5097\r
5098;@XOR B\r
5099opcode_A_8:\r
5100 opXORH z80bc\r
5101;@XOR C\r
5102opcode_A_9:\r
5103 opXORL z80bc\r
5104;@XOR D\r
5105opcode_A_A:\r
5106 opXORH z80de\r
5107;@XOR E\r
5108opcode_A_B:\r
5109 opXORL z80de\r
5110;@XOR H\r
5111opcode_A_C:\r
5112 opXORH z80hl\r
5113;@XOR L\r
5114opcode_A_D:\r
5115 opXORL z80hl\r
5116;@XOR (HL)\r
5117opcode_A_E:\r
5118 readmem8HL\r
5119 opXORb\r
5120 fetch 7\r
5121;@XOR A\r
5122opcode_A_F:\r
5123 opXORA\r
5124\r
5125;@OR B\r
5126opcode_B_0:\r
5127 opORH z80bc\r
5128;@OR C\r
5129opcode_B_1:\r
5130 opORL z80bc\r
5131;@OR D\r
5132opcode_B_2:\r
5133 opORH z80de\r
5134;@OR E\r
5135opcode_B_3:\r
5136 opORL z80de\r
5137;@OR H\r
5138opcode_B_4:\r
5139 opORH z80hl\r
5140;@OR L\r
5141opcode_B_5:\r
5142 opORL z80hl\r
5143;@OR (HL)\r
5144opcode_B_6:\r
5145 readmem8HL\r
5146 opORb\r
5147 fetch 7\r
5148;@OR A\r
5149opcode_B_7:\r
5150 opORA\r
5151\r
5152;@CP B\r
5153opcode_B_8:\r
5154 opCPH z80bc\r
5155;@CP C\r
5156opcode_B_9:\r
5157 opCPL z80bc\r
5158;@CP D\r
5159opcode_B_A:\r
5160 opCPH z80de\r
5161;@CP E\r
5162opcode_B_B:\r
5163 opCPL z80de\r
5164;@CP H\r
5165opcode_B_C:\r
5166 opCPH z80hl\r
5167;@CP L\r
5168opcode_B_D:\r
5169 opCPL z80hl\r
5170;@CP (HL)\r
5171opcode_B_E:\r
5172 readmem8HL\r
5173 opCPb\r
5174 fetch 7\r
5175;@CP A\r
5176opcode_B_F:\r
5177 opCPA\r
5178\r
5179;@RET NZ\r
5180opcode_C_0:\r
5181 tst z80f,#1<<ZFlag\r
5182 beq opcode_C_9 ;@unconditional RET\r
5183 fetch 5\r
5184\r
5185;@POP BC\r
5186opcode_C_1:\r
5187 opPOPreg z80bc\r
5188\r
5189;@JP NZ,$+3\r
5190opcode_C_2:\r
5191 tst z80f,#1<<ZFlag\r
5192 beq opcode_C_3 ;@unconditional JP\r
5193 add z80pc,z80pc,#2\r
5194 fetch 10\r
5195;@JP $+3\r
5196opcode_C_3:\r
5197 ldrb r0,[z80pc],#1\r
5198 ldrb r1,[z80pc],#1\r
5199 orr r0,r0,r1, lsl #8\r
5200 rebasepc\r
5201 fetch 10\r
5202;@CALL NZ,NN\r
5203opcode_C_4:\r
5204 tst z80f,#1<<ZFlag\r
5205 beq opcode_C_D ;@unconditional CALL\r
5206 add z80pc,z80pc,#2\r
5207 fetch 10\r
5208\r
5209;@PUSH BC\r
5210opcode_C_5:\r
5211 opPUSHreg z80bc\r
5212 fetch 11\r
5213;@ADD A,N\r
5214opcode_C_6:\r
5215 ldrb r0,[z80pc],#1\r
5216 opADDb\r
5217 fetch 7\r
5218;@RST 0\r
5219opcode_C_7:\r
5220 opRST 0x00\r
5221\r
5222;@RET Z\r
5223opcode_C_8:\r
5224 tst z80f,#1<<ZFlag\r
5225 bne opcode_C_9 ;@unconditional RET\r
5226 fetch 5\r
5227;@RET\r
5228opcode_C_9:\r
5229 opPOP\r
5230 rebasepc\r
5231 fetch 10\r
5232;@JP Z,$+3\r
5233opcode_C_A:\r
5234 tst z80f,#1<<ZFlag\r
5235 bne opcode_C_3 ;@unconditional JP\r
5236 add z80pc,z80pc,#2\r
5237 fetch 10\r
5238\r
5239;@This reads this opcodes_CB lookup table to find the location of\r
5240;@the CB sub for the intruction and then branches to that location\r
5241opcode_C_B:\r
5242 ldrb r0,[z80pc],#1\r
5243 ldr pc,[pc,r0, lsl #2]\r
5244opcodes_CB: .word 0x00000000\r
5245 .word opcode_CB_00,opcode_CB_01,opcode_CB_02,opcode_CB_03,opcode_CB_04,opcode_CB_05,opcode_CB_06,opcode_CB_07\r
5246 .word opcode_CB_08,opcode_CB_09,opcode_CB_0A,opcode_CB_0B,opcode_CB_0C,opcode_CB_0D,opcode_CB_0E,opcode_CB_0F\r
5247 .word opcode_CB_10,opcode_CB_11,opcode_CB_12,opcode_CB_13,opcode_CB_14,opcode_CB_15,opcode_CB_16,opcode_CB_17\r
5248 .word opcode_CB_18,opcode_CB_19,opcode_CB_1A,opcode_CB_1B,opcode_CB_1C,opcode_CB_1D,opcode_CB_1E,opcode_CB_1F\r
5249 .word opcode_CB_20,opcode_CB_21,opcode_CB_22,opcode_CB_23,opcode_CB_24,opcode_CB_25,opcode_CB_26,opcode_CB_27\r
5250 .word opcode_CB_28,opcode_CB_29,opcode_CB_2A,opcode_CB_2B,opcode_CB_2C,opcode_CB_2D,opcode_CB_2E,opcode_CB_2F\r
5251 .word opcode_CB_30,opcode_CB_31,opcode_CB_32,opcode_CB_33,opcode_CB_34,opcode_CB_35,opcode_CB_36,opcode_CB_37\r
5252 .word opcode_CB_38,opcode_CB_39,opcode_CB_3A,opcode_CB_3B,opcode_CB_3C,opcode_CB_3D,opcode_CB_3E,opcode_CB_3F\r
5253 .word opcode_CB_40,opcode_CB_41,opcode_CB_42,opcode_CB_43,opcode_CB_44,opcode_CB_45,opcode_CB_46,opcode_CB_47\r
5254 .word opcode_CB_48,opcode_CB_49,opcode_CB_4A,opcode_CB_4B,opcode_CB_4C,opcode_CB_4D,opcode_CB_4E,opcode_CB_4F\r
5255 .word opcode_CB_50,opcode_CB_51,opcode_CB_52,opcode_CB_53,opcode_CB_54,opcode_CB_55,opcode_CB_56,opcode_CB_57\r
5256 .word opcode_CB_58,opcode_CB_59,opcode_CB_5A,opcode_CB_5B,opcode_CB_5C,opcode_CB_5D,opcode_CB_5E,opcode_CB_5F\r
5257 .word opcode_CB_60,opcode_CB_61,opcode_CB_62,opcode_CB_63,opcode_CB_64,opcode_CB_65,opcode_CB_66,opcode_CB_67\r
5258 .word opcode_CB_68,opcode_CB_69,opcode_CB_6A,opcode_CB_6B,opcode_CB_6C,opcode_CB_6D,opcode_CB_6E,opcode_CB_6F\r
5259 .word opcode_CB_70,opcode_CB_71,opcode_CB_72,opcode_CB_73,opcode_CB_74,opcode_CB_75,opcode_CB_76,opcode_CB_77\r
5260 .word opcode_CB_78,opcode_CB_79,opcode_CB_7A,opcode_CB_7B,opcode_CB_7C,opcode_CB_7D,opcode_CB_7E,opcode_CB_7F\r
5261 .word opcode_CB_80,opcode_CB_81,opcode_CB_82,opcode_CB_83,opcode_CB_84,opcode_CB_85,opcode_CB_86,opcode_CB_87\r
5262 .word opcode_CB_88,opcode_CB_89,opcode_CB_8A,opcode_CB_8B,opcode_CB_8C,opcode_CB_8D,opcode_CB_8E,opcode_CB_8F\r
5263 .word opcode_CB_90,opcode_CB_91,opcode_CB_92,opcode_CB_93,opcode_CB_94,opcode_CB_95,opcode_CB_96,opcode_CB_97\r
5264 .word opcode_CB_98,opcode_CB_99,opcode_CB_9A,opcode_CB_9B,opcode_CB_9C,opcode_CB_9D,opcode_CB_9E,opcode_CB_9F\r
5265 .word opcode_CB_A0,opcode_CB_A1,opcode_CB_A2,opcode_CB_A3,opcode_CB_A4,opcode_CB_A5,opcode_CB_A6,opcode_CB_A7\r
5266 .word opcode_CB_A8,opcode_CB_A9,opcode_CB_AA,opcode_CB_AB,opcode_CB_AC,opcode_CB_AD,opcode_CB_AE,opcode_CB_AF\r
5267 .word opcode_CB_B0,opcode_CB_B1,opcode_CB_B2,opcode_CB_B3,opcode_CB_B4,opcode_CB_B5,opcode_CB_B6,opcode_CB_B7\r
5268 .word opcode_CB_B8,opcode_CB_B9,opcode_CB_BA,opcode_CB_BB,opcode_CB_BC,opcode_CB_BD,opcode_CB_BE,opcode_CB_BF\r
5269 .word opcode_CB_C0,opcode_CB_C1,opcode_CB_C2,opcode_CB_C3,opcode_CB_C4,opcode_CB_C5,opcode_CB_C6,opcode_CB_C7\r
5270 .word opcode_CB_C8,opcode_CB_C9,opcode_CB_CA,opcode_CB_CB,opcode_CB_CC,opcode_CB_CD,opcode_CB_CE,opcode_CB_CF\r
5271 .word opcode_CB_D0,opcode_CB_D1,opcode_CB_D2,opcode_CB_D3,opcode_CB_D4,opcode_CB_D5,opcode_CB_D6,opcode_CB_D7\r
5272 .word opcode_CB_D8,opcode_CB_D9,opcode_CB_DA,opcode_CB_DB,opcode_CB_DC,opcode_CB_DD,opcode_CB_DE,opcode_CB_DF\r
5273 .word opcode_CB_E0,opcode_CB_E1,opcode_CB_E2,opcode_CB_E3,opcode_CB_E4,opcode_CB_E5,opcode_CB_E6,opcode_CB_E7\r
5274 .word opcode_CB_E8,opcode_CB_E9,opcode_CB_EA,opcode_CB_EB,opcode_CB_EC,opcode_CB_ED,opcode_CB_EE,opcode_CB_EF\r
5275 .word opcode_CB_F0,opcode_CB_F1,opcode_CB_F2,opcode_CB_F3,opcode_CB_F4,opcode_CB_F5,opcode_CB_F6,opcode_CB_F7\r
5276 .word opcode_CB_F8,opcode_CB_F9,opcode_CB_FA,opcode_CB_FB,opcode_CB_FC,opcode_CB_FD,opcode_CB_FE,opcode_CB_FF\r
5277\r
5278;@CALL Z,NN\r
5279opcode_C_C:\r
5280 tst z80f,#1<<ZFlag\r
5281 bne opcode_C_D ;@unconditional CALL\r
5282 add z80pc,z80pc,#2\r
5283 fetch 10\r
5284;@CALL NN\r
5285opcode_C_D:\r
5286 ldrb r0,[z80pc],#1\r
5287 ldrb r1,[z80pc],#1\r
5288 ldr r2,[cpucontext,#z80pc_base]\r
5289 sub r2,z80pc,r2\r
5290 orr z80pc,r0,r1, lsl #8\r
5291 opPUSHareg r2\r
5292 mov r0,z80pc\r
5293 rebasepc\r
5294 fetch 17\r
5295;@ADC A,N\r
5296opcode_C_E:\r
5297 ldrb r0,[z80pc],#1\r
5298 opADCb\r
5299 fetch 7\r
5300;@RST 8H\r
5301opcode_C_F:\r
5302 opRST 0x08\r
5303\r
5304;@RET NC\r
5305opcode_D_0:\r
5306 tst z80f,#1<<CFlag\r
5307 beq opcode_C_9 ;@unconditional RET\r
5308 fetch 5\r
5309;@POP DE\r
5310opcode_D_1:\r
5311 opPOPreg z80de\r
5312\r
5313;@JP NC, $+3\r
5314opcode_D_2 :\r
5315 tst z80f,#1<<CFlag\r
5316 beq opcode_C_3 ;@unconditional JP\r
5317 add z80pc,z80pc,#2\r
5318 fetch 10\r
5319;@OUT (N),A\r
5320opcode_D_3:\r
5321 ldrb r0,[z80pc],#1\r
5322 orr r0,r0,z80a,lsr#16\r
5323 mov r1,z80a, lsr #24\r
5324 opOUT\r
5325 fetch 11\r
5326;@CALL NC,NN\r
5327opcode_D_4:\r
5328 tst z80f,#1<<CFlag\r
5329 beq opcode_C_D ;@unconditional CALL\r
5330 add z80pc,z80pc,#2\r
5331 fetch 10\r
5332;@PUSH DE\r
5333opcode_D_5:\r
5334 opPUSHreg z80de\r
5335 fetch 11\r
5336;@SUB N\r
5337opcode_D_6:\r
5338 ldrb r0,[z80pc],#1\r
5339 opSUBb\r
5340 fetch 7\r
5341\r
5342;@RST 10H\r
5343opcode_D_7:\r
5344 opRST 0x10\r
5345\r
5346;@RET C\r
5347opcode_D_8:\r
5348 tst z80f,#1<<CFlag\r
5349 bne opcode_C_9 ;@unconditional RET\r
5350 fetch 5\r
5351;@EXX\r
5352opcode_D_9:\r
5353 add r1,cpucontext,#z80bc2\r
5354 swp z80bc,z80bc,[r1]\r
5355 add r1,cpucontext,#z80de2\r
5356 swp z80de,z80de,[r1]\r
5357 add r1,cpucontext,#z80hl2\r
5358 swp z80hl,z80hl,[r1]\r
5359 fetch 4\r
5360;@JP C,$+3\r
5361opcode_D_A:\r
5362 tst z80f,#1<<CFlag\r
5363 bne opcode_C_3 ;@unconditional JP\r
5364 add z80pc,z80pc,#2\r
5365 fetch 10\r
5366;@IN A,(N)\r
5367opcode_D_B:\r
5368 ldrb r0,[z80pc],#1\r
5369 orr r0,r0,z80a,lsr#16\r
5370 opIN\r
5371 mov z80a,r0, lsl #24 ;@ r0 = data read\r
5372 fetch 11\r
5373;@CALL C,NN\r
5374opcode_D_C:\r
5375 tst z80f,#1<<CFlag\r
5376 bne opcode_C_D ;@unconditional CALL\r
5377 add z80pc,z80pc,#2\r
5378 fetch 10\r
5379\r
5380;@opcodes_DD\r
5381opcode_D_D:\r
5382 add z80xx,cpucontext,#z80ix\r
5383 b opcode_D_D_F_D\r
5384opcode_F_D:\r
5385 add z80xx,cpucontext,#z80iy\r
5386opcode_D_D_F_D:\r
5387 ldrb r0,[z80pc],#1\r
5388 ldr pc,[pc,r0, lsl #2]\r
5389opcodes_DD: .word 0x00000000\r
5390 .word opcode_0_0, opcode_0_1, opcode_0_2, opcode_0_3, opcode_0_4, opcode_0_5, opcode_0_6, opcode_0_7\r
5391 .word opcode_0_8, opcode_DD_09,opcode_0_A, opcode_0_B, opcode_0_C, opcode_0_D, opcode_0_E, opcode_0_F\r
5392 .word opcode_1_0, opcode_1_1, opcode_1_2, opcode_1_3, opcode_1_4, opcode_1_5, opcode_1_6, opcode_1_7\r
5393 .word opcode_1_8, opcode_DD_19,opcode_1_A, opcode_1_B, opcode_1_C, opcode_1_D, opcode_1_E, opcode_1_F\r
5394 .word opcode_2_0, opcode_DD_21,opcode_DD_22,opcode_DD_23,opcode_DD_24,opcode_DD_25,opcode_DD_26,opcode_2_7\r
5395 .word opcode_2_8, opcode_DD_29,opcode_DD_2A,opcode_DD_2B,opcode_DD_2C,opcode_DD_2D,opcode_DD_2E,opcode_2_F\r
5396 .word opcode_3_0, opcode_3_1, opcode_3_2, opcode_3_3, opcode_DD_34,opcode_DD_35,opcode_DD_36,opcode_3_7\r
5397 .word opcode_3_8, opcode_DD_39,opcode_3_A, opcode_3_B, opcode_3_C, opcode_3_D, opcode_3_E, opcode_3_F\r
5398 .word opcode_4_0, opcode_4_1, opcode_4_2, opcode_4_3, opcode_DD_44,opcode_DD_45,opcode_DD_46,opcode_4_7\r
5399 .word opcode_4_8, opcode_4_9, opcode_4_A, opcode_4_B, opcode_DD_4C,opcode_DD_4D,opcode_DD_4E,opcode_4_F\r
5400 .word opcode_5_0, opcode_5_1, opcode_5_2, opcode_5_3, opcode_DD_54,opcode_DD_55,opcode_DD_56,opcode_5_7\r
5401 .word opcode_5_8, opcode_5_9, opcode_5_A, opcode_5_B, opcode_DD_5C,opcode_DD_5D,opcode_DD_5E,opcode_5_F\r
5402 .word opcode_DD_60,opcode_DD_61,opcode_DD_62,opcode_DD_63,opcode_DD_64,opcode_DD_65,opcode_DD_66,opcode_DD_67\r
5403 .word opcode_DD_68,opcode_DD_69,opcode_DD_6A,opcode_DD_6B,opcode_DD_6C,opcode_DD_6D,opcode_DD_6E,opcode_DD_6F\r
5404 .word opcode_DD_70,opcode_DD_71,opcode_DD_72,opcode_DD_73,opcode_DD_74,opcode_DD_75,opcode_7_6, opcode_DD_77\r
5405 .word opcode_7_8, opcode_7_9, opcode_7_A, opcode_7_B, opcode_DD_7C,opcode_DD_7D,opcode_DD_7E,opcode_7_F\r
5406 .word opcode_8_0, opcode_8_1, opcode_8_2, opcode_8_3, opcode_DD_84,opcode_DD_85,opcode_DD_86,opcode_8_7\r
5407 .word opcode_8_8, opcode_8_9, opcode_8_A, opcode_8_B, opcode_DD_8C,opcode_DD_8D,opcode_DD_8E,opcode_8_F\r
5408 .word opcode_9_0, opcode_9_1, opcode_9_2, opcode_9_3, opcode_DD_94,opcode_DD_95,opcode_DD_96,opcode_9_7\r
5409 .word opcode_9_8, opcode_9_9, opcode_9_A, opcode_9_B, opcode_DD_9C,opcode_DD_9D,opcode_DD_9E,opcode_9_F\r
5410 .word opcode_A_0, opcode_A_1, opcode_A_2, opcode_A_3, opcode_DD_A4,opcode_DD_A5,opcode_DD_A6,opcode_A_7\r
5411 .word opcode_A_8, opcode_A_9, opcode_A_A, opcode_A_B, opcode_DD_AC,opcode_DD_AD,opcode_DD_AE,opcode_A_F\r
5412 .word opcode_B_0, opcode_B_1, opcode_B_2, opcode_B_3, opcode_DD_B4,opcode_DD_B5,opcode_DD_B6,opcode_B_7\r
5413 .word opcode_B_8, opcode_B_9, opcode_B_A, opcode_B_B, opcode_DD_BC,opcode_DD_BD,opcode_DD_BE,opcode_B_F\r
5414 .word opcode_C_0, opcode_C_1, opcode_C_2, opcode_C_3, opcode_C_4, opcode_C_5, opcode_C_6, opcode_C_7\r
5415 .word opcode_C_8, opcode_C_9, opcode_C_A, opcode_DD_CB,opcode_C_C, opcode_C_D, opcode_C_E, opcode_C_F\r
5416 .word opcode_D_0, opcode_D_1, opcode_D_2, opcode_D_3, opcode_D_4, opcode_D_5, opcode_D_6, opcode_D_7\r
5417 .word opcode_D_8, opcode_D_9, opcode_D_A, opcode_D_B, opcode_D_C, opcode_D_D, opcode_D_E, opcode_D_F\r
5418 .word opcode_E_0, opcode_DD_E1,opcode_E_2, opcode_DD_E3,opcode_E_4, opcode_DD_E5,opcode_E_6, opcode_E_7\r
5419 .word opcode_E_8, opcode_DD_E9,opcode_E_A, opcode_E_B, opcode_E_C, opcode_E_D, opcode_E_E, opcode_E_F\r
5420 .word opcode_F_0, opcode_F_1, opcode_F_2, opcode_F_3, opcode_F_4, opcode_F_5, opcode_F_6, opcode_F_7\r
5421 .word opcode_F_8, opcode_DD_F9,opcode_F_A, opcode_F_B, opcode_F_C, opcode_F_D, opcode_F_E, opcode_F_F\r
5422\r
5423;@SBC A,N\r
5424opcode_D_E:\r
5425 ldrb r0,[z80pc],#1\r
5426 opSBCb\r
5427 fetch 7\r
5428;@RST 18H\r
5429opcode_D_F:\r
5430 opRST 0x18\r
5431\r
5432;@RET PO\r
5433opcode_E_0:\r
5434 tst z80f,#1<<VFlag\r
5435 beq opcode_C_9 ;@unconditional RET\r
5436 fetch 5\r
5437;@POP HL\r
5438opcode_E_1:\r
5439 opPOPreg z80hl\r
5440\r
5441;@JP PO,$+3\r
5442opcode_E_2:\r
5443 tst z80f,#1<<VFlag\r
5444 beq opcode_C_3 ;@unconditional JP\r
5445 add z80pc,z80pc,#2\r
5446 fetch 10\r
5447;@EX (SP),HL\r
5448opcode_E_3:\r
5449.if FAST_Z80SP\r
5450 ldrb r0,[z80sp]\r
5451 ldrb r1,[z80sp,#1]\r
5452 orr r0,r0,r1, lsl #8\r
5453 mov r1,z80hl, lsr #24\r
5454 strb r1,[z80sp,#1]\r
5455 mov r1,z80hl, lsr #16\r
5456 strb r1,[z80sp]\r
5457 mov z80hl,r0, lsl #16\r
5458.else\r
5459 mov r0,z80sp\r
5460 readmem16\r
5461 mov r1,r0\r
5462 mov r0,z80hl,lsr#16\r
5463 mov z80hl,r1,lsl#16\r
5464 mov r1,z80sp\r
5465 writemem16\r
5466.endif\r
5467 fetch 19\r
5468;@CALL PO,NN\r
5469opcode_E_4:\r
5470 tst z80f,#1<<VFlag\r
5471 beq opcode_C_D ;@unconditional CALL\r
5472 add z80pc,z80pc,#2\r
5473 fetch 10\r
5474;@PUSH HL\r
5475opcode_E_5:\r
5476 opPUSHreg z80hl\r
5477 fetch 11\r
5478;@AND N\r
5479opcode_E_6:\r
5480 ldrb r0,[z80pc],#1\r
5481 opANDb\r
5482 fetch 7\r
5483;@RST 20H\r
5484opcode_E_7:\r
5485 opRST 0x20\r
5486\r
5487;@RET PE\r
5488opcode_E_8:\r
5489 tst z80f,#1<<VFlag\r
5490 bne opcode_C_9 ;@unconditional RET\r
5491 fetch 5\r
5492;@JP (HL)\r
5493opcode_E_9:\r
5494 mov r0,z80hl, lsr #16\r
5495 rebasepc\r
5496 fetch 4\r
5497;@JP PE,$+3\r
5498opcode_E_A:\r
5499 tst z80f,#1<<VFlag\r
5500 bne opcode_C_3 ;@unconditional JP\r
5501 add z80pc,z80pc,#2\r
5502 fetch 10\r
5503;@EX DE,HL\r
5504opcode_E_B:\r
5505 mov r1,z80de\r
5506 mov z80de,z80hl\r
5507 mov z80hl,r1\r
5508 fetch 4\r
5509;@CALL PE,NN\r
5510opcode_E_C:\r
5511 tst z80f,#1<<VFlag\r
5512 bne opcode_C_D ;@unconditional CALL\r
5513 add z80pc,z80pc,#2\r
5514 fetch 10\r
5515\r
5516;@This should be caught at start\r
5517opcode_E_D:\r
5518 ldrb r1,[z80pc],#1\r
5519 ldr pc,[pc,r1, lsl #2]\r
5520opcodes_ED: .word 0x00000000\r
5521 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5522 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5523 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5524 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5525 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5526 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5527 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5528 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5529 .word opcode_ED_40,opcode_ED_41,opcode_ED_42,opcode_ED_43,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_47\r
5530 .word opcode_ED_48,opcode_ED_49,opcode_ED_4A,opcode_ED_4B,opcode_ED_44,opcode_ED_4D,opcode_ED_46,opcode_ED_4F\r
5531 .word opcode_ED_50,opcode_ED_51,opcode_ED_52,opcode_ED_53,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_57\r
5532 .word opcode_ED_58,opcode_ED_59,opcode_ED_5A,opcode_ED_5B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_5F\r
5533 .word opcode_ED_60,opcode_ED_61,opcode_ED_62,opcode_ED_63,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_67\r
5534 .word opcode_ED_68,opcode_ED_69,opcode_ED_6A,opcode_ED_6B,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_6F\r
5535 .word opcode_ED_70,opcode_ED_71,opcode_ED_72,opcode_ED_73,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_NF\r
5536 .word opcode_ED_78,opcode_ED_79,opcode_ED_7A,opcode_ED_7B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_NF\r
5537 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5538 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5539 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5540 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5541 .word opcode_ED_A0,opcode_ED_A1,opcode_ED_A2,opcode_ED_A3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5542 .word opcode_ED_A8,opcode_ED_A9,opcode_ED_AA,opcode_ED_AB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5543 .word opcode_ED_B0,opcode_ED_B1,opcode_ED_B2,opcode_ED_B3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5544 .word opcode_ED_B8,opcode_ED_B9,opcode_ED_BA,opcode_ED_BB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5545 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5546 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5547 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5548 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5549 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5550 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5551 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5552 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5553\r
5554;@XOR N\r
5555opcode_E_E:\r
5556 ldrb r0,[z80pc],#1\r
5557 opXORb\r
5558 fetch 7\r
5559;@RST 28H\r
5560opcode_E_F:\r
5561 opRST 0x28\r
5562\r
5563;@RET P\r
5564opcode_F_0:\r
5565 tst z80f,#1<<SFlag\r
5566 beq opcode_C_9 ;@unconditional RET\r
5567 fetch 5\r
5568;@POP AF\r
5569opcode_F_1:\r
5570.if FAST_Z80SP\r
5571 ldrb z80f,[z80sp],#1\r
5572 sub r0,opcodes,#0x200\r
5573 ldrb z80f,[r0,z80f]\r
5574 ldrb z80a,[z80sp],#1\r
5575 mov z80a,z80a, lsl #24\r
5576.else\r
5577 mov r0,z80sp\r
5578 readmem16\r
5579 add z80sp,z80sp,#2\r
5580 and z80a,r0,#0xFF00\r
5581 mov z80a,z80a,lsl#16\r
5582 and z80f,r0,#0xFF\r
5583 sub r0,opcodes,#0x200\r
5584 ldrb z80f,[r0,z80f]\r
5585.endif\r
5586 fetch 10\r
5587;@JP P,$+3\r
5588opcode_F_2:\r
5589 tst z80f,#1<<SFlag\r
5590 beq opcode_C_3 ;@unconditional JP\r
5591 add z80pc,z80pc,#2\r
5592 fetch 10\r
5593;@DI\r
5594opcode_F_3:\r
5595 ldrb r1,[cpucontext,#z80if]\r
5596 bic r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5597 strb r1,[cpucontext,#z80if]\r
5598 fetch 4\r
5599;@CALL P,NN\r
5600opcode_F_4:\r
5601 tst z80f,#1<<SFlag\r
5602 beq opcode_C_D ;@unconditional CALL\r
5603 add z80pc,z80pc,#2\r
5604 fetch 10\r
5605;@PUSH AF\r
5606opcode_F_5:\r
5607 sub r0,opcodes,#0x300\r
5608 ldrb r0,[r0,z80f]\r
5609 orr r2,r0,z80a,lsr#16\r
5610 opPUSHareg r2\r
5611 fetch 11\r
5612;@OR N\r
5613opcode_F_6:\r
5614 ldrb r0,[z80pc],#1\r
5615 opORb\r
5616 fetch 7\r
5617;@RST 30H\r
5618opcode_F_7:\r
5619 opRST 0x30\r
5620\r
5621;@RET M\r
5622opcode_F_8:\r
5623 tst z80f,#1<<SFlag\r
5624 bne opcode_C_9 ;@unconditional RET\r
5625 fetch 5\r
5626;@LD SP,HL\r
5627opcode_F_9:\r
5628.if FAST_Z80SP\r
5629 mov r0,z80hl, lsr #16\r
5630 rebasesp\r
5631 mov z80sp,r0\r
5632.else\r
5633 mov z80sp,z80hl, lsr #16\r
5634.endif\r
5635 fetch 4\r
5636;@JP M,$+3\r
5637opcode_F_A:\r
5638 tst z80f,#1<<SFlag\r
5639 bne opcode_C_3 ;@unconditional JP\r
5640 add z80pc,z80pc,#2\r
5641 fetch 10\r
5642MAIN_opcodes_POINTER: .word MAIN_opcodes\r
5643EI_DUMMY_opcodes_POINTER: .word EI_DUMMY_opcodes\r
5644;@EI\r
5645opcode_F_B:\r
5646 ldrb r1,[cpucontext,#z80if]\r
5647 tst r1,#Z80_IF1\r
5648 bne ei_return_exit\r
5649\r
5650 orr r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5651 strb r1,[cpucontext,#z80if]\r
5652\r
5653 mov r2,opcodes\r
5654 ldr opcodes,EI_DUMMY_opcodes_POINTER\r
5655 ldr pc,[r2,r0, lsl #2]\r
5656\r
5657ei_return:\r
5658 ;@point that program returns from EI to check interupts\r
5659 ;@an interupt can not be taken directly after a EI opcode\r
5660 ;@ reset z80pc and opcode pointer\r
5661 ldrh r0,[cpucontext,#z80irq] @ 0x4C\r
5662 sub z80pc,z80pc,#1\r
5663 ldr opcodes,MAIN_opcodes_POINTER\r
5664 ;@ check ints\r
5665 tst r0,#1\r
5666 movnes r0,r0,lsr #8\r
5667 blne DoInterrupt\r
5668 ;@ continue\r
5669ei_return_exit:\r
5670 fetch 4\r
5671\r
5672;@CALL M,NN\r
5673opcode_F_C:\r
5674 tst z80f,#1<<SFlag\r
5675 bne opcode_C_D ;@unconditional CALL\r
5676 add z80pc,z80pc,#2\r
5677 fetch 10\r
5678\r
5679;@SHOULD BE CAUGHT AT START - FD SECTION\r
5680\r
5681;@CP N\r
5682opcode_F_E:\r
5683 ldrb r0,[z80pc],#1\r
5684 opCPb\r
5685 fetch 7\r
5686;@RST 38H\r
5687opcode_F_F:\r
5688 opRST 0x38\r
5689\r
5690\r
5691;@##################################\r
5692;@##################################\r
5693;@### opcodes CB #########################\r
5694;@##################################\r
5695;@##################################\r
5696\r
5697\r
5698;@RLC B\r
5699opcode_CB_00:\r
5700 opRLCH z80bc\r
5701;@RLC C\r
5702opcode_CB_01:\r
5703 opRLCL z80bc\r
5704;@RLC D\r
5705opcode_CB_02:\r
5706 opRLCH z80de\r
5707;@RLC E\r
5708opcode_CB_03:\r
5709 opRLCL z80de\r
5710;@RLC H\r
5711opcode_CB_04:\r
5712 opRLCH z80hl\r
5713;@RLC L\r
5714opcode_CB_05:\r
5715 opRLCL z80hl\r
5716;@RLC (HL)\r
5717opcode_CB_06:\r
5718 readmem8HL\r
5719 opRLCb\r
5720 writemem8HL\r
5721 fetch 15\r
5722;@RLC A\r
5723opcode_CB_07:\r
5724 opRLCA\r
5725\r
5726;@RRC B\r
5727opcode_CB_08:\r
5728 opRRCH z80bc\r
5729;@RRC C\r
5730opcode_CB_09:\r
5731 opRRCL z80bc\r
5732;@RRC D\r
5733opcode_CB_0A:\r
5734 opRRCH z80de\r
5735;@RRC E\r
5736opcode_CB_0B:\r
5737 opRRCL z80de\r
5738;@RRC H\r
5739opcode_CB_0C:\r
5740 opRRCH z80hl\r
5741;@RRC L\r
5742opcode_CB_0D:\r
5743 opRRCL z80hl\r
5744;@RRC (HL)\r
5745opcode_CB_0E :\r
5746 readmem8HL\r
5747 opRRCb\r
5748 writemem8HL\r
5749 fetch 15\r
5750;@RRC A\r
5751opcode_CB_0F:\r
5752 opRRCA\r
5753\r
5754;@RL B\r
5755opcode_CB_10:\r
5756 opRLH z80bc\r
5757;@RL C\r
5758opcode_CB_11:\r
5759 opRLL z80bc\r
5760;@RL D\r
5761opcode_CB_12:\r
5762 opRLH z80de\r
5763;@RL E\r
5764opcode_CB_13:\r
5765 opRLL z80de\r
5766;@RL H\r
5767opcode_CB_14:\r
5768 opRLH z80hl\r
5769;@RL L\r
5770opcode_CB_15:\r
5771 opRLL z80hl\r
5772;@RL (HL)\r
5773opcode_CB_16:\r
5774 readmem8HL\r
5775 opRLb\r
5776 writemem8HL\r
5777 fetch 15\r
5778;@RL A\r
5779opcode_CB_17:\r
5780 opRLA\r
5781\r
5782;@RR B \r
5783opcode_CB_18:\r
5784 opRRH z80bc\r
5785;@RR C\r
5786opcode_CB_19:\r
5787 opRRL z80bc\r
5788;@RR D\r
5789opcode_CB_1A:\r
5790 opRRH z80de\r
5791;@RR E\r
5792opcode_CB_1B:\r
5793 opRRL z80de\r
5794;@RR H\r
5795opcode_CB_1C:\r
5796 opRRH z80hl\r
5797;@RR L\r
5798opcode_CB_1D:\r
5799 opRRL z80hl\r
5800;@RR (HL)\r
5801opcode_CB_1E:\r
5802 readmem8HL\r
5803 opRRb\r
5804 writemem8HL\r
5805 fetch 15\r
5806;@RR A\r
5807opcode_CB_1F:\r
5808 opRRA\r
5809\r
5810;@SLA B\r
5811opcode_CB_20:\r
5812 opSLAH z80bc\r
5813;@SLA C\r
5814opcode_CB_21:\r
5815 opSLAL z80bc\r
5816;@SLA D\r
5817opcode_CB_22:\r
5818 opSLAH z80de\r
5819;@SLA E\r
5820opcode_CB_23:\r
5821 opSLAL z80de\r
5822;@SLA H\r
5823opcode_CB_24:\r
5824 opSLAH z80hl\r
5825;@SLA L\r
5826opcode_CB_25:\r
5827 opSLAL z80hl\r
5828;@SLA (HL)\r
5829opcode_CB_26:\r
5830 readmem8HL\r
5831 opSLAb\r
5832 writemem8HL\r
5833 fetch 15\r
5834;@SLA A\r
5835opcode_CB_27:\r
5836 opSLAA\r
5837\r
5838;@SRA B\r
5839opcode_CB_28:\r
5840 opSRAH z80bc\r
5841;@SRA C\r
5842opcode_CB_29:\r
5843 opSRAL z80bc\r
5844;@SRA D\r
5845opcode_CB_2A:\r
5846 opSRAH z80de\r
5847;@SRA E\r
5848opcode_CB_2B:\r
5849 opSRAL z80de\r
5850;@SRA H\r
5851opcode_CB_2C:\r
5852 opSRAH z80hl\r
5853;@SRA L\r
5854opcode_CB_2D:\r
5855 opSRAL z80hl\r
5856;@SRA (HL)\r
5857opcode_CB_2E:\r
5858 readmem8HL\r
5859 opSRAb\r
5860 writemem8HL\r
5861 fetch 15\r
5862;@SRA A\r
5863opcode_CB_2F:\r
5864 opSRAA\r
5865\r
5866;@SLL B\r
5867opcode_CB_30:\r
5868 opSLLH z80bc\r
5869;@SLL C\r
5870opcode_CB_31:\r
5871 opSLLL z80bc\r
5872;@SLL D\r
5873opcode_CB_32:\r
5874 opSLLH z80de\r
5875;@SLL E\r
5876opcode_CB_33:\r
5877 opSLLL z80de\r
5878;@SLL H\r
5879opcode_CB_34:\r
5880 opSLLH z80hl\r
5881;@SLL L\r
5882opcode_CB_35:\r
5883 opSLLL z80hl\r
5884;@SLL (HL)\r
5885opcode_CB_36:\r
5886 readmem8HL\r
5887 opSLLb\r
5888 writemem8HL\r
5889 fetch 15\r
5890;@SLL A\r
5891opcode_CB_37:\r
5892 opSLLA\r
5893\r
5894;@SRL B\r
5895opcode_CB_38:\r
5896 opSRLH z80bc\r
5897;@SRL C\r
5898opcode_CB_39:\r
5899 opSRLL z80bc\r
5900;@SRL D\r
5901opcode_CB_3A:\r
5902 opSRLH z80de\r
5903;@SRL E\r
5904opcode_CB_3B:\r
5905 opSRLL z80de\r
5906;@SRL H\r
5907opcode_CB_3C:\r
5908 opSRLH z80hl\r
5909;@SRL L\r
5910opcode_CB_3D:\r
5911 opSRLL z80hl\r
5912;@SRL (HL)\r
5913opcode_CB_3E:\r
5914 readmem8HL\r
5915 opSRLb\r
5916 writemem8HL\r
5917 fetch 15\r
5918;@SRL A\r
5919opcode_CB_3F:\r
5920 opSRLA\r
5921\r
5922\r
5923;@BIT 0,B\r
5924opcode_CB_40:\r
5925 opBITH z80bc 0\r
5926;@BIT 0,C\r
5927opcode_CB_41:\r
5928 opBITL z80bc 0\r
5929;@BIT 0,D\r
5930opcode_CB_42:\r
5931 opBITH z80de 0\r
5932;@BIT 0,E\r
5933opcode_CB_43:\r
5934 opBITL z80de 0\r
5935;@BIT 0,H\r
5936opcode_CB_44:\r
5937 opBITH z80hl 0\r
5938;@BIT 0,L\r
5939opcode_CB_45:\r
5940 opBITL z80hl 0\r
5941;@BIT 0,(HL)\r
5942opcode_CB_46:\r
5943 readmem8HL\r
5944 opBITb 0\r
5945 fetch 12\r
5946;@BIT 0,A\r
5947opcode_CB_47:\r
5948 opBITH z80a 0\r
5949\r
5950;@BIT 1,B\r
5951opcode_CB_48:\r
5952 opBITH z80bc 1\r
5953;@BIT 1,C\r
5954opcode_CB_49:\r
5955 opBITL z80bc 1\r
5956;@BIT 1,D\r
5957opcode_CB_4A:\r
5958 opBITH z80de 1\r
5959;@BIT 1,E\r
5960opcode_CB_4B:\r
5961 opBITL z80de 1\r
5962;@BIT 1,H\r
5963opcode_CB_4C:\r
5964 opBITH z80hl 1\r
5965;@BIT 1,L\r
5966opcode_CB_4D:\r
5967 opBITL z80hl 1\r
5968;@BIT 1,(HL)\r
5969opcode_CB_4E:\r
5970 readmem8HL\r
5971 opBITb 1\r
5972 fetch 12\r
5973;@BIT 1,A\r
5974opcode_CB_4F:\r
5975 opBITH z80a 1\r
5976\r
5977;@BIT 2,B\r
5978opcode_CB_50:\r
5979 opBITH z80bc 2\r
5980;@BIT 2,C\r
5981opcode_CB_51:\r
5982 opBITL z80bc 2\r
5983;@BIT 2,D\r
5984opcode_CB_52:\r
5985 opBITH z80de 2\r
5986;@BIT 2,E\r
5987opcode_CB_53:\r
5988 opBITL z80de 2\r
5989;@BIT 2,H\r
5990opcode_CB_54:\r
5991 opBITH z80hl 2\r
5992;@BIT 2,L\r
5993opcode_CB_55:\r
5994 opBITL z80hl 2\r
5995;@BIT 2,(HL)\r
5996opcode_CB_56:\r
5997 readmem8HL\r
5998 opBITb 2\r
5999 fetch 12\r
6000;@BIT 2,A\r
6001opcode_CB_57:\r
6002 opBITH z80a 2\r
6003\r
6004;@BIT 3,B\r
6005opcode_CB_58:\r
6006 opBITH z80bc 3\r
6007;@BIT 3,C\r
6008opcode_CB_59:\r
6009 opBITL z80bc 3\r
6010;@BIT 3,D\r
6011opcode_CB_5A:\r
6012 opBITH z80de 3\r
6013;@BIT 3,E\r
6014opcode_CB_5B:\r
6015 opBITL z80de 3\r
6016;@BIT 3,H\r
6017opcode_CB_5C:\r
6018 opBITH z80hl 3\r
6019;@BIT 3,L\r
6020opcode_CB_5D:\r
6021 opBITL z80hl 3\r
6022;@BIT 3,(HL)\r
6023opcode_CB_5E:\r
6024 readmem8HL\r
6025 opBITb 3\r
6026 fetch 12\r
6027;@BIT 3,A\r
6028opcode_CB_5F:\r
6029 opBITH z80a 3\r
6030\r
6031;@BIT 4,B\r
6032opcode_CB_60:\r
6033 opBITH z80bc 4\r
6034;@BIT 4,C\r
6035opcode_CB_61:\r
6036 opBITL z80bc 4\r
6037;@BIT 4,D\r
6038opcode_CB_62:\r
6039 opBITH z80de 4\r
6040;@BIT 4,E\r
6041opcode_CB_63:\r
6042 opBITL z80de 4\r
6043;@BIT 4,H\r
6044opcode_CB_64:\r
6045 opBITH z80hl 4\r
6046;@BIT 4,L\r
6047opcode_CB_65:\r
6048 opBITL z80hl 4\r
6049;@BIT 4,(HL)\r
6050opcode_CB_66:\r
6051 readmem8HL\r
6052 opBITb 4\r
6053 fetch 12\r
6054;@BIT 4,A\r
6055opcode_CB_67:\r
6056 opBITH z80a 4\r
6057\r
6058;@BIT 5,B\r
6059opcode_CB_68:\r
6060 opBITH z80bc 5\r
6061;@BIT 5,C\r
6062opcode_CB_69:\r
6063 opBITL z80bc 5\r
6064;@BIT 5,D\r
6065opcode_CB_6A:\r
6066 opBITH z80de 5\r
6067;@BIT 5,E\r
6068opcode_CB_6B:\r
6069 opBITL z80de 5\r
6070;@BIT 5,H\r
6071opcode_CB_6C:\r
6072 opBITH z80hl 5\r
6073;@BIT 5,L\r
6074opcode_CB_6D:\r
6075 opBITL z80hl 5\r
6076;@BIT 5,(HL)\r
6077opcode_CB_6E:\r
6078 readmem8HL\r
6079 opBITb 5\r
6080 fetch 12\r
6081;@BIT 5,A\r
6082opcode_CB_6F:\r
6083 opBITH z80a 5\r
6084\r
6085;@BIT 6,B\r
6086opcode_CB_70:\r
6087 opBITH z80bc 6\r
6088;@BIT 6,C\r
6089opcode_CB_71:\r
6090 opBITL z80bc 6\r
6091;@BIT 6,D\r
6092opcode_CB_72:\r
6093 opBITH z80de 6\r
6094;@BIT 6,E\r
6095opcode_CB_73:\r
6096 opBITL z80de 6\r
6097;@BIT 6,H\r
6098opcode_CB_74:\r
6099 opBITH z80hl 6\r
6100;@BIT 6,L\r
6101opcode_CB_75:\r
6102 opBITL z80hl 6\r
6103;@BIT 6,(HL)\r
6104opcode_CB_76:\r
6105 readmem8HL\r
6106 opBITb 6\r
6107 fetch 12\r
6108;@BIT 6,A\r
6109opcode_CB_77:\r
6110 opBITH z80a 6\r
6111\r
6112;@BIT 7,B\r
6113opcode_CB_78:\r
6114 opBIT7H z80bc\r
6115;@BIT 7,C\r
6116opcode_CB_79:\r
6117 opBIT7L z80bc\r
6118;@BIT 7,D\r
6119opcode_CB_7A:\r
6120 opBIT7H z80de\r
6121;@BIT 7,E\r
6122opcode_CB_7B:\r
6123 opBIT7L z80de\r
6124;@BIT 7,H\r
6125opcode_CB_7C:\r
6126 opBIT7H z80hl\r
6127;@BIT 7,L\r
6128opcode_CB_7D:\r
6129 opBIT7L z80hl\r
6130;@BIT 7,(HL)\r
6131opcode_CB_7E:\r
6132 readmem8HL\r
6133 opBIT7b\r
6134 fetch 12\r
6135;@BIT 7,A\r
6136opcode_CB_7F:\r
6137 opBIT7H z80a\r
6138\r
6139;@RES 0,B\r
6140opcode_CB_80:\r
6141 bic z80bc,z80bc,#1<<24\r
6142 fetch 8\r
6143;@RES 0,C\r
6144opcode_CB_81:\r
6145 bic z80bc,z80bc,#1<<16\r
6146 fetch 8\r
6147;@RES 0,D\r
6148opcode_CB_82:\r
6149 bic z80de,z80de,#1<<24\r
6150 fetch 8\r
6151;@RES 0,E\r
6152opcode_CB_83:\r
6153 bic z80de,z80de,#1<<16\r
6154 fetch 8\r
6155;@RES 0,H\r
6156opcode_CB_84:\r
6157 bic z80hl,z80hl,#1<<24\r
6158 fetch 8\r
6159;@RES 0,L\r
6160opcode_CB_85:\r
6161 bic z80hl,z80hl,#1<<16\r
6162 fetch 8\r
6163;@RES 0,(HL)\r
6164opcode_CB_86:\r
6165 opRESmemHL 0\r
6166;@RES 0,A\r
6167opcode_CB_87:\r
6168 bic z80a,z80a,#1<<24\r
6169 fetch 8\r
6170\r
6171;@RES 1,B\r
6172opcode_CB_88:\r
6173 bic z80bc,z80bc,#1<<25\r
6174 fetch 8\r
6175;@RES 1,C\r
6176opcode_CB_89:\r
6177 bic z80bc,z80bc,#1<<17\r
6178 fetch 8\r
6179;@RES 1,D\r
6180opcode_CB_8A:\r
6181 bic z80de,z80de,#1<<25\r
6182 fetch 8\r
6183;@RES 1,E\r
6184opcode_CB_8B:\r
6185 bic z80de,z80de,#1<<17\r
6186 fetch 8\r
6187;@RES 1,H\r
6188opcode_CB_8C:\r
6189 bic z80hl,z80hl,#1<<25\r
6190 fetch 8\r
6191;@RES 1,L\r
6192opcode_CB_8D:\r
6193 bic z80hl,z80hl,#1<<17\r
6194 fetch 8\r
6195;@RES 1,(HL)\r
6196opcode_CB_8E:\r
6197 opRESmemHL 1\r
6198;@RES 1,A\r
6199opcode_CB_8F:\r
6200 bic z80a,z80a,#1<<25\r
6201 fetch 8\r
6202\r
6203;@RES 2,B\r
6204opcode_CB_90:\r
6205 bic z80bc,z80bc,#1<<26\r
6206 fetch 8\r
6207;@RES 2,C\r
6208opcode_CB_91:\r
6209 bic z80bc,z80bc,#1<<18\r
6210 fetch 8\r
6211;@RES 2,D\r
6212opcode_CB_92:\r
6213 bic z80de,z80de,#1<<26\r
6214 fetch 8\r
6215;@RES 2,E\r
6216opcode_CB_93:\r
6217 bic z80de,z80de,#1<<18\r
6218 fetch 8\r
6219;@RES 2,H\r
6220opcode_CB_94:\r
6221 bic z80hl,z80hl,#1<<26\r
6222 fetch 8\r
6223;@RES 2,L\r
6224opcode_CB_95:\r
6225 bic z80hl,z80hl,#1<<18\r
6226 fetch 8\r
6227;@RES 2,(HL)\r
6228opcode_CB_96:\r
6229 opRESmemHL 2\r
6230;@RES 2,A\r
6231opcode_CB_97:\r
6232 bic z80a,z80a,#1<<26\r
6233 fetch 8\r
6234\r
6235;@RES 3,B\r
6236opcode_CB_98:\r
6237 bic z80bc,z80bc,#1<<27\r
6238 fetch 8\r
6239;@RES 3,C\r
6240opcode_CB_99:\r
6241 bic z80bc,z80bc,#1<<19\r
6242 fetch 8\r
6243;@RES 3,D\r
6244opcode_CB_9A:\r
6245 bic z80de,z80de,#1<<27\r
6246 fetch 8\r
6247;@RES 3,E\r
6248opcode_CB_9B:\r
6249 bic z80de,z80de,#1<<19\r
6250 fetch 8\r
6251;@RES 3,H\r
6252opcode_CB_9C:\r
6253 bic z80hl,z80hl,#1<<27\r
6254 fetch 8\r
6255;@RES 3,L\r
6256opcode_CB_9D:\r
6257 bic z80hl,z80hl,#1<<19\r
6258 fetch 8\r
6259;@RES 3,(HL)\r
6260opcode_CB_9E:\r
6261 opRESmemHL 3\r
6262;@RES 3,A\r
6263opcode_CB_9F:\r
6264 bic z80a,z80a,#1<<27\r
6265 fetch 8\r
6266\r
6267;@RES 4,B\r
6268opcode_CB_A0:\r
6269 bic z80bc,z80bc,#1<<28\r
6270 fetch 8\r
6271;@RES 4,C\r
6272opcode_CB_A1:\r
6273 bic z80bc,z80bc,#1<<20\r
6274 fetch 8\r
6275;@RES 4,D\r
6276opcode_CB_A2:\r
6277 bic z80de,z80de,#1<<28\r
6278 fetch 8\r
6279;@RES 4,E\r
6280opcode_CB_A3:\r
6281 bic z80de,z80de,#1<<20\r
6282 fetch 8\r
6283;@RES 4,H\r
6284opcode_CB_A4:\r
6285 bic z80hl,z80hl,#1<<28\r
6286 fetch 8\r
6287;@RES 4,L\r
6288opcode_CB_A5:\r
6289 bic z80hl,z80hl,#1<<20\r
6290 fetch 8\r
6291;@RES 4,(HL)\r
6292opcode_CB_A6:\r
6293 opRESmemHL 4\r
6294;@RES 4,A\r
6295opcode_CB_A7:\r
6296 bic z80a,z80a,#1<<28\r
6297 fetch 8\r
6298\r
6299;@RES 5,B\r
6300opcode_CB_A8:\r
6301 bic z80bc,z80bc,#1<<29\r
6302 fetch 8\r
6303;@RES 5,C\r
6304opcode_CB_A9:\r
6305 bic z80bc,z80bc,#1<<21\r
6306 fetch 8\r
6307;@RES 5,D\r
6308opcode_CB_AA:\r
6309 bic z80de,z80de,#1<<29\r
6310 fetch 8\r
6311;@RES 5,E\r
6312opcode_CB_AB:\r
6313 bic z80de,z80de,#1<<21\r
6314 fetch 8\r
6315;@RES 5,H\r
6316opcode_CB_AC:\r
6317 bic z80hl,z80hl,#1<<29\r
6318 fetch 8\r
6319;@RES 5,L\r
6320opcode_CB_AD:\r
6321 bic z80hl,z80hl,#1<<21\r
6322 fetch 8\r
6323;@RES 5,(HL)\r
6324opcode_CB_AE:\r
6325 opRESmemHL 5\r
6326;@RES 5,A\r
6327opcode_CB_AF:\r
6328 bic z80a,z80a,#1<<29\r
6329 fetch 8\r
6330\r
6331;@RES 6,B\r
6332opcode_CB_B0:\r
6333 bic z80bc,z80bc,#1<<30\r
6334 fetch 8\r
6335;@RES 6,C\r
6336opcode_CB_B1:\r
6337 bic z80bc,z80bc,#1<<22\r
6338 fetch 8\r
6339;@RES 6,D\r
6340opcode_CB_B2:\r
6341 bic z80de,z80de,#1<<30\r
6342 fetch 8\r
6343;@RES 6,E\r
6344opcode_CB_B3:\r
6345 bic z80de,z80de,#1<<22\r
6346 fetch 8\r
6347;@RES 6,H\r
6348opcode_CB_B4:\r
6349 bic z80hl,z80hl,#1<<30\r
6350 fetch 8\r
6351;@RES 6,L\r
6352opcode_CB_B5:\r
6353 bic z80hl,z80hl,#1<<22\r
6354 fetch 8\r
6355;@RES 6,(HL)\r
6356opcode_CB_B6:\r
6357 opRESmemHL 6\r
6358;@RES 6,A\r
6359opcode_CB_B7:\r
6360 bic z80a,z80a,#1<<30\r
6361 fetch 8\r
6362\r
6363;@RES 7,B\r
6364opcode_CB_B8:\r
6365 bic z80bc,z80bc,#1<<31\r
6366 fetch 8\r
6367;@RES 7,C\r
6368opcode_CB_B9:\r
6369 bic z80bc,z80bc,#1<<23\r
6370 fetch 8\r
6371;@RES 7,D\r
6372opcode_CB_BA:\r
6373 bic z80de,z80de,#1<<31\r
6374 fetch 8\r
6375;@RES 7,E\r
6376opcode_CB_BB:\r
6377 bic z80de,z80de,#1<<23\r
6378 fetch 8\r
6379;@RES 7,H\r
6380opcode_CB_BC:\r
6381 bic z80hl,z80hl,#1<<31\r
6382 fetch 8\r
6383;@RES 7,L\r
6384opcode_CB_BD:\r
6385 bic z80hl,z80hl,#1<<23\r
6386 fetch 8\r
6387;@RES 7,(HL)\r
6388opcode_CB_BE:\r
6389 opRESmemHL 7\r
6390;@RES 7,A\r
6391opcode_CB_BF:\r
6392 bic z80a,z80a,#1<<31\r
6393 fetch 8\r
6394\r
6395;@SET 0,B\r
6396opcode_CB_C0:\r
6397 orr z80bc,z80bc,#1<<24\r
6398 fetch 8\r
6399;@SET 0,C\r
6400opcode_CB_C1:\r
6401 orr z80bc,z80bc,#1<<16\r
6402 fetch 8\r
6403;@SET 0,D\r
6404opcode_CB_C2:\r
6405 orr z80de,z80de,#1<<24\r
6406 fetch 8\r
6407;@SET 0,E\r
6408opcode_CB_C3:\r
6409 orr z80de,z80de,#1<<16\r
6410 fetch 8\r
6411;@SET 0,H\r
6412opcode_CB_C4:\r
6413 orr z80hl,z80hl,#1<<24\r
6414 fetch 8\r
6415;@SET 0,L\r
6416opcode_CB_C5:\r
6417 orr z80hl,z80hl,#1<<16\r
6418 fetch 8\r
6419;@SET 0,(HL)\r
6420opcode_CB_C6:\r
6421 opSETmemHL 0\r
6422;@SET 0,A\r
6423opcode_CB_C7:\r
6424 orr z80a,z80a,#1<<24\r
6425 fetch 8\r
6426\r
6427;@SET 1,B\r
6428opcode_CB_C8:\r
6429 orr z80bc,z80bc,#1<<25\r
6430 fetch 8\r
6431;@SET 1,C\r
6432opcode_CB_C9:\r
6433 orr z80bc,z80bc,#1<<17\r
6434 fetch 8\r
6435;@SET 1,D\r
6436opcode_CB_CA:\r
6437 orr z80de,z80de,#1<<25\r
6438 fetch 8\r
6439;@SET 1,E\r
6440opcode_CB_CB:\r
6441 orr z80de,z80de,#1<<17\r
6442 fetch 8\r
6443;@SET 1,H\r
6444opcode_CB_CC:\r
6445 orr z80hl,z80hl,#1<<25\r
6446 fetch 8\r
6447;@SET 1,L\r
6448opcode_CB_CD:\r
6449 orr z80hl,z80hl,#1<<17\r
6450 fetch 8\r
6451;@SET 1,(HL)\r
6452opcode_CB_CE:\r
6453 opSETmemHL 1\r
6454;@SET 1,A\r
6455opcode_CB_CF:\r
6456 orr z80a,z80a,#1<<25\r
6457 fetch 8\r
6458\r
6459;@SET 2,B\r
6460opcode_CB_D0:\r
6461 orr z80bc,z80bc,#1<<26\r
6462 fetch 8\r
6463;@SET 2,C\r
6464opcode_CB_D1:\r
6465 orr z80bc,z80bc,#1<<18\r
6466 fetch 8\r
6467;@SET 2,D\r
6468opcode_CB_D2:\r
6469 orr z80de,z80de,#1<<26\r
6470 fetch 8\r
6471;@SET 2,E\r
6472opcode_CB_D3:\r
6473 orr z80de,z80de,#1<<18\r
6474 fetch 8\r
6475;@SET 2,H\r
6476opcode_CB_D4:\r
6477 orr z80hl,z80hl,#1<<26\r
6478 fetch 8\r
6479;@SET 2,L\r
6480opcode_CB_D5:\r
6481 orr z80hl,z80hl,#1<<18\r
6482 fetch 8\r
6483;@SET 2,(HL)\r
6484opcode_CB_D6:\r
6485 opSETmemHL 2\r
6486;@SET 2,A\r
6487opcode_CB_D7:\r
6488 orr z80a,z80a,#1<<26\r
6489 fetch 8\r
6490\r
6491;@SET 3,B\r
6492opcode_CB_D8:\r
6493 orr z80bc,z80bc,#1<<27\r
6494 fetch 8\r
6495;@SET 3,C\r
6496opcode_CB_D9:\r
6497 orr z80bc,z80bc,#1<<19\r
6498 fetch 8\r
6499;@SET 3,D\r
6500opcode_CB_DA:\r
6501 orr z80de,z80de,#1<<27\r
6502 fetch 8\r
6503;@SET 3,E\r
6504opcode_CB_DB:\r
6505 orr z80de,z80de,#1<<19\r
6506 fetch 8\r
6507;@SET 3,H\r
6508opcode_CB_DC:\r
6509 orr z80hl,z80hl,#1<<27\r
6510 fetch 8\r
6511;@SET 3,L\r
6512opcode_CB_DD:\r
6513 orr z80hl,z80hl,#1<<19\r
6514 fetch 8\r
6515;@SET 3,(HL)\r
6516opcode_CB_DE:\r
6517 opSETmemHL 3\r
6518;@SET 3,A\r
6519opcode_CB_DF:\r
6520 orr z80a,z80a,#1<<27\r
6521 fetch 8\r
6522\r
6523;@SET 4,B\r
6524opcode_CB_E0:\r
6525 orr z80bc,z80bc,#1<<28\r
6526 fetch 8\r
6527;@SET 4,C\r
6528opcode_CB_E1:\r
6529 orr z80bc,z80bc,#1<<20\r
6530 fetch 8\r
6531;@SET 4,D\r
6532opcode_CB_E2:\r
6533 orr z80de,z80de,#1<<28\r
6534 fetch 8\r
6535;@SET 4,E\r
6536opcode_CB_E3:\r
6537 orr z80de,z80de,#1<<20\r
6538 fetch 8\r
6539;@SET 4,H\r
6540opcode_CB_E4:\r
6541 orr z80hl,z80hl,#1<<28\r
6542 fetch 8\r
6543;@SET 4,L\r
6544opcode_CB_E5:\r
6545 orr z80hl,z80hl,#1<<20\r
6546 fetch 8\r
6547;@SET 4,(HL)\r
6548opcode_CB_E6:\r
6549 opSETmemHL 4\r
6550;@SET 4,A\r
6551opcode_CB_E7:\r
6552 orr z80a,z80a,#1<<28\r
6553 fetch 8\r
6554\r
6555;@SET 5,B\r
6556opcode_CB_E8:\r
6557 orr z80bc,z80bc,#1<<29\r
6558 fetch 8\r
6559;@SET 5,C\r
6560opcode_CB_E9:\r
6561 orr z80bc,z80bc,#1<<21\r
6562 fetch 8\r
6563;@SET 5,D\r
6564opcode_CB_EA:\r
6565 orr z80de,z80de,#1<<29\r
6566 fetch 8\r
6567;@SET 5,E\r
6568opcode_CB_EB:\r
6569 orr z80de,z80de,#1<<21\r
6570 fetch 8\r
6571;@SET 5,H\r
6572opcode_CB_EC:\r
6573 orr z80hl,z80hl,#1<<29\r
6574 fetch 8\r
6575;@SET 5,L\r
6576opcode_CB_ED:\r
6577 orr z80hl,z80hl,#1<<21\r
6578 fetch 8\r
6579;@SET 5,(HL)\r
6580opcode_CB_EE:\r
6581 opSETmemHL 5\r
6582;@SET 5,A\r
6583opcode_CB_EF:\r
6584 orr z80a,z80a,#1<<29\r
6585 fetch 8\r
6586\r
6587;@SET 6,B\r
6588opcode_CB_F0:\r
6589 orr z80bc,z80bc,#1<<30\r
6590 fetch 8\r
6591;@SET 6,C\r
6592opcode_CB_F1:\r
6593 orr z80bc,z80bc,#1<<22\r
6594 fetch 8\r
6595;@SET 6,D\r
6596opcode_CB_F2:\r
6597 orr z80de,z80de,#1<<30\r
6598 fetch 8\r
6599;@SET 6,E\r
6600opcode_CB_F3:\r
6601 orr z80de,z80de,#1<<22\r
6602 fetch 8\r
6603;@SET 6,H\r
6604opcode_CB_F4:\r
6605 orr z80hl,z80hl,#1<<30\r
6606 fetch 8\r
6607;@SET 6,L\r
6608opcode_CB_F5:\r
6609 orr z80hl,z80hl,#1<<22\r
6610 fetch 8\r
6611;@SET 6,(HL)\r
6612opcode_CB_F6:\r
6613 opSETmemHL 6\r
6614;@SET 6,A\r
6615opcode_CB_F7:\r
6616 orr z80a,z80a,#1<<30\r
6617 fetch 8\r
6618\r
6619;@SET 7,B\r
6620opcode_CB_F8:\r
6621 orr z80bc,z80bc,#1<<31\r
6622 fetch 8\r
6623;@SET 7,C\r
6624opcode_CB_F9:\r
6625 orr z80bc,z80bc,#1<<23\r
6626 fetch 8\r
6627;@SET 7,D\r
6628opcode_CB_FA:\r
6629 orr z80de,z80de,#1<<31\r
6630 fetch 8\r
6631;@SET 7,E\r
6632opcode_CB_FB:\r
6633 orr z80de,z80de,#1<<23\r
6634 fetch 8\r
6635;@SET 7,H\r
6636opcode_CB_FC:\r
6637 orr z80hl,z80hl,#1<<31\r
6638 fetch 8\r
6639;@SET 7,L\r
6640opcode_CB_FD:\r
6641 orr z80hl,z80hl,#1<<23\r
6642 fetch 8\r
6643;@SET 7,(HL)\r
6644opcode_CB_FE:\r
6645 opSETmemHL 7\r
6646;@SET 7,A\r
6647opcode_CB_FF:\r
6648 orr z80a,z80a,#1<<31\r
6649 fetch 8\r
6650\r
6651\r
6652\r
6653;@##################################\r
6654;@##################################\r
6655;@### opcodes DD #########################\r
6656;@##################################\r
6657;@##################################\r
6658;@Because the DD opcodes are not a complete range from 00-FF I have\r
6659;@created this sub routine that will catch any undocumented ops\r
6660;@halt the emulator and mov the current instruction to r0\r
6661;@at a later stage I may change to display a text message on the screen\r
6662opcode_DD_NF:\r
6663 eatcycles 4\r
6664 ldr pc,[opcodes,r0, lsl #2]\r
6665;@ mov r2,#0x10*4\r
6666;@ cmp r2,z80xx\r
6667;@ bne opcode_FD_NF\r
6668;@ mov r0,#0xDD00\r
6669;@ orr r0,r0,r1\r
6670;@ b end_loop\r
6671;@opcode_FD_NF:\r
6672;@ mov r0,#0xFD00\r
6673;@ orr r0,r0,r1\r
6674;@ b end_loop\r
6675opcode_DD_NF2:\r
6676 mov r0,#0xDD0000\r
6677 orr r0,r0,#0xCB00\r
6678 orr r0,r0,r1\r
6679 b end_loop\r
6680\r
6681;@ADD IX,BC\r
6682opcode_DD_09:\r
6683 ldr r0,[z80xx]\r
6684 opADD16 r0 z80bc\r
6685 str r0,[z80xx]\r
6686 fetch 15\r
6687;@ADD IX,DE\r
6688opcode_DD_19:\r
6689 ldr r0,[z80xx]\r
6690 opADD16 r0 z80de\r
6691 str r0,[z80xx]\r
6692 fetch 15\r
6693;@LD IX,NN\r
6694opcode_DD_21:\r
6695 ldrb r0,[z80pc],#1\r
6696 ldrb r1,[z80pc],#1\r
6697 orr r0,r0,r1, lsl #8\r
6698 strh r0,[z80xx,#2]\r
6699 fetch 14\r
6700;@LD (NN),IX\r
6701opcode_DD_22:\r
6702 ldrb r0,[z80pc],#1\r
6703 ldrb r1,[z80pc],#1\r
6704 orr r1,r0,r1, lsl #8\r
6705 ldrh r0,[z80xx,#2]\r
6706 writemem16\r
6707 fetch 20\r
6708;@INC IX\r
6709opcode_DD_23:\r
6710 ldr r0,[z80xx]\r
6711 add r0,r0,#1<<16\r
6712 str r0,[z80xx]\r
6713 fetch 10\r
6714;@INC I (IX)\r
6715opcode_DD_24:\r
6716 ldr r0,[z80xx]\r
6717 opINC8H r0\r
6718 str r0,[z80xx]\r
6719 fetch 8\r
6720;@DEC I (IX)\r
6721opcode_DD_25:\r
6722 ldr r0,[z80xx]\r
6723 opDEC8H r0\r
6724 str r0,[z80xx]\r
6725 fetch 8\r
6726;@LD I,N (IX)\r
6727opcode_DD_26:\r
6728 ldrb r0,[z80pc],#1\r
6729 strb r0,[z80xx,#3]\r
6730 fetch 11\r
6731;@ADD IX,IX\r
6732opcode_DD_29:\r
6733 ldr r0,[z80xx]\r
6734 opADD16_2 r0\r
6735 str r0,[z80xx]\r
6736 fetch 15\r
6737;@LD IX,(NN)\r
6738opcode_DD_2A:\r
6739 ldrb r0,[z80pc],#1\r
6740 ldrb r1,[z80pc],#1\r
6741 orr r0,r0,r1, lsl #8\r
6742 stmfd sp!,{z80xx}\r
6743 readmem16\r
6744 ldmfd sp!,{z80xx}\r
6745 strh r0,[z80xx,#2]\r
6746 fetch 20\r
6747;@DEC IX\r
6748opcode_DD_2B:\r
6749 ldr r0,[z80xx]\r
6750 sub r0,r0,#1<<16\r
6751 str r0,[z80xx]\r
6752 fetch 10\r
6753;@INC X (IX)\r
6754opcode_DD_2C:\r
6755 ldr r0,[z80xx]\r
6756 opINC8L r0\r
6757 str r0,[z80xx]\r
6758 fetch 8\r
6759;@DEC X (IX)\r
6760opcode_DD_2D:\r
6761 ldr r0,[z80xx]\r
6762 opDEC8L r0\r
6763 str r0,[z80xx]\r
6764 fetch 8\r
6765;@LD X,N (IX)\r
6766opcode_DD_2E:\r
6767 ldrb r0,[z80pc],#1\r
6768 strb r0,[z80xx,#2]\r
6769 fetch 11\r
6770;@INC (IX+N)\r
6771opcode_DD_34:\r
6772 ldrsb r0,[z80pc],#1\r
6773 ldr r1,[z80xx]\r
6774 add r0,r0,r1, lsr #16\r
6775 stmfd sp!,{r0} ;@ save addr\r
6776 readmem8\r
6777 opINC8b\r
6778 ldmfd sp!,{r1} ;@ restore addr into r1\r
6779 writemem8\r
6780 fetch 23\r
6781;@DEC (IX+N)\r
6782opcode_DD_35:\r
6783 ldrsb r0,[z80pc],#1\r
6784 ldr r1,[z80xx]\r
6785 add r0,r0,r1, lsr #16\r
6786 stmfd sp!,{r0} ;@ save addr\r
6787 readmem8\r
6788 opDEC8b\r
6789 ldmfd sp!,{r1} ;@ restore addr into r1\r
6790 writemem8\r
6791 fetch 23\r
6792;@LD (IX+N),N\r
6793opcode_DD_36:\r
6794 ldrsb r2,[z80pc],#1\r
6795 ldrb r0,[z80pc],#1\r
6796 ldr r1,[z80xx]\r
6797 add r1,r2,r1, lsr #16\r
6798 writemem8\r
6799 fetch 19\r
6800;@ADD IX,SP\r
6801opcode_DD_39:\r
6802 ldr r0,[z80xx]\r
6803.if FAST_Z80SP\r
6804 ldr r2,[cpucontext,#z80sp_base]\r
6805 sub r2,z80sp,r2\r
6806 opADD16s r0 r2 16\r
6807.else\r
6808 opADD16s r0 z80sp 16\r
6809.endif\r
6810 str r0,[z80xx]\r
6811 fetch 15\r
6812;@LD B,I ( IX )\r
6813opcode_DD_44:\r
6814 ldrb r0,[z80xx,#3]\r
6815 and z80bc,z80bc,#0xFF<<16\r
6816 orr z80bc,z80bc,r0, lsl #24\r
6817 fetch 8\r
6818;@LD B,X ( IX )\r
6819opcode_DD_45:\r
6820 ldrb r0,[z80xx,#2]\r
6821 and z80bc,z80bc,#0xFF<<16\r
6822 orr z80bc,z80bc,r0, lsl #24\r
6823 fetch 8\r
6824;@LD B,(IX,N)\r
6825opcode_DD_46:\r
6826 ldrsb r0,[z80pc],#1\r
6827 ldr r1,[z80xx]\r
6828 add r0,r0,r1, lsr #16\r
6829 readmem8\r
6830 and z80bc,z80bc,#0xFF<<16\r
6831 orr z80bc,z80bc,r0, lsl #24\r
6832 fetch 19\r
6833;@LD C,I (IX)\r
6834opcode_DD_4C:\r
6835 ldrb r0,[z80xx,#3]\r
6836 and z80bc,z80bc,#0xFF<<24\r
6837 orr z80bc,z80bc,r0, lsl #16\r
6838 fetch 8\r
6839;@LD C,X (IX)\r
6840opcode_DD_4D:\r
6841 ldrb r0,[z80xx,#2]\r
6842 and z80bc,z80bc,#0xFF<<24\r
6843 orr z80bc,z80bc,r0, lsl #16\r
6844 fetch 8\r
6845;@LD C,(IX,N)\r
6846opcode_DD_4E:\r
6847 ldrsb r0,[z80pc],#1\r
6848 ldr r1,[z80xx]\r
6849 add r0,r0,r1, lsr #16\r
6850 readmem8\r
6851 and z80bc,z80bc,#0xFF<<24\r
6852 orr z80bc,z80bc,r0, lsl #16\r
6853 fetch 19\r
6854\r
6855;@LD D,I (IX)\r
6856opcode_DD_54:\r
6857 ldrb r0,[z80xx,#3]\r
6858 and z80de,z80de,#0xFF<<16\r
6859 orr z80de,z80de,r0, lsl #24\r
6860 fetch 8\r
6861;@LD D,X (IX)\r
6862opcode_DD_55:\r
6863 ldrb r0,[z80xx,#2]\r
6864 and z80de,z80de,#0xFF<<16\r
6865 orr z80de,z80de,r0, lsl #24\r
6866 fetch 8\r
6867;@LD D,(IX,N)\r
6868opcode_DD_56:\r
6869 ldrsb r0,[z80pc],#1\r
6870 ldr r1,[z80xx]\r
6871 add r0,r0,r1, lsr #16\r
6872 readmem8\r
6873 and z80de,z80de,#0xFF<<16\r
6874 orr z80de,z80de,r0, lsl #24\r
6875 fetch 19\r
6876;@LD E,I (IX)\r
6877opcode_DD_5C:\r
6878 ldrb r0,[z80xx,#3]\r
6879 and z80de,z80de,#0xFF<<24\r
6880 orr z80de,z80de,r0, lsl #16\r
6881 fetch 8\r
6882;@LD E,X (IX)\r
6883opcode_DD_5D:\r
6884 ldrb r0,[z80xx,#2]\r
6885 and z80de,z80de,#0xFF<<24\r
6886 orr z80de,z80de,r0, lsl #16\r
6887 fetch 8\r
6888;@LD E,(IX,N)\r
6889opcode_DD_5E:\r
6890 ldrsb r0,[z80pc],#1\r
6891 ldr r1,[z80xx]\r
6892 add r0,r0,r1, lsr #16\r
6893 readmem8\r
6894 and z80de,z80de,#0xFF<<24\r
6895 orr z80de,z80de,r0, lsl #16\r
6896 fetch 19\r
6897;@LD I,B (IX)\r
6898opcode_DD_60:\r
6899 mov r0,z80bc,lsr#24\r
6900 strb r0,[z80xx,#3]\r
6901 fetch 8\r
6902;@LD I,C (IX)\r
6903opcode_DD_61:\r
6904 mov r0,z80bc,lsr#16\r
6905 strb r0,[z80xx,#3]\r
6906 fetch 8\r
6907;@LD I,D (IX)\r
6908opcode_DD_62:\r
6909 mov r0,z80de,lsr#24\r
6910 strb r0,[z80xx,#3]\r
6911 fetch 8\r
6912;@LD I,E (IX)\r
6913opcode_DD_63:\r
6914 mov r0,z80de,lsr#16\r
6915 strb r0,[z80xx,#3]\r
6916 fetch 8\r
6917;@LD I,I (IX)\r
6918opcode_DD_64:\r
6919 fetch 8\r
6920;@LD I,X (IX)\r
6921opcode_DD_65:\r
6922 ldrb r0,[z80xx,#2]\r
6923 strb r0,[z80xx,#3]\r
6924 fetch 8\r
6925;@LD H,(IX,N)\r
6926opcode_DD_66:\r
6927 ldrsb r0,[z80pc],#1\r
6928 ldr r1,[z80xx]\r
6929 add r0,r0,r1, lsr #16\r
6930 readmem8\r
6931 and z80hl,z80hl,#0xFF<<16\r
6932 orr z80hl,z80hl,r0, lsl #24\r
6933 fetch 19\r
6934;@LD I,A (IX)\r
6935opcode_DD_67:\r
6936 mov r0,z80a,lsr#24\r
6937 strb r0,[z80xx,#3]\r
6938 fetch 8\r
6939;@LD X,B (IX)\r
6940opcode_DD_68:\r
6941 mov r0,z80bc,lsr#24\r
6942 strb r0,[z80xx,#2]\r
6943 fetch 8\r
6944;@LD X,C (IX)\r
6945opcode_DD_69:\r
6946 mov r0,z80bc,lsr#16\r
6947 strb r0,[z80xx,#2]\r
6948 fetch 8\r
6949;@LD X,D (IX)\r
6950opcode_DD_6A:\r
6951 mov r0,z80de,lsr#24\r
6952 strb r0,[z80xx,#2]\r
6953 fetch 8\r
6954;@LD X,E (IX)\r
6955opcode_DD_6B:\r
6956 mov r0,z80de,lsr#16\r
6957 strb r0,[z80xx,#2]\r
6958 fetch 8\r
6959;@LD X,I (IX)\r
6960opcode_DD_6C:\r
6961 ldrb r0,[z80xx,#3]\r
6962 strb r0,[z80xx,#2]\r
6963 fetch 8\r
6964;@LD X,X (IX)\r
6965opcode_DD_6D:\r
6966 fetch 8\r
6967;@LD L,(IX,N)\r
6968opcode_DD_6E:\r
6969 ldrsb r0,[z80pc],#1\r
6970 ldr r1,[z80xx]\r
6971 add r0,r0,r1, lsr #16\r
6972 readmem8\r
6973 and z80hl,z80hl,#0xFF<<24\r
6974 orr z80hl,z80hl,r0, lsl #16\r
6975 fetch 19\r
6976;@LD X,A (IX)\r
6977opcode_DD_6F:\r
6978 mov r0,z80a,lsr#24\r
6979 strb r0,[z80xx,#2]\r
6980 fetch 8\r
6981\r
6982;@LD (IX,N),B\r
6983opcode_DD_70:\r
6984 ldrsb r0,[z80pc],#1\r
6985 ldr r1,[z80xx]\r
6986 add r1,r0,r1, lsr #16\r
6987 mov r0,z80bc, lsr #24\r
6988 writemem8\r
6989 fetch 19\r
6990;@LD (IX,N),C\r
6991opcode_DD_71:\r
6992 ldrsb r0,[z80pc],#1\r
6993 ldr r1,[z80xx]\r
6994 add r1,r0,r1, lsr #16\r
6995 mov r0,z80bc, lsr #16\r
6996 and r0,r0,#0xFF\r
6997 writemem8\r
6998 fetch 19\r
6999;@LD (IX,N),D\r
7000opcode_DD_72:\r
7001 ldrsb r0,[z80pc],#1\r
7002 ldr r1,[z80xx]\r
7003 add r1,r0,r1, lsr #16\r
7004 mov r0,z80de, lsr #24\r
7005 writemem8\r
7006 fetch 19\r
7007;@LD (IX,N),E\r
7008opcode_DD_73:\r
7009 ldrsb r0,[z80pc],#1\r
7010 ldr r1,[z80xx]\r
7011 add r1,r0,r1, lsr #16\r
7012 mov r0,z80de, lsr #16\r
7013 and r0,r0,#0xFF\r
7014 writemem8\r
7015 fetch 19\r
7016;@LD (IX,N),H\r
7017opcode_DD_74:\r
7018 ldrsb r0,[z80pc],#1\r
7019 ldr r1,[z80xx]\r
7020 add r1,r0,r1, lsr #16\r
7021 mov r0,z80hl, lsr #24\r
7022 writemem8\r
7023 fetch 19\r
7024;@LD (IX,N),L\r
7025opcode_DD_75:\r
7026 ldrsb r0,[z80pc],#1\r
7027 ldr r1,[z80xx]\r
7028 add r1,r0,r1, lsr #16\r
7029 mov r0,z80hl, lsr #16\r
7030 and r0,r0,#0xFF\r
7031 writemem8\r
7032 fetch 19\r
7033;@LD (IX,N),A\r
7034opcode_DD_77:\r
7035 ldrsb r0,[z80pc],#1\r
7036 ldr r1,[z80xx]\r
7037 add r1,r0,r1, lsr #16\r
7038 mov r0,z80a, lsr #24\r
7039 writemem8\r
7040 fetch 19\r
7041\r
7042;@LD A,I from (IX)\r
7043opcode_DD_7C:\r
7044 ldrb r0,[z80xx,#3]\r
7045 mov z80a,r0, lsl #24\r
7046 fetch 8\r
7047;@LD A,X from (IX)\r
7048opcode_DD_7D:\r
7049 ldrb r0,[z80xx,#2]\r
7050 mov z80a,r0, lsl #24\r
7051 fetch 8\r
7052;@LD A,(IX,N)\r
7053opcode_DD_7E:\r
7054 ldrsb r0,[z80pc],#1\r
7055 ldr r1,[z80xx]\r
7056 add r0,r0,r1, lsr #16\r
7057 readmem8\r
7058 mov z80a,r0, lsl #24\r
7059 fetch 19\r
7060\r
7061;@ADD A,I ( IX)\r
7062opcode_DD_84:\r
7063 ldrb r0,[z80xx,#3]\r
7064 opADDb\r
7065 fetch 8\r
7066;@ADD A,X ( IX)\r
7067opcode_DD_85:\r
7068 ldrb r0,[z80xx,#2]\r
7069 opADDb\r
7070 fetch 8\r
7071;@ADD A,(IX+N)\r
7072opcode_DD_86:\r
7073 ldrsb r0,[z80pc],#1\r
7074 ldr r1,[z80xx]\r
7075 add r0,r0,r1, lsr #16\r
7076 readmem8\r
7077 opADDb\r
7078 fetch 19\r
7079\r
7080;@ADC A,I (IX)\r
7081opcode_DD_8C:\r
7082 ldrb r0,[z80xx,#3]\r
7083 opADCb\r
7084 fetch 8\r
7085;@ADC A,X (IX)\r
7086opcode_DD_8D:\r
7087 ldrb r0,[z80xx,#2]\r
7088 opADCb\r
7089 fetch 8\r
7090;@ADC A,(IX+N)\r
7091opcode_DD_8E:\r
7092 ldrsb r0,[z80pc],#1\r
7093 ldr r1,[z80xx]\r
7094 add r0,r0,r1, lsr #16\r
7095 readmem8\r
7096 opADCb\r
7097 fetch 19\r
7098\r
7099;@SUB A,I (IX)\r
7100opcode_DD_94:\r
7101 ldrb r0,[z80xx,#3]\r
7102 opSUBb\r
7103 fetch 8\r
7104;@SUB A,X (IX)\r
7105opcode_DD_95:\r
7106 ldrb r0,[z80xx,#2]\r
7107 opSUBb\r
7108 fetch 8\r
7109;@SUB A,(IX+N)\r
7110opcode_DD_96:\r
7111 ldrsb r0,[z80pc],#1\r
7112 ldr r1,[z80xx]\r
7113 add r0,r0,r1, lsr #16\r
7114 readmem8\r
7115 opSUBb\r
7116 fetch 19\r
7117\r
7118;@SBC A,I (IX)\r
7119opcode_DD_9C:\r
7120 ldrb r0,[z80xx,#3]\r
7121 opSBCb\r
7122 fetch 8\r
7123;@SBC A,X (IX)\r
7124opcode_DD_9D:\r
7125 ldrb r0,[z80xx,#2]\r
7126 opSBCb\r
7127 fetch 8\r
7128;@SBC A,(IX+N)\r
7129opcode_DD_9E:\r
7130 ldrsb r0,[z80pc],#1\r
7131 ldr r1,[z80xx]\r
7132 add r0,r0,r1, lsr #16\r
7133 readmem8\r
7134 opSBCb\r
7135 fetch 19\r
7136\r
7137;@AND I (IX)\r
7138opcode_DD_A4:\r
7139 ldrb r0,[z80xx,#3]\r
7140 opANDb\r
7141 fetch 8\r
7142;@AND X (IX)\r
7143opcode_DD_A5:\r
7144 ldrb r0,[z80xx,#2]\r
7145 opANDb\r
7146 fetch 8\r
7147;@AND (IX+N)\r
7148opcode_DD_A6:\r
7149 ldrsb r0,[z80pc],#1\r
7150 ldr r1,[z80xx]\r
7151 add r0,r0,r1, lsr #16\r
7152 readmem8\r
7153 opANDb\r
7154 fetch 19\r
7155\r
7156;@XOR I (IX)\r
7157opcode_DD_AC:\r
7158 ldrb r0,[z80xx,#3]\r
7159 opXORb\r
7160 fetch 8\r
7161;@XOR X (IX)\r
7162opcode_DD_AD:\r
7163 ldrb r0,[z80xx,#2]\r
7164 opXORb\r
7165 fetch 8\r
7166;@XOR (IX+N)\r
7167opcode_DD_AE:\r
7168 ldrsb r0,[z80pc],#1\r
7169 ldr r1,[z80xx]\r
7170 add r0,r0,r1, lsr #16\r
7171 readmem8\r
7172 opXORb\r
7173 fetch 19\r
7174\r
7175;@OR I (IX)\r
7176opcode_DD_B4:\r
7177 ldrb r0,[z80xx,#3]\r
7178 opORb\r
7179 fetch 8\r
7180;@OR X (IX)\r
7181opcode_DD_B5:\r
7182 ldrb r0,[z80xx,#2]\r
7183 opORb\r
7184 fetch 8\r
7185;@OR (IX+N)\r
7186opcode_DD_B6:\r
7187 ldrsb r0,[z80pc],#1\r
7188 ldr r1,[z80xx]\r
7189 add r0,r0,r1, lsr #16\r
7190 readmem8\r
7191 opORb\r
7192 fetch 19\r
7193\r
7194;@CP I (IX)\r
7195opcode_DD_BC:\r
7196 ldrb r0,[z80xx,#3]\r
7197 opCPb\r
7198 fetch 8\r
7199;@CP X (IX)\r
7200opcode_DD_BD:\r
7201 ldrb r0,[z80xx,#2]\r
7202 opCPb\r
7203 fetch 8\r
7204;@CP (IX+N)\r
7205opcode_DD_BE:\r
7206 ldrsb r0,[z80pc],#1\r
7207 ldr r1,[z80xx]\r
7208 add r0,r0,r1, lsr #16\r
7209 readmem8\r
7210 opCPb\r
7211 fetch 19\r
7212\r
7213\r
7214opcodes_DD_CB_LOCAL: .word opcodes_DD_CB\r
7215opcode_DD_CB:\r
7216;@Looks up the opcode on the opcodes_DD_CB table and then \r
7217;@moves the PC to the location of the subroutine\r
7218 ldrsb r0,[z80pc],#1\r
7219 ldr r1,[z80xx]\r
7220 add r0,r0,r1, lsr #16\r
7221\r
7222 ldrb r1,[z80pc],#1\r
7223 ldr pc,[pc,r1, lsl #2]\r
7224 .word 0x00\r
7225opcodes_DD_CB:\r
7226 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_06,opcode_DD_NF2\r
7227 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_0E,opcode_DD_NF2\r
7228 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_16,opcode_DD_NF2\r
7229 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_1E,opcode_DD_NF2\r
7230 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_26,opcode_DD_NF2\r
7231 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_2E,opcode_DD_NF2\r
7232 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_36,opcode_DD_NF2\r
7233 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_3E,opcode_DD_NF2\r
7234 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_46,opcode_DD_NF2\r
7235 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_4E,opcode_DD_NF2\r
7236 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_56,opcode_DD_NF2\r
7237 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_5E,opcode_DD_NF2\r
7238 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_66,opcode_DD_NF2\r
7239 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_6E,opcode_DD_NF2\r
7240 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_76,opcode_DD_NF2\r
7241 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_7E,opcode_DD_NF2\r
7242 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_86,opcode_DD_NF2\r
7243 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_8E,opcode_DD_NF2\r
7244 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_96,opcode_DD_NF2\r
7245 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_9E,opcode_DD_NF2\r
7246 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_A6,opcode_DD_NF2\r
7247 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_AE,opcode_DD_NF2\r
7248 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_B6,opcode_DD_NF2\r
7249 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_BE,opcode_DD_NF2\r
7250 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_C6,opcode_DD_NF2\r
7251 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_CE,opcode_DD_NF2\r
7252 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_D6,opcode_DD_NF2\r
7253 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_DE,opcode_DD_NF2\r
7254 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_E6,opcode_DD_NF2\r
7255 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_EE,opcode_DD_NF2\r
7256 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_F6,opcode_DD_NF2\r
7257 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_FE,opcode_DD_NF2\r
7258\r
7259;@RLC (IX+N) \r
7260opcode_DD_CB_06:\r
7261 stmfd sp!,{r0} ;@ save addr\r
7262 readmem8\r
7263 opRLCb\r
7264 ldmfd sp!,{r1} ;@ restore addr into r1\r
7265 writemem8\r
7266 fetch 23\r
7267;@RRC (IX+N) \r
7268opcode_DD_CB_0E:\r
7269 stmfd sp!,{r0} ;@ save addr\r
7270 readmem8\r
7271 opRRCb\r
7272 ldmfd sp!,{r1} ;@ restore addr into r1\r
7273 writemem8\r
7274 fetch 23\r
7275;@RL (IX+N) \r
7276opcode_DD_CB_16:\r
7277 stmfd sp!,{r0} ;@ save addr\r
7278 readmem8\r
7279 opRLb\r
7280 ldmfd sp!,{r1} ;@ restore addr into r1\r
7281 writemem8\r
7282 fetch 23\r
7283;@RR (IX+N) \r
7284opcode_DD_CB_1E:\r
7285 stmfd sp!,{r0} ;@ save addr \r
7286 readmem8\r
7287 opRRb\r
7288 ldmfd sp!,{r1} ;@ restore addr into r1\r
7289 writemem8\r
7290 fetch 23\r
7291\r
7292;@SLA (IX+N) \r
7293opcode_DD_CB_26:\r
7294 stmfd sp!,{r0} ;@ save addr \r
7295 readmem8\r
7296 opSLAb\r
7297 ldmfd sp!,{r1} ;@ restore addr into r1\r
7298 writemem8\r
7299 fetch 23\r
7300;@SRA (IX+N) \r
7301opcode_DD_CB_2E:\r
7302 stmfd sp!,{r0} ;@ save addr \r
7303 readmem8\r
7304 opSRAb\r
7305 ldmfd sp!,{r1} ;@ restore addr into r1\r
7306 writemem8\r
7307 fetch 23\r
7308;@SLL (IX+N) \r
7309opcode_DD_CB_36:\r
7310 stmfd sp!,{r0} ;@ save addr \r
7311 readmem8\r
7312 opSLLb\r
7313 ldmfd sp!,{r1} ;@ restore addr into r1\r
7314 writemem8\r
7315 fetch 23\r
7316;@SRL (IX+N)\r
7317opcode_DD_CB_3E:\r
7318 stmfd sp!,{r0} ;@ save addr \r
7319 readmem8\r
7320 opSRLb\r
7321 ldmfd sp!,{r1} ;@ restore addr into r1\r
7322 writemem8\r
7323 fetch 23\r
7324\r
7325;@BIT 0,(IX+N) \r
7326opcode_DD_CB_46:\r
7327 readmem8\r
7328 opBITb 0\r
7329 fetch 20\r
7330;@BIT 1,(IX+N) \r
7331opcode_DD_CB_4E:\r
7332 readmem8\r
7333 opBITb 1\r
7334 fetch 20\r
7335;@BIT 2,(IX+N) \r
7336opcode_DD_CB_56:\r
7337 readmem8\r
7338 opBITb 2\r
7339 fetch 20\r
7340;@BIT 3,(IX+N) \r
7341opcode_DD_CB_5E:\r
7342 readmem8\r
7343 opBITb 3\r
7344 fetch 20\r
7345;@BIT 4,(IX+N) \r
7346opcode_DD_CB_66:\r
7347 readmem8\r
7348 opBITb 4\r
7349 fetch 20\r
7350;@BIT 5,(IX+N) \r
7351opcode_DD_CB_6E:\r
7352 readmem8\r
7353 opBITb 5\r
7354 fetch 20\r
7355;@BIT 6,(IX+N) \r
7356opcode_DD_CB_76:\r
7357 readmem8\r
7358 opBITb 6\r
7359 fetch 20\r
7360;@BIT 7,(IX+N) \r
7361opcode_DD_CB_7E:\r
7362 readmem8\r
7363 opBIT7b\r
7364 fetch 20\r
7365;@RES 0,(IX+N) \r
7366opcode_DD_CB_86:\r
7367 opRESmem 0\r
7368;@RES 1,(IX+N) \r
7369opcode_DD_CB_8E:\r
7370 opRESmem 1\r
7371;@RES 2,(IX+N) \r
7372opcode_DD_CB_96:\r
7373 opRESmem 2\r
7374;@RES 3,(IX+N) \r
7375opcode_DD_CB_9E:\r
7376 opRESmem 3\r
7377;@RES 4,(IX+N) \r
7378opcode_DD_CB_A6:\r
7379 opRESmem 4\r
7380;@RES 5,(IX+N) \r
7381opcode_DD_CB_AE:\r
7382 opRESmem 5\r
7383;@RES 6,(IX+N) \r
7384opcode_DD_CB_B6:\r
7385 opRESmem 6\r
7386;@RES 7,(IX+N) \r
7387opcode_DD_CB_BE:\r
7388 opRESmem 7\r
7389\r
7390;@SET 0,(IX+N) \r
7391opcode_DD_CB_C6:\r
7392 opSETmem 0\r
7393;@SET 1,(IX+N) \r
7394opcode_DD_CB_CE:\r
7395 opSETmem 1\r
7396;@SET 2,(IX+N) \r
7397opcode_DD_CB_D6:\r
7398 opSETmem 2\r
7399;@SET 3,(IX+N) \r
7400opcode_DD_CB_DE:\r
7401 opSETmem 3\r
7402;@SET 4,(IX+N) \r
7403opcode_DD_CB_E6:\r
7404 opSETmem 4\r
7405;@SET 5,(IX+N) \r
7406opcode_DD_CB_EE:\r
7407 opSETmem 5\r
7408;@SET 6,(IX+N) \r
7409opcode_DD_CB_F6:\r
7410 opSETmem 6\r
7411;@SET 7,(IX+N) \r
7412opcode_DD_CB_FE:\r
7413 opSETmem 7\r
7414\r
7415\r
7416\r
7417;@POP IX\r
7418opcode_DD_E1:\r
7419.if FAST_Z80SP\r
7420 opPOP\r
7421.else\r
7422 mov r0,z80sp\r
7423 stmfd sp!,{z80xx}\r
7424 readmem16\r
7425 ldmfd sp!,{z80xx}\r
7426 add z80sp,z80sp,#2\r
7427.endif\r
7428 strh r0,[z80xx,#2]\r
7429 fetch 14\r
7430;@EX (SP),IX\r
7431opcode_DD_E3:\r
7432.if FAST_Z80SP\r
7433 ldrb r0,[z80sp]\r
7434 ldrb r1,[z80sp,#1]\r
7435 orr r2,r0,r1, lsl #8\r
7436 ldrh r1,[z80xx,#2]\r
7437 mov r0,r1, lsr #8\r
7438 strb r0,[z80sp,#1]\r
7439 strb r1,[z80sp]\r
7440 strh r2,[z80xx,#2]\r
7441.else\r
7442 mov r0,z80sp\r
7443 stmfd sp!,{z80xx}\r
7444 readmem16\r
7445 ldmfd sp!,{z80xx}\r
7446 mov r2,r0\r
7447 ldrh r0,[z80xx,#2]\r
7448 strh r2,[z80xx,#2]\r
7449 mov r1,z80sp\r
7450 writemem16\r
7451.endif\r
7452 fetch 23\r
7453;@PUSH IX\r
7454opcode_DD_E5:\r
7455 ldr r2,[z80xx]\r
7456 opPUSHreg r2\r
7457 fetch 15\r
7458;@JP (IX)\r
7459opcode_DD_E9:\r
7460 ldrh r0,[z80xx,#2]\r
7461 rebasepc\r
7462 fetch 8\r
7463;@LD SP,IX\r
7464opcode_DD_F9:\r
7465.if FAST_Z80SP\r
7466 ldrh r0,[z80xx,#2]\r
7467 rebasesp\r
7468 mov z80sp,r0\r
7469.else\r
7470 ldrh z80sp,[z80xx,#2]\r
7471.endif\r
7472 fetch 10\r
7473\r
7474;@##################################\r
7475;@##################################\r
7476;@### opcodes ED #########################\r
7477;@##################################\r
7478;@##################################\r
7479\r
7480opcode_ED_NF:\r
7481 fetch 8\r
7482;@ ldrb r0,[z80pc],#1\r
7483;@ ldr pc,[opcodes,r0, lsl #2]\r
7484;@ mov r0,#0xED00\r
7485;@ orr r0,r0,r1\r
7486;@ b end_loop\r
7487\r
7488;@IN B,(C)\r
7489opcode_ED_40:\r
7490 opIN_C\r
7491 and z80bc,z80bc,#0xFF<<16\r
7492 orr z80bc,z80bc,r0, lsl #24\r
7493 sub r1,opcodes,#0x100\r
7494 ldrb r0,[r1,r0]\r
7495 and z80f,z80f,#1<<CFlag\r
7496 orr z80f,z80f,r0\r
7497 fetch 12\r
7498;@OUT (C),B\r
7499opcode_ED_41:\r
7500 mov r1,z80bc, lsr #24\r
7501 opOUT_C\r
7502 fetch 12\r
7503\r
7504;@SBC HL,BC\r
7505opcode_ED_42:\r
7506 opSBC16 z80bc\r
7507\r
7508;@LD (NN),BC\r
7509opcode_ED_43:\r
7510 ldrb r0,[z80pc],#1\r
7511 ldrb r1,[z80pc],#1\r
7512 orr r1,r0,r1, lsl #8\r
7513 mov r0,z80bc, lsr #16\r
7514 writemem16\r
7515 fetch 20\r
7516;@NEG\r
7517opcode_ED_44:\r
7518 rsbs z80a,z80a,#0\r
7519 mrs z80f,cpsr\r
7520 mov z80f,z80f,lsr#28 ;@S,Z,V&C\r
7521 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@invert C and set n.\r
7522 tst z80a,#0x0F000000 ;@H, correct\r
7523 orrne z80f,z80f,#1<<HFlag\r
7524 fetch 8\r
7525 \r
7526;@RETN, moved to ED_4D\r
7527;@opcode_ED_45:\r
7528\r
7529;@IM 0\r
7530opcode_ED_46:\r
7531 strb z80a,[cpucontext,#z80im]\r
7532 fetch 8\r
7533;@LD I,A\r
7534opcode_ED_47:\r
7535 str z80a,[cpucontext,#z80i]\r
7536 fetch 9\r
7537;@IN C,(C)\r
7538opcode_ED_48:\r
7539 opIN_C\r
7540 and z80bc,z80bc,#0xFF<<24\r
7541 orr z80bc,z80bc,r0, lsl #16\r
7542 sub r1,opcodes,#0x100\r
7543 ldrb r0,[r1,r0]\r
7544 and z80f,z80f,#1<<CFlag\r
7545 orr z80f,z80f,r0\r
7546 fetch 12\r
7547;@OUT (C),C\r
7548opcode_ED_49:\r
7549 mov r0,z80bc, lsr #16\r
7550 and r1,r0,#0xFF\r
7551 opOUT\r
7552 fetch 12\r
7553;@ADC HL,BC\r
7554opcode_ED_4A:\r
7555 opADC16 z80bc\r
7556;@LD BC,(NN)\r
7557opcode_ED_4B:\r
7558 ldrb r0,[z80pc],#1\r
7559 ldrb r1,[z80pc],#1\r
7560 orr r0,r0,r1, lsl #8\r
7561 readmem16\r
7562 mov z80bc,r0, lsl #16\r
7563 fetch 20\r
7564\r
7565;@RETN\r
7566opcode_ED_45:\r
7567;@RETI\r
7568opcode_ED_4D:\r
7569 ldrb r0,[cpucontext,#z80if]\r
7570 tst r0,#Z80_IF2\r
7571 orrne r0,r0,#Z80_IF1\r
7572 biceq r0,r0,#Z80_IF1\r
7573 strb r0,[cpucontext,#z80if]\r
7574 opPOP\r
7575 rebasepc\r
7576 fetch 14\r
7577\r
7578;@LD R,A\r
7579opcode_ED_4F:\r
7580 mov r0,z80a,lsr#24\r
7581 strb r0,[cpucontext,#z80r]\r
7582 fetch 9\r
7583\r
7584;@IN D,(C)\r
7585opcode_ED_50:\r
7586 opIN_C\r
7587 and z80de,z80de,#0xFF<<16\r
7588 orr z80de,z80de,r0, lsl #24\r
7589 sub r1,opcodes,#0x100\r
7590 ldrb r0,[r1,r0]\r
7591 and z80f,z80f,#1<<CFlag\r
7592 orr z80f,z80f,r0\r
7593 fetch 12\r
7594;@OUT (C),D\r
7595opcode_ED_51:\r
7596 mov r1,z80de, lsr #24\r
7597 opOUT_C\r
7598 fetch 12\r
7599;@SBC HL,DE\r
7600opcode_ED_52:\r
7601 opSBC16 z80de\r
7602;@LD (NN),DE\r
7603opcode_ED_53:\r
7604 ldrb r0,[z80pc],#1\r
7605 ldrb r1,[z80pc],#1\r
7606 orr r1,r0,r1, lsl #8\r
7607 mov r0,z80de, lsr #16\r
7608 writemem16\r
7609 fetch 20\r
7610;@IM 1\r
7611opcode_ED_56:\r
7612 mov r0,#1\r
7613 strb r0,[cpucontext,#z80im]\r
7614 fetch 8\r
7615;@LD A,I\r
7616opcode_ED_57:\r
7617 ldr z80a,[cpucontext,#z80i]\r
7618 tst z80a,#0xFF000000\r
7619 and z80f,z80f,#(1<<CFlag)\r
7620 orreq z80f,z80f,#(1<<ZFlag)\r
7621 orrmi z80f,z80f,#(1<<SFlag)\r
7622 ldrb r0,[cpucontext,#z80if]\r
7623 tst r0,#Z80_IF2\r
7624 orrne z80f,z80f,#(1<<VFlag)\r
7625 fetch 9\r
7626;@IN E,(C)\r
7627opcode_ED_58:\r
7628 opIN_C\r
7629 and z80de,z80de,#0xFF<<24\r
7630 orr z80de,z80de,r0, lsl #16\r
7631 sub r1,opcodes,#0x100\r
7632 ldrb r0,[r1,r0]\r
7633 and z80f,z80f,#1<<CFlag\r
7634 orr z80f,z80f,r0\r
7635 fetch 12\r
7636;@OUT (C),E\r
7637opcode_ED_59:\r
7638 mov r1,z80de, lsr #16\r
7639 and r1,r1,#0xFF\r
7640 opOUT_C\r
7641 fetch 12\r
7642;@ADC HL,DE\r
7643opcode_ED_5A:\r
7644 opADC16 z80de\r
7645;@LD DE,(NN)\r
7646opcode_ED_5B:\r
7647 ldrb r0,[z80pc],#1\r
7648 ldrb r1,[z80pc],#1\r
7649 orr r0,r0,r1, lsl #8\r
7650 readmem16\r
7651 mov z80de,r0, lsl #16\r
7652 fetch 20\r
7653;@IM 2\r
7654opcode_ED_5E:\r
7655 mov r0,#2\r
7656 strb r0,[cpucontext,#z80im]\r
7657 fetch 8\r
7658;@LD A,R\r
7659opcode_ED_5F:\r
7660 ldrb r0,[cpucontext,#z80r]\r
7661 and r0,r0,#0x80\r
7662 rsb r1,z80_icount,#0\r
7663 and r1,r1,#0x7F\r
7664 orr r0,r0,r1\r
7665 movs z80a,r0, lsl #24\r
7666 and z80f,z80f,#1<<CFlag\r
7667 orrmi z80f,z80f,#(1<<SFlag)\r
7668 orreq z80f,z80f,#(1<<ZFlag)\r
7669 ldrb r0,[cpucontext,#z80if]\r
7670 tst r0,#Z80_IF2\r
7671 orrne z80f,z80f,#(1<<VFlag)\r
7672 fetch 9\r
7673;@IN H,(C)\r
7674opcode_ED_60:\r
7675 opIN_C\r
7676 and z80hl,z80hl,#0xFF<<16\r
7677 orr z80hl,z80hl,r0, lsl #24\r
7678 sub r1,opcodes,#0x100\r
7679 ldrb r0,[r1,r0]\r
7680 and z80f,z80f,#1<<CFlag\r
7681 orr z80f,z80f,r0\r
7682 fetch 12\r
7683;@OUT (C),H\r
7684opcode_ED_61:\r
7685 mov r1,z80hl, lsr #24\r
7686 opOUT_C\r
7687 fetch 12\r
7688;@SBC HL,HL\r
7689opcode_ED_62:\r
7690 opSBC16HL\r
7691;@RRD\r
7692opcode_ED_67:\r
7693 readmem8HL\r
7694 mov r1,r0,ror#4\r
7695 orr r0,r1,z80a,lsr#20\r
7696 bic z80a,z80a,#0x0F000000\r
7697 orr z80a,z80a,r1,lsr#4\r
7698 writemem8HL\r
7699 sub r1,opcodes,#0x100\r
7700 ldrb r0,[r1,z80a, lsr #24]\r
7701 and z80f,z80f,#1<<CFlag\r
7702 orr z80f,z80f,r0\r
7703 fetch 18\r
7704;@IN L,(C)\r
7705opcode_ED_68:\r
7706 opIN_C\r
7707 and z80hl,z80hl,#0xFF<<24\r
7708 orr z80hl,z80hl,r0, lsl #16\r
7709 and z80f,z80f,#1<<CFlag\r
7710 sub r1,opcodes,#0x100\r
7711 ldrb r0,[r1,r0]\r
7712 orr z80f,z80f,r0\r
7713 fetch 12\r
7714;@OUT (C),L\r
7715opcode_ED_69:\r
7716 mov r1,z80hl, lsr #16\r
7717 and r1,r1,#0xFF\r
7718 opOUT_C\r
7719 fetch 12\r
7720;@ADC HL,HL\r
7721opcode_ED_6A:\r
7722 opADC16HL\r
7723;@RLD\r
7724opcode_ED_6F:\r
7725 readmem8HL\r
7726 orr r0,r0,z80a,lsl#4\r
7727 mov r0,r0,ror#28\r
7728 and z80a,z80a,#0xF0000000\r
7729 orr z80a,z80a,r0,lsl#16\r
7730 and z80a,z80a,#0xFF000000\r
7731 writemem8HL\r
7732 sub r1,opcodes,#0x100\r
7733 ldrb r0,[r1,z80a, lsr #24]\r
7734 and z80f,z80f,#1<<CFlag\r
7735 orr z80f,z80f,r0\r
7736 fetch 18\r
7737;@IN F,(C)\r
7738opcode_ED_70:\r
7739 opIN_C\r
7740 and z80f,z80f,#1<<CFlag\r
7741 sub r1,opcodes,#0x100\r
7742 ldrb r0,[r1,r0]\r
7743 orr z80f,z80f,r0\r
7744 fetch 12\r
7745;@OUT (C),0\r
7746opcode_ED_71:\r
7747 mov r1,#0\r
7748 opOUT_C\r
7749 fetch 12\r
7750\r
7751;@SBC HL,SP\r
7752opcode_ED_72:\r
7753.if FAST_Z80SP\r
7754 ldr r0,[cpucontext,#z80sp_base]\r
7755 sub r0,z80sp,r0\r
7756 mov r0, r0, lsl #16\r
7757.else\r
7758 mov r0,z80sp,lsl#16\r
7759.endif\r
7760 opSBC16 r0\r
7761;@LD (NN),SP\r
7762opcode_ED_73:\r
7763 ldrb r0,[z80pc],#1\r
7764 ldrb r1,[z80pc],#1\r
7765 orr r1,r0,r1, lsl #8\r
7766.if FAST_Z80SP\r
7767 ldr r0,[cpucontext,#z80sp_base]\r
7768 sub r0,z80sp,r0\r
7769.else\r
7770 mov r0,z80sp\r
7771.endif\r
7772 writemem16\r
7773 fetch 16\r
7774;@IN A,(C)\r
7775opcode_ED_78:\r
7776 opIN_C\r
7777 mov z80a,r0, lsl #24\r
7778 and z80f,z80f,#1<<CFlag\r
7779 sub r1,opcodes,#0x100\r
7780 ldrb r0,[r1,r0]\r
7781 orr z80f,z80f,r0\r
7782 fetch 12\r
7783;@OUT (C),A\r
7784opcode_ED_79:\r
7785 mov r1,z80a, lsr #24\r
7786 opOUT_C\r
7787 fetch 12\r
7788;@ADC HL,SP\r
7789opcode_ED_7A:\r
7790.if FAST_Z80SP\r
7791 ldr r0,[cpucontext,#z80sp_base]\r
7792 sub r0,z80sp,r0\r
7793 mov r0, r0, lsl #16\r
7794.else\r
7795 mov r0,z80sp,lsl#16\r
7796.endif\r
7797 opADC16 r0\r
7798;@LD SP,(NN)\r
7799opcode_ED_7B:\r
7800 ldrb r0,[z80pc],#1\r
7801 ldrb r1,[z80pc],#1\r
7802 orr r0,r0,r1, lsl #8\r
7803 readmem16\r
7804.if FAST_Z80SP\r
7805 rebasesp\r
7806.endif\r
7807 mov z80sp,r0\r
7808 fetch 20\r
7809;@LDI\r
7810opcode_ED_A0:\r
7811 copymem8HL_DE\r
7812 add z80hl,z80hl,#1<<16\r
7813 add z80de,z80de,#1<<16\r
7814 subs z80bc,z80bc,#1<<16\r
7815 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7816 orrne z80f,z80f,#1<<VFlag\r
7817 fetch 16\r
7818;@CPI\r
7819opcode_ED_A1:\r
7820 readmem8HL\r
7821 add z80hl,z80hl,#0x00010000\r
7822 mov r1,z80a,lsl#4\r
7823 cmp z80a,r0,lsl#24\r
7824 and z80f,z80f,#1<<CFlag\r
7825 orr z80f,z80f,#1<<NFlag\r
7826 orrmi z80f,z80f,#1<<SFlag\r
7827 orreq z80f,z80f,#1<<ZFlag\r
7828 cmp r1,r0,lsl#28\r
7829 orrcc z80f,z80f,#1<<HFlag\r
7830 subs z80bc,z80bc,#0x00010000\r
7831 orrne z80f,z80f,#1<<VFlag\r
7832 fetch 16\r
7833;@INI\r
7834opcode_ED_A2:\r
7835 opIN_C\r
7836 and z80f,r0,#0x80\r
7837 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7838;@ mov r1,z80bc,lsl#8\r
7839;@ add r1,r1,#0x01000000\r
7840;@ adds r1,r1,r0,lsl#24\r
7841;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7842 writemem8HL\r
7843 add z80hl,z80hl,#1<<16\r
7844 sub z80bc,z80bc,#1<<24\r
7845 tst z80bc,#0xFF<<24\r
7846 orrmi z80f,z80f,#1<<SFlag\r
7847 orreq z80f,z80f,#1<<ZFlag\r
7848 fetch 16\r
7849\r
7850;@OUTI\r
7851opcode_ED_A3:\r
7852 readmem8HL\r
7853 add z80hl,z80hl,#1<<16\r
7854 and z80f,r0,#0x80\r
7855 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7856 mov r1,z80hl,lsl#8\r
7857 adds r1,r1,r0,lsl#24\r
7858 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL)+L > 0xFF\r
7859 sub z80bc,z80bc,#1<<24\r
7860 tst z80bc,#0xFF<<24\r
7861 orrmi z80f,z80f,#1<<SFlag\r
7862 orreq z80f,z80f,#1<<ZFlag\r
7863 mov r1,r0\r
7864 opOUT_C\r
7865 fetch 16\r
7866\r
7867;@LDD\r
7868opcode_ED_A8:\r
7869 copymem8HL_DE\r
7870 sub z80hl,z80hl,#1<<16\r
7871 sub z80de,z80de,#1<<16\r
7872 subs z80bc,z80bc,#1<<16\r
7873 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7874 orrne z80f,z80f,#1<<VFlag\r
7875 fetch 16\r
7876\r
7877;@CPD\r
7878opcode_ED_A9:\r
7879 readmem8HL\r
7880 sub z80hl,z80hl,#1<<16\r
7881 mov r1,z80a,lsl#4\r
7882 cmp z80a,r0,lsl#24\r
7883 and z80f,z80f,#1<<CFlag\r
7884 orr z80f,z80f,#1<<NFlag\r
7885 orrmi z80f,z80f,#1<<SFlag\r
7886 orreq z80f,z80f,#1<<ZFlag\r
7887 cmp r1,r0,lsl#28\r
7888 orrcc z80f,z80f,#1<<HFlag\r
7889 subs z80bc,z80bc,#0x00010000\r
7890 orrne z80f,z80f,#1<<VFlag\r
7891 fetch 16\r
7892\r
7893;@IND\r
7894opcode_ED_AA:\r
7895 opIN_C\r
7896 and z80f,r0,#0x80\r
7897 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7898;@ mov r1,z80bc,lsl#8\r
7899;@ sub r1,r1,#0x01000000\r
7900;@ adds r1,r1,r0,lsl#24\r
7901;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
7902 writemem8HL\r
7903 sub z80hl,z80hl,#1<<16\r
7904 sub z80bc,z80bc,#1<<24\r
7905 tst z80bc,#0xFF<<24\r
7906 orrmi z80f,z80f,#1<<SFlag\r
7907 orreq z80f,z80f,#1<<ZFlag\r
7908 fetch 16\r
7909\r
7910;@OUTD\r
7911opcode_ED_AB:\r
7912 readmem8HL\r
7913 sub z80hl,z80hl,#1<<16\r
7914 and z80f,r0,#0x80\r
7915 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7916 mov r1,z80hl,lsl#8\r
7917 adds r1,r1,r0,lsl#24\r
7918 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7919 sub z80bc,z80bc,#1<<24\r
7920 tst z80bc,#0xFF<<24\r
7921 orrmi z80f,z80f,#1<<SFlag\r
7922 orreq z80f,z80f,#1<<ZFlag\r
7923 mov r1,r0\r
7924 opOUT_C\r
7925 fetch 16\r
7926;@LDIR\r
7927opcode_ED_B0:\r
7928 copymem8HL_DE\r
7929 add z80hl,z80hl,#1<<16\r
7930 add z80de,z80de,#1<<16\r
7931 subs z80bc,z80bc,#1<<16\r
7932 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7933 orrne z80f,z80f,#1<<VFlag\r
7934 subne z80pc,z80pc,#2\r
7935 subne z80_icount,z80_icount,#5\r
7936 fetch 16\r
7937\r
7938;@CPIR\r
7939opcode_ED_B1:\r
7940 readmem8HL\r
7941 add z80hl,z80hl,#1<<16 \r
7942 mov r1,z80a,lsl#4\r
7943 cmp z80a,r0,lsl#24\r
7944 and z80f,z80f,#1<<CFlag\r
7945 orr z80f,z80f,#1<<NFlag\r
7946 orrmi z80f,z80f,#1<<SFlag\r
7947 orreq z80f,z80f,#1<<ZFlag\r
7948 cmp r1,r0,lsl#28\r
7949 orrcc z80f,z80f,#1<<HFlag\r
7950 subs z80bc,z80bc,#1<<16\r
7951 bne opcode_ED_B1_decpc\r
7952 fetch 16\r
7953opcode_ED_B1_decpc:\r
7954 orr z80f,z80f,#1<<VFlag\r
7955 tst z80f,#1<<ZFlag\r
7956 subeq z80pc,z80pc,#2\r
7957 subeq z80_icount,z80_icount,#5\r
7958 fetch 16\r
7959;@INIR\r
7960opcode_ED_B2:\r
7961 opIN_C\r
7962 and z80f,r0,#0x80\r
7963 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7964;@ mov r1,z80bc,lsl#8\r
7965;@ add r1,r1,#0x01000000\r
7966;@ adds r1,r1,r0,lsl#24\r
7967;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7968 writemem8HL\r
7969 add z80hl,z80hl,#1<<16\r
7970 sub z80bc,z80bc,#1<<24\r
7971 tst z80bc,#0xFF<<24\r
7972 orrmi z80f,z80f,#1<<SFlag\r
7973 orreq z80f,z80f,#1<<ZFlag\r
7974 subne z80pc,z80pc,#2\r
7975 subne z80_icount,z80_icount,#5\r
7976 fetch 16\r
7977;@OTIR\r
7978opcode_ED_B3:\r
7979 readmem8HL\r
7980 add z80hl,z80hl,#1<<16\r
7981 and z80f,r0,#0x80\r
7982 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7983 mov r1,z80hl,lsl#8\r
7984 adds r1,r1,r0,lsl#24\r
7985 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7986 sub z80bc,z80bc,#1<<24\r
7987 tst z80bc,#0xFF<<24\r
7988 orrmi z80f,z80f,#1<<SFlag\r
7989 orreq z80f,z80f,#1<<ZFlag\r
7990 subne z80pc,z80pc,#2\r
7991 subne z80_icount,z80_icount,#5\r
7992 mov r1,r0\r
7993 opOUT_C\r
7994 fetch 16\r
7995;@LDDR\r
7996opcode_ED_B8:\r
7997 copymem8HL_DE\r
7998 sub z80hl,z80hl,#1<<16\r
7999 sub z80de,z80de,#1<<16\r
8000 subs z80bc,z80bc,#1<<16\r
8001 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
8002 orrne z80f,z80f,#1<<VFlag\r
8003 subne z80pc,z80pc,#2\r
8004 subne z80_icount,z80_icount,#5\r
8005 fetch 16\r
8006\r
8007;@CPDR\r
8008opcode_ED_B9:\r
8009 readmem8HL\r
8010 sub z80hl,z80hl,#1<<16\r
8011 mov r1,z80a,lsl#4\r
8012 cmp z80a,r0,lsl#24\r
8013 and z80f,z80f,#1<<CFlag\r
8014 orr z80f,z80f,#1<<NFlag\r
8015 orrmi z80f,z80f,#1<<SFlag\r
8016 orreq z80f,z80f,#1<<ZFlag\r
8017 cmp r1,r0,lsl#28\r
8018 orrcc z80f,z80f,#1<<HFlag\r
8019 subs z80bc,z80bc,#1<<16\r
8020 bne opcode_ED_B9_decpc\r
8021 fetch 16\r
8022opcode_ED_B9_decpc:\r
8023 orr z80f,z80f,#1<<VFlag\r
8024 tst z80f,#1<<ZFlag\r
8025 subeq z80pc,z80pc,#2\r
8026 subeq z80_icount,z80_icount,#5\r
8027 fetch 16\r
8028;@INDR\r
8029opcode_ED_BA:\r
8030 opIN_C\r
8031 and z80f,r0,#0x80\r
8032 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8033;@ mov r1,z80bc,lsl#8\r
8034;@ sub r1,r1,#0x01000000\r
8035;@ adds r1,r1,r0,lsl#24\r
8036;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
8037 writemem8HL\r
8038 sub z80hl,z80hl,#1<<16\r
8039 sub z80bc,z80bc,#1<<24\r
8040 tst z80bc,#0xFF<<24\r
8041 orrmi z80f,z80f,#1<<SFlag\r
8042 orreq z80f,z80f,#1<<ZFlag\r
8043 subne z80pc,z80pc,#2\r
8044 subne z80_icount,z80_icount,#5\r
8045 fetch 16\r
8046;@OTDR\r
8047opcode_ED_BB:\r
8048 readmem8HL\r
8049 sub z80hl,z80hl,#1<<16\r
8050 and z80f,r0,#0x80\r
8051 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8052 mov r1,z80hl,lsl#8\r
8053 adds r1,r1,r0,lsl#24\r
8054 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
8055 sub z80bc,z80bc,#1<<24\r
8056 tst z80bc,#0xFF<<24\r
8057 orrmi z80f,z80f,#1<<SFlag\r
8058 orreq z80f,z80f,#1<<ZFlag\r
8059 subne z80pc,z80pc,#2\r
8060 subne z80_icount,z80_icount,#5\r
8061 mov r1,r0\r
8062 opOUT_C\r
8063 fetch 16\r
8064;@##################################\r
8065;@##################################\r
8066;@### opcodes FD #########################\r
8067;@##################################\r
8068;@##################################\r
8069;@Since DD and FD opcodes are all the same apart from the address\r
8070;@register they use. When a FD intruction the program runs the code\r
8071;@from the DD location but the address of the IY reg is passed instead\r
8072;@of IX\r
8073\r
8074end_loop:\r
8075 b end_loop\r
8076\r
8077\r
8078\r
fast MegaDrive/MegaCD/32X emulator